From f873d5561cd908cda1d9e78aed7b3d1648ee4ac1 Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Thu, 12 Jun 2008 10:13:17 +0000 Subject: prelink: Merge DTPOFF32 fix into main patch git-svn-id: https://svn.o-hand.com/repos/poky/trunk@4623 311d38ba-8fff-0310-9ca6-ca027cbcb966 --- .../prelink/prelink-20061027/arm_eabi.patch | 57 ++++++++++++---------- 1 file changed, 30 insertions(+), 27 deletions(-) (limited to 'meta/packages/prelink/prelink-20061027/arm_eabi.patch') diff --git a/meta/packages/prelink/prelink-20061027/arm_eabi.patch b/meta/packages/prelink/prelink-20061027/arm_eabi.patch index dbce9d289..768d82e74 100644 --- a/meta/packages/prelink/prelink-20061027/arm_eabi.patch +++ b/meta/packages/prelink/prelink-20061027/arm_eabi.patch @@ -5,18 +5,17 @@ Index: prelink-0.0.20061027/src/arch-arm.c =================================================================== --- prelink-0.0.20061027.orig/src/arch-arm.c 2006-08-13 16:18:17.000000000 +0100 -+++ prelink-0.0.20061027/src/arch-arm.c 2007-09-04 12:29:06.000000000 +0100 -@@ -145,6 +145,26 @@ arm_prelink_rel (struct prelink_info *in ++++ prelink-0.0.20061027/src/arch-arm.c 2008-06-12 10:46:12.000000000 +0100 +@@ -145,6 +145,27 @@ error (0, 0, "%s: R_ARM_PC24 relocs with non-zero addend should not be present in prelinked REL sections", dso->filename); return 1; -+ /* DTPOFF32, DTPMOD32 and TPOFF32 is impossible to predict unless prelink -+ sets the rules. Also for DTPOFF32/TPOFF32 there is REL->RELA problem. */ ++ /* DTPMOD32 is impossible to predict unless prelink sets the rules. ++ DTPOFF32/TPOFF32 are converted REL->RELA. */ + case R_ARM_TLS_DTPOFF32: -+ if (dso->ehdr.e_type == ET_EXEC) -+ error (0, 0, "%s: R_ARM_TLS_DTPOFF32 relocs should not be present in prelinked ET_EXEC REL sections", ++ error (0, 0, "%s: R_ARM_TLS_DTPOFF32 relocs should not be present in prelinked REL section", + dso->filename); -+ break; ++ return 1; + case R_ARM_TLS_DTPMOD32: + if (dso->ehdr.e_type == ET_EXEC) + { @@ -26,20 +25,21 @@ Index: prelink-0.0.20061027/src/arch-arm.c + } + break; + case R_ARM_TLS_TPOFF32: -+ if (dso->ehdr.e_type == ET_EXEC) ++ if (dso->ehdr.e_type == ET_EXEC) { + error (0, 0, "%s: R_ARM_TLS_TPOFF32 relocs should not be present in prelinked ET_EXEC REL sections", + dso->filename); ++ return 1; ++ } + break; case R_ARM_COPY: if (dso->ehdr.e_type == ET_EXEC) /* COPY relocs are handled specially in generic code. */ -@@ -195,6 +215,25 @@ arm_prelink_rela (struct prelink_info *i +@@ -195,6 +216,24 @@ write_le32 (dso, rela->r_offset, (read_ule32 (dso, rela->r_offset) & 0xff000000) | val); break; + case R_ARM_TLS_DTPOFF32: -+ if (dso->ehdr.e_type == ET_EXEC) -+ write_le32 (dso, rela->r_offset, value + rela->r_addend); ++ write_le32 (dso, rela->r_offset, value + rela->r_addend); + break; + /* DTPMOD32 and TPOFF32 are impossible to predict unless prelink + sets the rules. */ @@ -59,7 +59,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c case R_ARM_COPY: if (dso->ehdr.e_type == ET_EXEC) /* COPY relocs are handled specially in generic code. */ -@@ -315,6 +354,7 @@ arm_prelink_conflict_rel (DSO *dso, stru +@@ -315,6 +354,7 @@ { GElf_Addr value; struct prelink_conflict *conflict; @@ -67,7 +67,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c GElf_Rela *ret; if (GELF_R_TYPE (rel->r_info) == R_ARM_RELATIVE -@@ -324,8 +364,32 @@ arm_prelink_conflict_rel (DSO *dso, stru +@@ -324,8 +364,32 @@ conflict = prelink_conflict (info, GELF_R_SYM (rel->r_info), GELF_R_TYPE (rel->r_info)); if (conflict == NULL) @@ -102,7 +102,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c ret = prelink_conflict_add_rela (info); if (ret == NULL) return 1; -@@ -342,6 +406,33 @@ arm_prelink_conflict_rel (DSO *dso, stru +@@ -342,6 +406,33 @@ error (0, 0, "%s: R_ARM_%s relocs should not be present in prelinked REL sections", dso->filename, GELF_R_TYPE (rel->r_info) == R_ARM_ABS32 ? "ABS32" : "PC24"); return 1; @@ -136,7 +136,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c case R_ARM_COPY: error (0, 0, "R_ARM_COPY should not be present in shared libraries"); return 1; -@@ -359,6 +450,7 @@ arm_prelink_conflict_rela (DSO *dso, str +@@ -359,6 +450,7 @@ { GElf_Addr value; struct prelink_conflict *conflict; @@ -144,7 +144,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c GElf_Rela *ret; Elf32_Sword val; -@@ -369,8 +461,32 @@ arm_prelink_conflict_rela (DSO *dso, str +@@ -369,8 +461,32 @@ conflict = prelink_conflict (info, GELF_R_SYM (rela->r_info), GELF_R_TYPE (rela->r_info)); if (conflict == NULL) @@ -179,7 +179,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c ret = prelink_conflict_add_rela (info); if (ret == NULL) return 1; -@@ -398,6 +514,32 @@ arm_prelink_conflict_rela (DSO *dso, str +@@ -398,6 +514,32 @@ case R_ARM_COPY: error (0, 0, "R_ARM_COPY should not be present in shared libraries"); return 1; @@ -190,7 +190,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c + && (conflict->reloc_class != RTYPE_CLASS_TLS + || conflict->lookup.tls == NULL)) + { -+ error (0, 0, "%s: R_386_TLS not resolving to STT_TLS symbol", ++ error (0, 0, "%s: R_ARM_TLS not resolving to STT_TLS symbol", + dso->filename); + return 1; + } @@ -212,7 +212,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c default: error (0, 0, "%s: Unknown arm relocation type %d", dso->filename, (int) GELF_R_TYPE (rela->r_info)); -@@ -418,6 +560,8 @@ arm_rel_to_rela (DSO *dso, GElf_Rel *rel +@@ -418,6 +560,8 @@ abort (); case R_ARM_RELATIVE: case R_ARM_ABS32: @@ -221,7 +221,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c rela->r_addend = (Elf32_Sword) read_ule32 (dso, rel->r_offset); break; case R_ARM_PC24: -@@ -426,6 +570,7 @@ arm_rel_to_rela (DSO *dso, GElf_Rel *rel +@@ -426,6 +570,7 @@ break; case R_ARM_COPY: case R_ARM_GLOB_DAT: @@ -229,7 +229,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c rela->r_addend = 0; break; } -@@ -445,6 +590,8 @@ arm_rela_to_rel (DSO *dso, GElf_Rela *re +@@ -445,6 +590,8 @@ abort (); case R_ARM_RELATIVE: case R_ARM_ABS32: @@ -238,7 +238,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c write_le32 (dso, rela->r_offset, rela->r_addend); break; case R_ARM_PC24: -@@ -453,6 +600,7 @@ arm_rela_to_rel (DSO *dso, GElf_Rela *re +@@ -453,6 +600,7 @@ | ((rela->r_addend >> 2) & 0xffffff)); break; case R_ARM_GLOB_DAT: @@ -246,13 +246,16 @@ Index: prelink-0.0.20061027/src/arch-arm.c write_le32 (dso, rela->r_offset, 0); break; } -@@ -488,6 +636,15 @@ arm_need_rel_to_rela (DSO *dso, int firs +@@ -488,6 +636,18 @@ /* FALLTHROUGH */ case R_ARM_PC24: return 1; + case R_ARM_TLS_DTPOFF32: ++ /* We can prelink these fields, and the addend is relative ++ to the symbol value. A RELA entry is needed. */ ++ return 1; + case R_ARM_TLS_TPOFF32: -+ /* In shared libraries {D,}TPOFF32 is changed always into ++ /* In shared libraries TPOFF32 is changed always into + conflicts, for executables we need to preserve + original addend. */ + if (dso->ehdr.e_type == ET_EXEC) { @@ -262,7 +265,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c } } } -@@ -612,6 +769,12 @@ arm_undo_prelink_rel (DSO *dso, GElf_Rel +@@ -612,6 +772,12 @@ return 0; error (0, 0, "%s: R_ARM_COPY reloc in shared library?", dso->filename); return 1; @@ -275,7 +278,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c default: error (0, 0, "%s: Unknown arm relocation type %d", dso->filename, (int) GELF_R_TYPE (rel->r_info)); -@@ -634,6 +797,10 @@ arm_reloc_class (int reloc_type) +@@ -634,6 +800,10 @@ { case R_ARM_COPY: return RTYPE_CLASS_COPY; case R_ARM_JUMP_SLOT: return RTYPE_CLASS_PLT; @@ -286,7 +289,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c default: return RTYPE_CLASS_VALID; } } -@@ -646,7 +813,7 @@ PL_ARCH = { +@@ -646,7 +816,7 @@ .R_JMP_SLOT = R_ARM_JUMP_SLOT, .R_COPY = R_ARM_COPY, .R_RELATIVE = R_ARM_RELATIVE, -- cgit v1.2.3