diff -urN xf86-video-intel-2.5.96.0/src/i830_display.c xf86-video-intel-2.5.96.0.new/src/i830_display.c
--- xf86-video-intel-2.5.96.0/src/i830_display.c	2008-09-11 05:10:10.000000000 +0800
+++ xf86-video-intel-2.5.96.0.new/src/i830_display.c	2008-09-25 21:27:42.000000000 +0800
@@ -376,7 +376,7 @@
 i830WaitForVblank(ScrnInfoPtr pScreen)
 {
     /* Wait for 20ms, i.e. one cycle at 50hz. */
-    usleep(30000);
+    usleep(21000);
 }
 
 void
diff -urN xf86-video-intel-2.5.96.0/src/i830_driver.c xf86-video-intel-2.5.96.0.new/src/i830_driver.c
--- xf86-video-intel-2.5.96.0/src/i830_driver.c	2008-09-25 21:23:52.000000000 +0800
+++ xf86-video-intel-2.5.96.0.new/src/i830_driver.c	2008-09-25 21:30:13.000000000 +0800
@@ -2293,7 +2293,7 @@
 static void
 i830_dpll_settle(void)
 {
-    usleep(10000); /* 10 ms *should* be plenty */
+    usleep(150); /* 10 ms *should* be plenty */
 }
 
 static Bool
@@ -2315,14 +2315,12 @@
       xf86OutputPtr   output = xf86_config->output[i];
       output->funcs->dpms(output, DPMSModeOff);
    }
-   i830WaitForVblank(pScrn);
    
    /* Disable pipes */
    for (i = 0; i < xf86_config->num_crtc; i++) {
       xf86CrtcPtr crtc = xf86_config->crtc[i];
       crtc->funcs->dpms(crtc, DPMSModeOff);
    }
-   i830WaitForVblank(pScrn);
 
    if (IS_MOBILE(pI830) && !IS_I830(pI830))
       OUTREG(LVDS, pI830->saveLVDS);
@@ -2369,11 +2367,13 @@
    OUTREG(FPA0, pI830->saveFPA0);
    OUTREG(FPA1, pI830->saveFPA1);
    OUTREG(DPLL_A, pI830->saveDPLL_A);
+   POSTING_READ(DPLL_A);
    i830_dpll_settle();
    if (IS_I965G(pI830))
       OUTREG(DPLL_A_MD, pI830->saveDPLL_A_MD);
    else
       OUTREG(DPLL_A, pI830->saveDPLL_A);
+   POSTING_READ(DPLL_A);
    i830_dpll_settle();
 
    /* Restore mode config */
@@ -2409,13 +2409,11 @@
        DISPPLANE_SEL_PIPE_A) {
        OUTREG(DSPACNTR, pI830->saveDSPACNTR);
        OUTREG(DSPABASE, INREG(DSPABASE));
-       i830WaitForVblank(pScrn);
    }
    if ((pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_MASK) ==
        DISPPLANE_SEL_PIPE_A) {
        OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
        OUTREG(DSPBBASE, INREG(DSPBBASE));
-       i830WaitForVblank(pScrn);
    }
 
    /* See note about pipe programming above */
@@ -2430,11 +2428,13 @@
       OUTREG(FPB0, pI830->saveFPB0);
       OUTREG(FPB1, pI830->saveFPB1);
       OUTREG(DPLL_B, pI830->saveDPLL_B);
+      POSTING_READ(DPLL_B);
       i830_dpll_settle();
       if (IS_I965G(pI830))
 	 OUTREG(DPLL_B_MD, pI830->saveDPLL_B_MD);
       else
 	 OUTREG(DPLL_B, pI830->saveDPLL_B);
+      POSTING_READ(DPLL_B);
       i830_dpll_settle();
    
       /* Restore mode config */
@@ -2468,13 +2468,11 @@
 	  DISPPLANE_SEL_PIPE_B) {
 	  OUTREG(DSPACNTR, pI830->saveDSPACNTR);
 	  OUTREG(DSPABASE, INREG(DSPABASE));
-	  i830WaitForVblank(pScrn);
       }
       if ((pI830->saveDSPBCNTR & DISPPLANE_SEL_PIPE_MASK) ==
 	  DISPPLANE_SEL_PIPE_B) {
 	  OUTREG(DSPBCNTR, pI830->saveDSPBCNTR);
 	  OUTREG(DSPBBASE, INREG(DSPBBASE));
-	  i830WaitForVblank(pScrn);
       }
    }