# EESchema Netlist Version 1.1 created Mon 20 Aug 2012 02:54:33 PM CEST ( ( /5032322F $noname R5 0 {Lib=R} ( 1 N-000049 ) ( 2 GND ) ) ( /50322FDC $noname R4 0 {Lib=R} ( 1 N-000047 ) ( 2 N-000054 ) ) ( /50240A85 $noname P5 CONN_7X2 {Lib=CONN_7X2} ( 1 +3.3V ) ( 2 /IO_2_8 ) ( 3 /IO_2_7 ) ( 4 /IO_0_2 ) ( 5 /IO_1_8 ) ( 6 +3.3V ) ( 7 ? ) ( 8 ? ) ( 9 GND ) ( 10 /IO_0_1 ) ( 11 /IO_0_0 ) ( 12 /IO_2_0 ) ( 13 /IO_2_6 ) ( 14 GND ) ) ( /50240A7D $noname P4 CONN_7X2 {Lib=CONN_7X2} ( 1 +3.3V ) ( 2 /IO_3_3 ) ( 3 /IO_1_7 ) ( 4 /IO_1_6 ) ( 5 /IO_1_5 ) ( 6 +3.3V ) ( 7 /IO_3_2 ) ( 8 /IO_1_11 ) ( 9 GND ) ( 10 /IO_1_4 ) ( 11 SWDIO ) ( 12 /IO_2_3 ) ( 13 /IO_3_1 ) ( 14 GND ) ) ( /4F9C59D0 $noname P2 CONN_7X2 {Lib=CONN_7X2} ( 1 +3.3V ) ( 2 /IO_2_1 ) ( 3 USB_VBUS ) ( 4 /IO_0_4 ) ( 5 /IO_0_5 ) ( 6 /IO_1_9 ) ( 7 /IO_2_4 ) ( 8 /USB_DM_MCU ) ( 9 /USB_DP_MCU ) ( 10 /IO_2_5 ) ( 11 /IO_0_6 ) ( 12 /IO_0_7 ) ( 13 /IO_2_9 ) ( 14 GND ) ) ( /4FB947F9 $noname P3 CONN_7X2 {Lib=CONN_7X2} ( 1 +3.3V ) ( 2 /IO_3_0 ) ( 3 /IO_1_2 ) ( 4 /IO_1_1 ) ( 5 /IO_1_0 ) ( 6 /IO_0_11 ) ( 7 /IO_2_11 ) ( 8 /IO_1_10 ) ( 9 SWCLK ) ( 10 SWO ) ( 11 /IO_0_8 ) ( 12 /IO_2_2 ) ( 13 /IO_2_10 ) ( 14 GND ) ) ( /4FB909CC $noname C4 10u {Lib=CP1} ( 1 +3.3V ) ( 2 GND ) ) ( /4FB909C6 $noname C5 10u {Lib=CP1} ( 1 +3.3V ) ( 2 GND ) ) ( /4F9C547D $noname R3 1k5 {Lib=R} ( 1 +3.3V ) ( 2 /USB_DP_MCU ) ) ( /4F9C4A62 $noname C3 10u {Lib=CP1} ( 1 +3.3V ) ( 2 GND ) ) ( /4F9BF788 $noname X1 CRYSTAL {Lib=CRYSTAL} ( 1 N-000047 ) ( 2 N-000053 ) ) ( /4F9BF76C $noname C2 18p {Lib=C} ( 1 GND ) ( 2 N-000047 ) ) ( /4F9BF767 $noname C1 18p {Lib=C} ( 1 GND ) ( 2 N-000053 ) ) ( /4F9BF6C5 $noname R2 33 {Lib=R} ( 1 USB_DP ) ( 2 /USB_DP_MCU ) ) ( /4F9BF6BD $noname R1 33 {Lib=R} ( 1 USB_DM ) ( 2 /USB_DM_MCU ) ) ( /4F9BF5E3 $noname J1 USB {Lib=USB} ( 1 N-000050 ) ( 2 USB_DP ) ( 3 USB_DM ) ( 4 N-000049 ) ( 5 N-000049 ) ( 6 N-000049 ) ) ( /4F9BF2A4 MODULE U2 LM1117-3.3 {Lib=LM1117-3.3} ( 1 N-000050 ) ( 2 ? ) ( 3 N-000049 ) ( 4 +3.3V ) ) ( /4F95A5F3 MODULE U1 LPC1343 {Lib=LPC1343} ( 1 /IO_2_6 ) ( 2 /IO_2_0 ) ( 3 /IO_0_0 ) ( 4 /IO_0_1 ) ( 5 GND ) ( 6 N-000054 ) ( 7 N-000053 ) ( 8 +3.3V ) ( 9 /IO_1_8 ) ( 10 /IO_0_2 ) ( 11 /IO_2_7 ) ( 12 /IO_2_8 ) ( 13 /IO_2_1 ) ( 14 USB_VBUS ) ( 15 /IO_0_4 ) ( 16 /IO_0_5 ) ( 17 /IO_1_9 ) ( 18 /IO_2_4 ) ( 19 /USB_DM_MCU ) ( 20 /USB_DP_MCU ) ( 21 /IO_2_5 ) ( 22 /IO_0_6 ) ( 23 /IO_0_7 ) ( 24 /IO_2_9 ) ( 25 /IO_2_10 ) ( 26 /IO_2_2 ) ( 27 /IO_0_8 ) ( 28 SWO ) ( 29 SWCLK ) ( 30 /IO_1_10 ) ( 31 /IO_2_11 ) ( 32 /IO_0_11 ) ( 33 /IO_1_0 ) ( 34 /IO_1_1 ) ( 35 /IO_1_2 ) ( 36 /IO_3_0 ) ( 37 /IO_3_1 ) ( 38 /IO_2_3 ) ( 39 SWDIO ) ( 40 /IO_1_4 ) ( 41 GND ) ( 42 /IO_1_11 ) ( 43 /IO_3_2 ) ( 44 +3.3V ) ( 45 /IO_1_5 ) ( 46 /IO_1_6 ) ( 47 /IO_1_7 ) ( 48 /IO_3_3 ) ) ) * { Allowed footprints by component: $component R5 R? SM0603 SM0805 R?-* SM1206 $endlist $component R4 R? SM0603 SM0805 R?-* SM1206 $endlist $component C4 CP* SM* $endlist $component C5 CP* SM* $endlist $component R3 R? SM0603 SM0805 R?-* SM1206 $endlist $component C3 CP* SM* $endlist $component C2 SM* C? C1-1 $endlist $component C1 SM* C? C1-1 $endlist $component R2 R? SM0603 SM0805 R?-* SM1206 $endlist $component R1 R? SM0603 SM0805 R?-* SM1206 $endlist $endfootprintlist } { Pin List by Nets Net 1 "GND" "GND" C2 1 C1 1 P5 9 P5 14 U1 41 U1 5 P4 9 C3 2 P4 14 C5 2 C4 2 P3 14 R5 2 P2 14 Net 2 "+3.3V" "+3.3V" R3 1 C3 1 C5 1 U1 44 U2 4 P3 1 C4 1 P2 1 P5 6 U1 8 P4 1 P5 1 P4 6 Net 5 "/IO_2_5" "IO_2_5" P2 10 U1 21 Net 6 "/USB_DP_MCU" "USB_DP_MCU" P2 9 R2 2 U1 20 R3 2 Net 7 "/USB_DM_MCU" "USB_DM_MCU" U1 19 R1 2 P2 8 Net 8 "/IO_1_9" "IO_1_9" P2 6 U1 17 Net 9 "/IO_3_1" "IO_3_1" U1 37 P4 13 Net 10 "/IO_1_11" "IO_1_11" U1 42 P4 8 Net 11 "/IO_0_11" "IO_0_11" U1 32 P3 6 Net 12 "/IO_0_6" "IO_0_6" U1 22 P2 11 Net 13 "/IO_2_8" "IO_2_8" P5 2 U1 12 Net 14 "/IO_2_11" "IO_2_11" P3 7 U1 31 Net 15 "/IO_2_7" "IO_2_7" U1 11 P5 3 Net 16 "/IO_1_4" "IO_1_4" U1 40 P4 10 Net 17 "/IO_1_10" "IO_1_10" U1 30 P3 8 Net 18 "/IO_0_2" "IO_0_2" P5 4 U1 10 Net 19 "/IO_1_8" "IO_1_8" P5 5 U1 9 Net 20 "/IO_2_1" "IO_2_1" P2 2 U1 13 Net 21 "/IO_0_1" "IO_0_1" P5 10 U1 4 Net 22 "/IO_0_0" "IO_0_0" P5 11 U1 3 Net 23 "/IO_2_0" "IO_2_0" U1 2 P5 12 Net 24 "/IO_2_6" "IO_2_6" U1 1 P5 13 Net 25 "/IO_2_2" "IO_2_2" P3 12 U1 26 Net 26 "/IO_3_3" "IO_3_3" P4 2 U1 48 Net 27 "/IO_2_3" "IO_2_3" P4 12 U1 38 Net 28 "/IO_2_4" "IO_2_4" U1 18 P2 7 Net 29 "/IO_1_7" "IO_1_7" P4 3 U1 47 Net 30 "/IO_0_8" "IO_0_8" P3 11 U1 27 Net 31 "/IO_1_6" "IO_1_6" U1 46 P4 4 Net 32 "/IO_3_0" "IO_3_0" P3 2 U1 36 Net 33 "/IO_0_5" "IO_0_5" U1 16 P2 5 Net 34 "/IO_1_5" "IO_1_5" P4 5 U1 45 Net 35 "/IO_1_2" "IO_1_2" P3 3 U1 35 Net 36 "/IO_2_10" "IO_2_10" P3 13 U1 25 Net 37 "/IO_0_4" "IO_0_4" U1 15 P2 4 Net 38 "/IO_1_1" "IO_1_1" P3 4 U1 34 Net 39 "/IO_2_9" "IO_2_9" U1 24 P2 13 Net 40 "USB_VBUS" "USB_VBUS" P2 3 U1 14 Net 41 "/IO_3_2" "IO_3_2" U1 43 P4 7 Net 42 "/IO_1_0" "IO_1_0" P3 5 U1 33 Net 43 "/IO_0_7" "IO_0_7" P2 12 U1 23 Net 44 "SWDIO" "SWDIO" U1 39 P4 11 Net 45 "SWCLK" "SWCLK" P3 9 U1 29 Net 46 "SWO" "SWO" U1 28 P3 10 Net 47 "" "" R4 1 C2 2 X1 1 Net 49 "" "" U2 3 R5 1 J1 4 J1 5 J1 6 Net 50 "" "" U2 1 J1 1 Net 51 "USB_DM" "USB_DM" J1 3 R1 1 Net 52 "USB_DP" "USB_DP" J1 2 R2 1 Net 53 "" "" U1 7 C1 2 X1 2 Net 54 "" "" U1 6 R4 2 } #End