From a564ed823c255a95cff143cf02757cdbf55f14f9 Mon Sep 17 00:00:00 2001 From: Trygve Laugstøl Date: Sat, 16 Feb 2013 13:25:42 +0100 Subject: o Using a record for the mcu bus. --- vhdl/ice.vhd | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 vhdl/ice.vhd (limited to 'vhdl/ice.vhd') diff --git a/vhdl/ice.vhd b/vhdl/ice.vhd new file mode 100644 index 0000000..8cbff92 --- /dev/null +++ b/vhdl/ice.vhd @@ -0,0 +1,42 @@ +library ieee; +use ieee.std_logic_1164.all; + +use work.mcu.all; + +entity ice is + port ( + mcu_in : in mcu_in; + bit_out : out std_logic; + oe : in std_logic; + ce : in std_logic; + we : in std_logic + ); +end ice; + +architecture behaviour of ice is + signal ah : std_logic_vector(15 downto 8); + signal al : std_logic_vector(7 downto 0); + signal d : std_logic_vector(7 downto 0); + + signal ram_address : std_logic_vector(14 downto 0); +begin + mcu_interface : entity work.mcu_interface(behaviour) port map( + mcu_in, + bit_out, + ah, + al, + d, -- d_out, + d -- d_in + ); + + address : ram_address <= ah(14 downto 8) & al; + + ram : entity work.as7c256a port map( + address => ram_address, + dataio => d, + oe_bar => oe, + ce_bar => ce, + we_bar => we + ); + +end; -- cgit v1.2.3