From a564ed823c255a95cff143cf02757cdbf55f14f9 Mon Sep 17 00:00:00 2001
From: Trygve Laugstøl <trygvis@inamo.no>
Date: Sat, 16 Feb 2013 13:25:42 +0100
Subject: o Using a record for the mcu bus.

---
 vhdl/mcu_interface.vhd | 43 ++++++++++++++++---------------------------
 1 file changed, 16 insertions(+), 27 deletions(-)

(limited to 'vhdl/mcu_interface.vhd')

diff --git a/vhdl/mcu_interface.vhd b/vhdl/mcu_interface.vhd
index d8d2b56..86807a7 100644
--- a/vhdl/mcu_interface.vhd
+++ b/vhdl/mcu_interface.vhd
@@ -5,24 +5,12 @@ use ieee.std_logic_unsigned.all;
 library fmf;
 use fmf.std595;
 
-use work.all;
+use work.mcu.all;
 
 entity mcu_interface is
   port (
-    -- SPI interface
-    bit_in              : in  std_logic;
+    mcu_in              : in mcu_in;
     bit_out             : out std_logic;
-    bit_clk             : in  std_logic;
-
-    -- Strobed to latch data from SPI buffer to AH, AL and Dout
-    byte_out_clk        : in  std_logic;
-    -- Store to latch data from D bus to Din
-    byte_in_clk         : in  std_logic;
-    -- Enable AH and AL, active low
-    a_oe                : in  std_logic; 
-    -- Enable Dout, active low
-    d_oe                : in  std_logic; 
-
     ah                  : out std_logic_vector(7 downto 0);
     al                  : out std_logic_vector(7 downto 0);
     d_out               : out std_logic_vector(7 downto 0);
@@ -36,11 +24,11 @@ architecture behaviour of mcu_interface is
   signal al_out         : std_logic;
 begin
   ah_buf : entity fmf.std595(vhdl_behavioral) port map(
-    ser => bit_in,
+    ser => mcu_in.bit_in,
     qhser => ah_out,
-    sck => bit_clk,
-    rck => byte_out_clk,
-    gneg => a_oe,
+    sck => mcu_in.bit_clk,
+    rck => mcu_in.byte_out_clk,
+    gneg => mcu_in.a_oe,
     qa => ah(0),
     qb => ah(1),
     qc => ah(2),
@@ -55,9 +43,9 @@ begin
   al_buf : entity fmf.std595(vhdl_behavioral) port map(
     ser => ah_out,
     qhser => al_out,
-    sck => bit_clk,
-    rck => byte_out_clk,
-    gneg => a_oe,
+    sck => mcu_in.bit_clk,
+    rck => mcu_in.byte_out_clk,
+    gneg => mcu_in.a_oe,
     qa => al(0),
     qb => al(1),
     qc => al(2),
@@ -71,10 +59,10 @@ begin
 
   d_out_buf : entity fmf.std595(vhdl_behavioral) port map(
     ser => al_out,
---  qhser => Not connected
-    sck => bit_clk,
-    rck => byte_out_clk,
-    gneg => d_oe,
+    qhser => open,
+    sck => mcu_in.bit_clk,
+    rck => mcu_in.byte_out_clk,
+    gneg => mcu_in.d_oe,
     qa => d_out(0),
     qb => d_out(1),
     qc => d_out(2),
@@ -89,9 +77,10 @@ begin
   d_in_buf : entity fmf.std165(vhdl_behavioral) port map(
     ser => '0',
     q => bit_out,
-    clk => bit_clk,
+    qneg => open,
+    clk => mcu_in.bit_clk,
     clkinh => '0',
-    sh => byte_in_clk,
+    sh => mcu_in.byte_in_clk,
     da => d_in(0),
     db => d_in(1),
     dc => d_in(2),
-- 
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