From ee6e3ba807ce4d93988eb83b29b9af22e25fd0b4 Mon Sep 17 00:00:00 2001 From: Trygve Laugstøl Date: Sun, 17 Feb 2013 12:30:14 +0100 Subject: o Using a bus for the memory input too. o Adding a test case for reading data from RAM. --- vhdl/ram-ice.xise | 1 - 1 file changed, 1 deletion(-) (limited to 'vhdl/ram-ice.xise') diff --git a/vhdl/ram-ice.xise b/vhdl/ram-ice.xise index 77f5b5a..53fce3b 100644 --- a/vhdl/ram-ice.xise +++ b/vhdl/ram-ice.xise @@ -128,7 +128,6 @@ - -- cgit v1.2.3