diff options
Diffstat (limited to 'thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage')
84 files changed, 44101 insertions, 0 deletions
diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/MassStorageSimpleBuffer.ewd b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/MassStorageSimpleBuffer.ewd new file mode 100644 index 0000000..26ba5a9 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/MassStorageSimpleBuffer.ewd @@ -0,0 +1,8092 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<project> + <fileVersion>2</fileVersion> + <configuration> + <name>STM3210E-EVAL</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>C-SPY</name> + <archiveVersion>2</archiveVersion> + <data> + <version>23</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CInput</name> + <state>1</state> + </option> + <option> + <name>CEndian</name> + <state>1</state> + </option> + <option> + <name>CProcessor</name> + <state>1</state> + </option> + <option> + <name>OCVariant</name> + <state>0</state> + </option> + <option> + <name>MacOverride</name> + <state>0</state> + </option> + <option> + <name>MacFile</name> + <state></state> + </option> + <option> + <name>MemOverride</name> + <state>0</state> + </option> + <option> + <name>MemFile</name> + <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32F103xE.ddf</state> + </option> + <option> + <name>RunToEnable</name> + <state>1</state> + </option> + <option> + <name>RunToName</name> + <state>main</state> + </option> + <option> + <name>CExtraOptionsCheck</name> + <state>0</state> + </option> + <option> + <name>CExtraOptions</name> + <state></state> + </option> + <option> + <name>CFpuProcessor</name> + <state>1</state> + </option> + <option> + <name>OCDDFArgumentProducer</name> + <state></state> + </option> + <option> + <name>OCDownloadSuppressDownload</name> + <state>0</state> + </option> + <option> + <name>OCDownloadVerifyAll</name> + <state>1</state> + </option> + <option> + <name>OCProductVersion</name> + <state>4.41A</state> + </option> + <option> + <name>OCDynDriverList</name> + <state>STLINK_ID</state> + </option> + <option> + <name>OCLastSavedByProductVersion</name> + <state>6.40.1.53794</state> + </option> + <option> + <name>OCDownloadAttachToProgram</name> + <state>0</state> + </option> + <option> + <name>UseFlashLoader</name> + <state>1</state> + </option> + <option> + <name>CLowLevel</name> + <state>1</state> + </option> + <option> + <name>OCBE8Slave</name> + <state>1</state> + </option> + <option> + <name>MacFile2</name> + <state></state> + </option> + <option> + <name>CDevice</name> + <state>1</state> + </option> + <option> + <name>FlashLoadersV3</name> + <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F10xxE.board</state> + </option> + <option> + <name>OCImagesSuppressCheck1</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath1</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck2</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath2</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck3</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath3</name> + <state></state> + </option> + <option> + <name>OverrideDefFlashBoard</name> + <state>0</state> + </option> + <option> + <name>OCImagesOffset1</name> + <state></state> + </option> + <option> + <name>OCImagesOffset2</name> + <state></state> + </option> + <option> + <name>OCImagesOffset3</name> + <state></state> + </option> + <option> + <name>OCImagesUse1</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse2</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse3</name> + <state>0</state> + </option> + <option> + <name>OCDeviceConfigMacroFile</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>ARMSIM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCSimDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCSimEnablePSP</name> + <state>0</state> + </option> + <option> + <name>OCSimPspOverrideConfig</name> + <state>0</state> + </option> + <option> + <name>OCSimPspConfigFile</name> + <state></state> + </option> + </data> + </settings> + <settings> + <name>ANGEL_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CCAngelHeartbeat</name> + <state>1</state> + </option> + <option> + <name>CAngelCommunication</name> + <state>1</state> + </option> + <option> + <name>CAngelCommBaud</name> + <version>0</version> + <state>3</state> + </option> + <option> + <name>CAngelCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>ANGELTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoAngelLogfile</name> + <state>0</state> + </option> + <option> + <name>AngelLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>GDBSERVER_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>main</state> + </option> + </data> + </settings> + <settings> + <name>IARROM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRomLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRomLogFileEditB</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CRomCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CRomCommBaud</name> + <version>0</version> + <state>7</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>IJET_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>IjetAttachSlave</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeScriptFile</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeConfigFile</name> + <state>1</state> + </option> + <option> + <name>IjetResetList</name> + <version>0</version> + <state>9</state> + </option> + <option> + <name>IjetHWResetDuration</name> + <state>300</state> + </option> + <option> + <name>IjetHWResetDelay</name> + <state>200</state> + </option> + <option> + <name>IjetPowerFromProbe</name> + <state>1</state> + </option> + <option> + <name>IjetPowerRadio</name> + <state>1</state> + </option> + <option> + <name>IjetDoLogfile</name> + <state>0</state> + </option> + <option> + <name>IjetLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>IjetInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>IjetInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>IjetMultiTargetEnable</name> + <state>0</state> + </option> + <option> + <name>IjetMultiTarget</name> + <state>0</state> + </option> + <option> + <name>IjetScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>IjetIRLength</name> + <state>0</state> + </option> + <option> + <name>IjetJtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>IjetProtocolRadio</name> + <state>0</state> + </option> + <option> + <name>IjetSwoPin</name> + <state>0</state> + </option> + <option> + <name>IjetCpuClockEdit</name> + <state>72.0</state> + </option> + <option> + <name>IjetSwoPrescalerList</name> + <version>1</version> + <state>0</state> + </option> + <option> + <name>IjetBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>IjetRestoreBreakpointsCheck</name> + <state>0</state> + </option> + <option> + <name>IjetUpdateBreakpointsEdit</name> + <state>_call_main</state> + </option> + <option> + <name>RDICatchReset</name> + <state>0</state> + </option> + <option> + <name>RDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>RDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>RDICatchData</name> + <state>0</state> + </option> + <option> + <name>RDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>RDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>RDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CatchCHKERR</name> + <state>0</state> + </option> + <option> + <name>CatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CatchDummy</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>JLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>14</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>JLinkSpeed</name> + <state>32</state> + </option> + <option> + <name>CCJLinkDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCJLinkLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJLinkHWResetDelay</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>JLinkInitialSpeed</name> + <state>32</state> + </option> + <option> + <name>CCDoJlinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>CCJLinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCJLinkIRLength</name> + <state>0</state> + </option> + <option> + <name>CCJLinkCommRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>CCJLinkSpeedRadioV2</name> + <state>0</state> + </option> + <option> + <name>CCUSBDevice</name> + <version>1</version> + <state>1</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CCJLinkBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJLinkUpdateBreakpoints</name> + <state>main</state> + </option> + <option> + <name>CCJLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>OCJLinkAttachSlave</name> + <state>1</state> + </option> + <option> + <name>CCJLinkResetList</name> + <version>6</version> + <state>7</state> + </option> + <option> + <name>CCJLinkInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCCatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CCCatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchCHRERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchDummy</name> + <state>0</state> + </option> + <option> + <name>OCJLinkScriptFile</name> + <state>1</state> + </option> + <option> + <name>CCJLinkUsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCTcpIpAlt</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCJLinkTcpIpSerialNo</name> + <state></state> + </option> + <option> + <name>CCCpuClockEdit</name> + <state>72.0</state> + </option> + <option> + <name>CCSwoClockAuto</name> + <state>0</state> + </option> + <option> + <name>CCSwoClockEdit</name> + <state>2000</state> + </option> + <option> + <name>OCJLinkTraceSource</name> + <state>0</state> + </option> + <option> + <name>OCJLinkTraceSourceDummy</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>LMIFTDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>LmiftdiSpeed</name> + <state>500</state> + </option> + <option> + <name>CCLmiftdiDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCLmiftdiLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCLmiFtdiInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCLmiFtdiInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>MACRAIGOR_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>3</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>jtag</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>EmuSpeed</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>DoEmuMultiTarget</name> + <state>0</state> + </option> + <option> + <name>EmuMultiTarget</name> + <state>0@ARM7TDMI</state> + </option> + <option> + <name>EmuHWReset</name> + <state>0</state> + </option> + <option> + <name>CEmuCommBaud</name> + <version>0</version> + <state>4</state> + </option> + <option> + <name>CEmuCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>jtago</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>UnusedAddr</name> + <state>0x00800000</state> + </option> + <option> + <name>CCMacraigorHWResetDelay</name> + <state></state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>main</state> + </option> + <option> + <name>CCMacraigorInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCMacraigorInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>PEMICRO_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCPEMicroAttachSlave</name> + <state>1</state> + </option> + <option> + <name>CCPEMicroInterfaceList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCPEMicroResetDelay</name> + <state></state> + </option> + <option> + <name>CCPEMicroJtagSpeed</name> + <state>#UNINITIALIZED#</state> + </option> + <option> + <name>CCJPEMicroShowSettings</name> + <state>0</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCPEMicroUSBDevice</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCPEMicroSerialPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCJPEMicroTCPIPAutoScanNetwork</name> + <state>1</state> + </option> + <option> + <name>CCPEMicroTCPIP</name> + <state>10.0.0.1</state> + </option> + <option> + <name>CCPEMicroCommCmdLineProducer</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>RDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRDIDriverDll</name> + <state>Browse to your RDI driver</state> + </option> + <option> + <name>CRDILogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRDILogFileEdit</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCRDIHWReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>RDIJTAGJET_ID</name> + <archiveVersion>0</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRDILogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRDILogFileEdit</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCRDIHWReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchReset</name> 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<state>0</state> + </option> + <option> + <name>CCSTLinkResetList</name> + <version>1</version> + <state>0</state> + </option> + <option> + <name>CCCpuClockEdit</name> + <state>72.0</state> + </option> + <option> + <name>CCSwoClockAuto</name> + <state>0</state> + </option> + <option> + <name>CCSwoClockEdit</name> + <state>2000</state> + </option> + </data> + </settings> + <settings> + <name>THIRDPARTY_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CThirdPartyDriverDll</name> + <state>Browse to your third-party driver</state> + </option> + <option> + <name>CThirdPartyLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CThirdPartyLogFileEditB</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>XDS100_ID</name> + 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<file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file> + <loadFlag>0</loadFlag> + </plugin> + <plugin> + <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + </debuggerPlugins> + </configuration> +</project> + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/MassStorageSimpleBuffer.ewp b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/MassStorageSimpleBuffer.ewp new file mode 100644 index 0000000..0c8bd18 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/MassStorageSimpleBuffer.ewp @@ -0,0 +1,6934 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<project> + <fileVersion>2</fileVersion> + <configuration> + <name>STM3210E-EVAL</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>General</name> + <archiveVersion>3</archiveVersion> + <data> + <version>21</version> + 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<name>$PROJ_DIR$\..\src\usb_istr.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\src\usb_prop.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\src\usb_pwr.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\src\usb_scsi.c</name> + </file> + </group> +</project> + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/MassStorageSimpleBuffer.eww b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/MassStorageSimpleBuffer.eww new file mode 100644 index 0000000..acdd01d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/MassStorageSimpleBuffer.eww @@ -0,0 +1,34 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<workspace> + <project> + <path>$WS_DIR$\MassStorageSimpleBuffer.ewp</path> + </project> + <batchBuild> + <batchDefinition> + <name>USB-Package-MassStorage</name> + <member> + <project>MassStorageSimpleBuffer</project> + <configuration>STM3210B-EVAL</configuration> + </member> + <member> + <project>MassStorageSimpleBuffer</project> + <configuration>STM3210C-EVAL</configuration> + </member> + <member> + <project>MassStorageSimpleBuffer</project> + <configuration>STM3210E-EVAL</configuration> + </member> + <member> + <project>MassStorageSimpleBuffer</project> + <configuration>STM3210E-EVAL_XL</configuration> + </member> + <member> + <project>MassStorageSimpleBuffer</project> + <configuration>STM32L152-EVAL</configuration> + </member> + </batchDefinition> + </batchBuild> +</workspace> + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32f10x_flash.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32f10x_flash.icf new file mode 100644 index 0000000..6721a0d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32f10x_flash.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32f30x_flash.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32f30x_flash.icf new file mode 100644 index 0000000..9d295c8 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32f30x_flash.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP };
\ No newline at end of file diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32f37x_flash.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32f37x_flash.icf new file mode 100644 index 0000000..a743cb4 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32f37x_flash.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x1800; +define symbol __ICFEDIT_size_heap__ = 0x800; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; +export symbol __ICFEDIT_region_RAM_start__; +export symbol __ICFEDIT_region_RAM_end__; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP };
\ No newline at end of file diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32l1xx_flash.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32l1xx_flash.icf new file mode 100644 index 0000000..8b7d80d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/EWARM/stm32l1xx_flash.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; +define symbol __ICFEDIT_region_ROM_end__ = 0x0805FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/MDK-ARM/MassStorageSimpleBuffer.uvopt b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/MDK-ARM/MassStorageSimpleBuffer.uvopt new file mode 100644 index 0000000..0c4ec6b --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/MDK-ARM/MassStorageSimpleBuffer.uvopt @@ -0,0 +1,2519 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>STM3210B-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM3210B-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>0</CpuCode> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103VB</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103VB</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UM0015BJE -O2190 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06416041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM3210E-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM3210E-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>0</CpuCode> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103ZE</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103ZE</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(125=-1,-1,-1,-1,0)(126=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ST-LINKIII-KEIL</Key> + <Name>-S</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UV0579U9E -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>1</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM3210E-EVAL_XL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM3210E-EVAL_XL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Reference Manual</Title> + <Path>DATASHTS\ST\STM32F10xxx.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103ZG</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103ZG</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UM0015BJE -O2190 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06416041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_1024 -FS08000000 -FL0100000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32L152-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32L152-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Datasheet</Title> + <Path>DATASHTS\ST\STM32L151xx_152xx_DS.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DCM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TCM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-U-O14 -O2062 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>0</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32L152D-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32L152D-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Datasheet</Title> + <Path>DATASHTS\ST\STM32L162xx_DS.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments>-MPU</SimDllArguments> + <SimDlgDllName>DCM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDllName>TCM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UV0579U9E -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>1</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32373C_EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32373C_EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>0</CpuCode> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments></SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments></TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-O14 -S0 -C0 -N00("ARM Cortex-M4") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F3xx_256 -FS08000000 -FL040000)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>1</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32303C_EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + 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<Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x20000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x20000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + 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<SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x8000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>User</GroupName> + <Files> + <File> + <FileName>stm32f37x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Libraries\STM32F37x_StdPeriph_Driver\src\stm32f37x_misc.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + 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<Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x80000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x80000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define>USE_STDPERIPH_DRIVER, STM32F10X_HD, USE_STM3210E_EVAL</Define> + <Undefine></Undefine> + <IncludePath>..\inc;..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Include;..\..\..\Libraries\STM32_USB-FS-Device_Driver\inc;..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\..\Utilities\STM32_EVAL;..\..\..\Utilities\STM32_EVAL\Common;..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x8000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>User</GroupName> + <Files> + <File> + <FileName>stm32f37x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Libraries\STM32F37x_StdPeriph_Driver\src\stm32f37x_misc.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c</FilePath> + </File> + <File> + <FileName>fsmc_nand.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\fsmc_nand.c</FilePath> + </File> + <File> + <FileName>hw_config.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\hw_config.c</FilePath> + </File> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\main.c</FilePath> + </File> + <File> + <FileName>mass_mal.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\mass_mal.c</FilePath> + </File> + <File> + <FileName>memory.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\memory.c</FilePath> + </File> + <File> + <FileName>nand_if.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\nand_if.c</FilePath> + </File> + <File> + <FileName>scsi_data.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\scsi_data.c</FilePath> + </File> + <File> + <FileName>usb_bot.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_bot.c</FilePath> + </File> + <File> + <FileName>usb_desc.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_desc.c</FilePath> + </File> + <File> + <FileName>usb_endp.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_endp.c</FilePath> + </File> + <File> + <FileName>usb_istr.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_istr.c</FilePath> + </File> + <File> + <FileName>usb_prop.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_prop.c</FilePath> + </File> + <File> + <FileName>usb_pwr.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_pwr.c</FilePath> + </File> + <File> + <FileName>usb_scsi.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_scsi.c</FilePath> + </File> + <File> + <FileName>stm32_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\stm32_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_stm32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32f10x.c</FilePath> + </File> + <File> + <FileName>system_stm32l1xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32l1xx.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_hd.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_hd.s</FilePath> + </File> + <File> + <FileName>startup_stm32f10x_ld.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_ld.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_ld_vl.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_ld_vl.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_md.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_md.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_md_vl.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_md_vl.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_xl.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_xl.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32l1xx_hd.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32L1xx\Source\Templates\arm\startup_stm32l1xx_hd.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32l1xx_md.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32L1xx\Source\Templates\arm\startup_stm32l1xx_md.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32l1xx_mdp.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32L1xx\Source\Templates\arm\startup_stm32l1xx_mdp.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + 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<IncludePath></IncludePath> + </VariousControls> + </Aads> + </GroupArmAds> + </GroupOption> + <Files> + <File> + <FileName>stm32373c_eval.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Utilities\STM32_EVAL\STM32373C_EVAL\stm32373c_eval.c</FilePath> + </File> + <File> + <FileName>stm32373c_eval_spi_sd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Utilities\STM32_EVAL\STM32373C_EVAL\stm32373c_eval_spi_sd.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>STM32303C_EVAL</GroupName> + <GroupOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <GroupArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </GroupArmAds> + </GroupOption> + <Files> + <File> + <FileName>stm32303c_eval.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Utilities\STM32_EVAL\STM32303C_EVAL\stm32303c_eval.c</FilePath> + </File> + <File> + <FileName>stm32303c_eval_spi_sd.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Utilities\STM32_EVAL\STM32303C_EVAL\stm32303c_eval_spi_sd.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Doc</GroupName> + <Files> + <File> + <FileName>readme.txt</FileName> + <FileType>5</FileType> + <FilePath>..\readme.txt</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + <Target> + <TargetName>STM32L152-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32L152VB</Device> + <Vendor>STMicroelectronics</Vendor> + <Cpu>IRAM(0x20000000-0x20003FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"STARTUP\ST\STM32L1xx\startup_stm32l1xx_md.s" ("STM32L15xx Medium density Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000)</FlashDriverDll> + <DeviceId>5249</DeviceId> + <RegisterFile>stm32l1xx.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\ST\STM32L15x\STM32L15x.sfr</SFDFile> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>ST\STM32L1xx\</RegisterFilePath> + <DBRegisterFilePath>ST\STM32L1xx\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\STM32L152-EVAL\</OutputDirectory> + <OutputName>STM32L152-EVAL</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\STM32L152-EVAL\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + 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<FlashUtilSpec></FlashUtilSpec> + <StartupFile>"STARTUP\ST\STM32L1xx\startup_stm32l1xx_hd.s" ("STM32L1xx High density Startup Code")</StartupFile> + <FlashDriverDll>ULP2CM3(-O207 -S8 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L1xx_384 -FS08000000 -FL060000)</FlashDriverDll> + <DeviceId>6190</DeviceId> + <RegisterFile>stm32l1xx.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile>SFD\ST\STM32L15\STM32L152xD.sfr</SFDFile> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>ST\STM32L1xx\</RegisterFilePath> + <DBRegisterFilePath>ST\STM32L1xx\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\STM32L152D-EVAL\</OutputDirectory> + <OutputName>STM32L152D-EVAL</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\STM32L152D-EVAL\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments>-MPU</SimDllArguments> + <SimDlgDll>DCM.DLL</SimDlgDll> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDll>TCM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + 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<Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0xc000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x60000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x60000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + 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STM32L1XX_HD, USE_STM32L152D_EVAL</Define> + <Undefine></Undefine> + <IncludePath>..\inc;..\..\..\Libraries\CMSIS\Device\ST\STM32L1xx\Include;..\..\..\Libraries\STM32_USB-FS-Device_Driver\inc;..\..\..\Libraries\STM32L1xx_StdPeriph_Driver\inc;..\..\..\Utilities\STM32_EVAL;..\..\..\Utilities\STM32_EVAL\Common;..\..\..\Utilities\STM32_EVAL\STM32L152D_EVAL</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x8000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>User</GroupName> + <Files> + <File> + <FileName>stm32f37x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Libraries\STM32F37x_StdPeriph_Driver\src\stm32f37x_misc.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c</FilePath> + </File> + <File> + <FileName>fsmc_nand.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\fsmc_nand.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>2</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>hw_config.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\hw_config.c</FilePath> + </File> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\main.c</FilePath> + </File> + <File> + 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<UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll>DARMSTM.DLL</SimDlgDll> + <SimDlgDllArguments></SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TARMSTM.DLL</TargetDlgDll> + <TargetDlgDllArguments></TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\UL2CM3.DLL</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>1</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M4"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>2</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>1</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>5</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x8000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x40000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x8000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define>USE_STDPERIPH_DRIVER, STM32F37X, USE_STM32373C_EVAL</Define> + <Undefine></Undefine> + <IncludePath>..\inc;..\..\..\Libraries\CMSIS\Device\ST\\STM32F37x\Include;..\..\..\Libraries\STM32_USB-FS-Device_Driver\inc;..\..\..\Libraries\STM32F37x_StdPeriph_Driver\inc;..\..\..\Utilities\STM32_EVAL;..\..\..\Utilities\STM32_EVAL\Common;..\..\..\Utilities\STM32_EVAL\STM32373C_EVAL</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x8000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>User</GroupName> + <Files> + <File> + <FileName>stm32f37x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Libraries\STM32F37x_StdPeriph_Driver\src\stm32f37x_misc.c</FilePath> + </File> + <File> + <FileName>misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>fsmc_nand.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\fsmc_nand.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>2</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>hw_config.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\hw_config.c</FilePath> + </File> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\main.c</FilePath> + </File> + <File> + <FileName>mass_mal.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\mass_mal.c</FilePath> + </File> + <File> + <FileName>memory.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\memory.c</FilePath> + </File> + <File> + <FileName>nand_if.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\nand_if.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>2</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>scsi_data.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\scsi_data.c</FilePath> + </File> + <File> + <FileName>usb_bot.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_bot.c</FilePath> + </File> + <File> + <FileName>usb_desc.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_desc.c</FilePath> + </File> + <File> + <FileName>usb_endp.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_endp.c</FilePath> + </File> + <File> + <FileName>usb_istr.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_istr.c</FilePath> + </File> + <File> + <FileName>usb_prop.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_prop.c</FilePath> + </File> + <File> + <FileName>usb_pwr.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_pwr.c</FilePath> + </File> + <File> + <FileName>usb_scsi.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_scsi.c</FilePath> + </File> + <File> + <FileName>stm32_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\stm32_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_stm32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32f10x.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>system_stm32l1xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32l1xx.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_hd.s</FileName> + <FileType>2</FileType> + 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b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM3210B-EVAL/.project @@ -0,0 +1,232 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM3210B-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>com.tasking.arm.TskManagedBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + <nature>com.tasking.arm.target</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM3210B_EVAL</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f10x.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/readme.txt</locationURI> + </link> + <link> + <name>STM3210B_EVAL/stm3210b_eval.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM3210B_EVAL/stm3210b_eval.c</locationURI> + </link> + <link> + <name>STM3210B_EVAL/stm3210b_eval_spi_sd.c</name> + <type>1</type> + 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<name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/main.c</locationURI> + </link> + <link> + <name>User/mass_mal.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/mass_mal.c</locationURI> + </link> + <link> + <name>User/memory.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/memory.c</locationURI> + </link> + <link> + <name>User/scsi_data.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/scsi_data.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_bot.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_bot.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_endp.c</name> + <type>1</type> + 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b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM3210B-EVAL/TASKING/STM32F10x_md.lsl @@ -0,0 +1,148 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 128k; + map ( size = 128k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 20k; + map ( size = 20k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); /* Reset Handler */ + vector( id = 2, optional, fill = "NMI_Handler" ); /* 2 Non Maskable Interrupt */ + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN RX0 + vector ( id = 37, optional, fill = "CAN_RX1_IRQHandler" ); // CAN RX1 + vector ( id = 38, optional, fill = "CAN_SCE_IRQHandler" ); // CAN SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + + } +} +# endif diff --git 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+ <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/readme.txt</locationURI> + </link> + <link> + <name>STM3210E_EVAL/stm3210e_eval.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval.c</locationURI> + </link> + <link> + <name>STM3210E_EVAL/stm3210e_eval_sdio_sd.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_sdio_sd.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_adc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c</locationURI> + </link> + <link> + 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<link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_i2c.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_sdio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c</locationURI> + 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+ <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/main.c</locationURI> + </link> + <link> + <name>User/mass_mal.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/mass_mal.c</locationURI> + </link> + <link> + <name>User/memory.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/memory.c</locationURI> + </link> + <link> + <name>User/nand_if.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/nand_if.c</locationURI> + </link> + <link> + <name>User/scsi_data.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/scsi_data.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_bot.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_bot.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_endp.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_endp.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_pwr.c</locationURI> + </link> + <link> + <name>User/usb_scsi.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_scsi.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM3210E-EVAL_XL/STM3210E-EVAL_XL.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM3210E-EVAL_XL/STM3210E-EVAL_XL.launch new file mode 100644 index 0000000..252b6cb --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM3210E-EVAL_XL/STM3210E-EVAL_XL.launch @@ -0,0 +1,44 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> +<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="ST-LINK over USB (JTAG)"/> +<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> +<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/> +<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.HISTORY_BUFFER_ENABLED" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.PSM_ENABLED" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM3210E-Eval board"/> +<booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_mirror_address" value="0x0"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32f10x.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_sector_buffer_size" value="4096"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="JTAG"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> +<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM3210E-EVAL_XL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210E-EVAL_XL"/> +<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210E-EVAL_XL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM3210E-EVAL_XL/TASKING/STM32F10x_XL.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM3210E-EVAL_XL/TASKING/STM32F10x_XL.lsl new file mode 100644 index 0000000..a944802 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM3210E-EVAL_XL/TASKING/STM32F10x_XL.lsl @@ -0,0 +1,165 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 0x100000; + map ( size = 0x100000, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 96k; + map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); /* Reset Handler */ + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32303C_EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32303C_EVAL/.cproject new file mode 100644 index 0000000..2750b9d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32303C_EVAL/.cproject @@ -0,0 +1,112 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?> + +<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration 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<projects> + </projects> + <buildSpec> + <buildCommand> + <name>com.tasking.arm.TskManagedBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + <nature>com.tasking.arm.target</nature> + </natures> + <linkedResources> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM32F30x</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/readme.txt</locationURI> + </link> + <link> + <name>STM32F30x/CMSIS</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM32F30x/STM32303C_EVAL</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_core.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_core.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_init.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_init.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_int.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_mem.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_regs.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/main.c</locationURI> + </link> + <link> + <name>User/mass_mal.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/mass_mal.c</locationURI> + </link> + <link> + <name>User/memory.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/memory.c</locationURI> + </link> + <link> + <name>User/scsi_data.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/scsi_data.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_bot.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_bot.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_endp.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_endp.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_pwr.c</locationURI> + </link> + <link> + <name>User/usb_scsi.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_scsi.c</locationURI> + </link> + <link> + <name>STM32F30x/CMSIS/system_stm32f30x.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/system_stm32f30x.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32303C_EVAL/stm32303c_eval.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM32303C_EVAL/stm32303c_eval.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32303C_EVAL/stm32303c_eval_spi_sd.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM32303C_EVAL/stm32303c_eval_spi_sd.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_adc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_adc.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_dma.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_dma.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_exti.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_exti.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_flash.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_flash.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_gpio.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_i2c.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_i2c.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_misc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_misc.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_pwr.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_rcc.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_spi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_spi.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_syscfg.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_syscfg.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_usart.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_usart.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32303C_EVAL/STM32303C_EVAL.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32303C_EVAL/STM32303C_EVAL.launch new file mode 100644 index 0000000..80853f0 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32303C_EVAL/STM32303C_EVAL.launch @@ -0,0 +1,41 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> +<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="ST-LINK over USB (SWD)"/> +<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> +<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/> +<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM32303C-Eval board"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32f10x.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="SWD"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> +<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM32303C_EVAL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32303C_EVAL"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32303C_EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32303C_EVAL/TASKING/stm32f30x.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32303C_EVAL/TASKING/stm32f30x.lsl new file mode 100644 index 0000000..3ccf590 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32303C_EVAL/TASKING/stm32f30x.lsl @@ -0,0 +1,211 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f30x.lsl +// +// Version : @(#)stm32f30x.lsl 1.1 12/07/27 +// +// Description : LSL file for the STMicroelectronics STM32F30x +// +// Copyright 2012 Altium BV +// +// Macros specific to control this LSL file +// +// __MEMORY Define this macro to suppress definition of on-chip +// memory. Must be defined when you want to define on-chip +// in your project's LSL file. +// __FLASH_SIZE Specifies the size of flash memory to be allocated +// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated +// __NO_DEFAULT_AUTO_VECTORS +// When enabled the interrupt vector table will not be +// generated +// __VECTOR_TABLE_RAM_COPY +// Define this macro to enable copying the vector table +// at startup from ROM to RAM. +// __VECTOR_TABLE_ROM_ADDR +// Specify the vector table address in ROM +// __VECTOR_TABLE_RAM_ADDR +// Specify the vector table address in RAM when the the +// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY) +// +// See arm_arch.lsl for more available macros. +// +// Notes: +// In the STM32F30x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __NO_DEFAULT_AUTO_VECTORS +// Suppress the vectors as defined arm_arch.lsl, because we define our +// own vectors for CMSIS +#define __CMSIS_VECTORS 1 +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 98 +#endif + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x20000000 +#endif + + +#ifndef __STACK +# define __STACK 6k +#endif + +#ifndef __HEAP +# define __HEAP 2k +#endif + +#include <arm_arch.lsl> + +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +// Specify default size for Flash and SRAM +#ifndef __FLASH_SIZE +# define __FLASH_SIZE 256k +#endif +#ifndef __SRAM_SIZE +# define __SRAM_SIZE 48k +#endif + +memory STM32F30x_Flash +{ + mau = 8; + type = rom; + size = __FLASH_SIZE; + map ( size = __FLASH_SIZE, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory STM32F30x_SRAM +{ + mau = 8; + type = ram; + size = __SRAM_SIZE; + priority = 2; + map ( size = __SRAM_SIZE - 8k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +memory STM32F30x_SRAM8k +{ + mau = 8; + type = ram; + size = 8k; + priority = 1; + map ( size = 8k, dest_offset=0x10000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Define the vector table for CMSIS +// +#ifdef __CMSIS_VECTORS +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + __VECTOR_TABLE_COPY_ATTRIBUTE + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); // Reset Handler + vector ( id = 2, optional, fill = "NMI_Handler" ); // NMI Handler + vector ( id = 3, optional, fill = "HardFault_Handler" ); // Hard Fault Handler + vector ( id = 4, optional, fill = "MemManage_Handler" ); // MPU Fault Handler + vector ( id = 5, optional, fill = "BusFault_Handler" ); // Bus Fault Handler + vector ( id = 6, optional, fill = "UsageFault_Handler" ); // Usage Fault Handler + vector ( id = 11, optional, fill = "SVC_Handler" ); // SVCall Handler + vector ( id = 12, optional, fill = "DebugMon_Handler" ); // Debug Monitor Handler + vector ( id = 14, optional, fill = "PendSV_Handler" ); // PendSV Handler + vector ( id = 15, optional, fill = "SysTick_Handler" ); // SysTick Handler + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandler" ); // Tamper amd TimeStanp through EXTI + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC Wakeup through the EXTI line + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash global interrupt + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC global interrupt + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 interrupt + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 interrupt + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 interrupt + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 interrupt + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 interrupt + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA1 Channel 1 global interrupt + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA1 Channel 2 global interrupt + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA1 Channel 3 global interrupt + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA1 Channel 4 global interrupt + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA1 Channel 5 global interrupt + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA1 Channel 6 global interrupt + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA1 Channel 7 global interrupt + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 global interrupts + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB Device High Priority or CAN1 TX interrupts + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB Device Low Priority or CAN1 RX0 interrupts + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 interrupt + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE interrupt + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 interrupts + vector ( id = 40, optional, fill = "TIM1_BRK_TIM15_IRQHandler" ); // TIM1 Break irq and TIM15 global interrupt + vector ( id = 41, optional, fill = "TIM1_UP_TIM16_IRQHandler" ); // TIM1 Update irq and TIM16 global interrupt + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM17_IRQHandler" ); // TIM1 Trigger and Commutation irqs and TIM17 global irq + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 global interrupt + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 global interrupt + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 global interrupt + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 global interrupt + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 global interrupt + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 global interrupt + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 global interrupt + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 global interrupt + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 interrupts + vector ( id = 57, optional, fill = "RTC_Alarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup interrupt + vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" ); // TIM8 Break interrupt + vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" ); // TIM8 Update interrupt + vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" ); // TIM8 trigger and Comm. interrupt + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare interrupt + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 global interrupt + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 global interrupt + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 global interrupt + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 global interrupt + vector ( id = 70, optional, fill = "TIM6_DAC_IRQHandler" ); // TIM6 glbl irq, DAC1 and DAC2 underrun err irqs + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 global interrupt + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel 1 global interrupt + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel 2 global interrupt + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel 3 global interrupt + vector ( id = 75, optional, fill = "DMA2_Channel4_IRQHandler" ); // DMA2 Channel 4 global interrupt + vector ( id = 76, optional, fill = "DMA2_Channel5_IRQHandler" ); // DMA2 Channel 5 global interrupt + vector ( id = 77, optional, fill = "ADC4_IRQHandler" ); // ADC4 global interrupt + vector ( id = 80, optional, fill = "COMP1_2_3_IRQHandler" ); // COMP1, COMP2 and COMP3 global interrupt + vector ( id = 81, optional, fill = "COMP4_5_6_IRQHandler" ); // COMP5, COMP6 and COMP4 global interrupt + vector ( id = 82, optional, fill = "COMP7_IRQHandler" ); // COMP7 global interrupt + vector ( id = 90, optional, fill = "USB_HP_IRQHandler" ); // USB High Priority global Interrupt remap + vector ( id = 91, optional, fill = "USB_LP_IRQHandler" ); // USB Low Priority global Interrupt remap + vector ( id = 92, optional, fill = "USBWakeUp_RMP_IRQHandler" ); // USB Wakeup Interrupt remap + vector ( id = 97, optional, fill = "FPU_IRQHandler" ); // Floating point Interrupt + } +} +#endif /* __CMSIS_VECTORS */ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152-EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152-EVAL/.cproject new file mode 100644 index 0000000..44229ae --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152-EVAL/.cproject @@ -0,0 +1,137 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?> + +<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="com.tasking.config.arm.abs.debug.2044455393"> + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.tasking.config.arm.abs.debug.2044455393" moduleId="org.eclipse.cdt.core.settings" name="Debug"> + <externalSettings/> + <extensions> + <extension id="com.tasking.managedbuilder.TASKING_ELF" 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a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152-EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152-EVAL/.project new file mode 100644 index 0000000..f7f7450 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152-EVAL/.project @@ -0,0 +1,237 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32L152-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>com.tasking.arm.TskManagedBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + <nature>com.tasking.arm.target</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + 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value="/STM32L152-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152-EVAL/TASKING/stm32l1xx_md.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152-EVAL/TASKING/stm32l1xx_md.lsl new file mode 100644 index 0000000..909c5b0 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152-EVAL/TASKING/stm32l1xx_md.lsl @@ -0,0 +1,151 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32l1xx_cmsis.lsl +// +// Version : @(#)stm32l1xx_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32l1xx.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 84 + + +#ifndef __STACK +# define __STACK 2k +#endif +#ifndef __HEAP +# define __HEAP 1k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32L1xx, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32l1xflash +{ + mau = 8; + type = rom; + size = 128k; + map ( size = 128k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32l1xram +{ + mau = 8; + type = ram; + size = 16k; + map ( size = 16k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandle" ); // Tamper + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1_IRQHandler + vector ( id = 35, optional, fill = "USB_HP_IRQHandler" ); // USB_HP_IRQHandler + vector ( id = 36, optional, fill = "USB_LP_IRQHandler" ); // USB_LP_IRQHandler + vector ( id = 37, optional, fill = "DAC_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "COMP_IRQHandler" ); // COMP_IRQHandler + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "LCD_IRQHandler" ); // LCD_IRQHandler + vector ( id = 41, optional, fill = "TIM9_IRQHandler" ); // TIM9_IRQHandler + vector ( id = 42, optional, fill = "TIM10_IRQHandler" ); // TIM10_IRQHandler + vector ( id = 43, optional, fill = "TIM11_IRQHandler" ); // TIM11_IRQHandler + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USB_FS_WKUP_IRQHandler" ); // USB_FS_WKUP_IRQHandler + vector ( id = 59, optional, fill = "TIM6_IRQHandler" ); // TIM6_IRQHandler + vector ( id = 60, optional, fill = "TIM7_IRQHandler" ); // TIM7_IRQHandler + + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152D-EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152D-EVAL/.cproject new file mode 100644 index 0000000..677ce43 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152D-EVAL/.cproject @@ -0,0 +1,139 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?> + +<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="com.tasking.config.arm.abs.debug.2044455393"> + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.tasking.config.arm.abs.debug.2044455393" moduleId="org.eclipse.cdt.core.settings" name="Debug"> + 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+</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152D-EVAL/TASKING/stm32l1xx_hd.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152D-EVAL/TASKING/stm32l1xx_hd.lsl new file mode 100644 index 0000000..77979b6 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TASKING/STM32L152D-EVAL/TASKING/stm32l1xx_hd.lsl @@ -0,0 +1,205 @@ +/////////////////////////////////////////////////////////////////////////// +// +// File : stm32l1xx.lsl +// +// Version : @(#)stm32l1xx.lsl 1.5 11/06/30 +// +// Description : LSL file for the STMicroelectronics STM32L1xx +// +// Copyright 2010-2011 Altium BV +// +// Macros specific to control this LSL file +// +// __MEMORY Define this macro to suppress definition of on-chip +// memory. Must be defined when you want to define on-chip +// in your project's LSL file. +// __FLASH_SIZE Specifies the size of flash memory to be allocated +// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated +// __EEPROM_SIZE Specifies the size of the EEPROM memory to be allocated +// __NO_DEFAULT_AUTO_VECTORS +// When enabled the interrupt vector table will not be +// generated +// __VECTOR_TABLE_RAM_COPY +// Define this macro to enable copying the vector table +// at startup from ROM to RAM. +// __VECTOR_TABLE_ROM_ADDR +// Specify the vector table address in ROM +// __VECTOR_TABLE_RAM_ADDR +// Specify the vector table address in RAM when the the +// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY) +// +// See arm_arch.lsl for more available macros. +// +// Notes: +// In the STM32L1xx, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __NO_DEFAULT_AUTO_VECTORS +// Suppress the vectors as defined arm_arch.lsl, because we define our +// own vectors for CMIS +#define __CMSIS_VECTORS 1 +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 73 +#endif + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + + +#ifndef __STACK +# define __STACK 4k +#endif + +#ifndef __HEAP +# define __HEAP 2k +#endif + +#include <arm_arch.lsl> + +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +// Specify default size for Flash and SRAM +#ifndef __FLASH_SIZE +# define __FLASH_SIZE 384k +#endif +#ifndef __SRAM_SIZE +# define __SRAM_SIZE 48k +#endif +#ifndef __EEPROM_SIZE +# define __EEPROM_SIZE 4k +#endif + +memory STM32L1xx_Flash +{ + mau = 8; + type = rom; + size = __FLASH_SIZE; + map ( size = __FLASH_SIZE, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory STM32L1xx_EEPROM +{ + mau = 8; + type = reserved rom; + size = __EEPROM_SIZE; + map ( size = __EEPROM_SIZE, dest_offset=0x08080000, dest=bus:ARM:local_bus); +} + +memory STM32L1xx_SRAM +{ + mau = 8; + type = ram; + size = __SRAM_SIZE; + map ( size = __SRAM_SIZE, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + __VECTOR_TABLE_COPY_ATTRIBUTE + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); // Reset Handler + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1_IRQHandler + vector ( id = 35, optional, fill = "USB_HP_IRQHandler" ); // USB_HP_IRQHandler + vector ( id = 36, optional, fill = "USB_LP_IRQHandler" ); // USB_LP_IRQHandler + vector ( id = 37, optional, fill = "DAC_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "COMP_IRQHandler" ); // COMP_IRQHandler + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "LCD_IRQHandler" ); // LCD_IRQHandler + vector ( id = 41, optional, fill = "TIM9_IRQHandler" ); // TIM9_IRQHandler + vector ( id = 42, optional, fill = "TIM10_IRQHandler" ); // TIM10_IRQHandler + vector ( id = 43, optional, fill = "TIM11_IRQHandler" ); // TIM11_IRQHandler + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTC_Alarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USB_FS_WKUP_IRQHandler" ); // USB_FS_WKUP_IRQHandler + vector ( id = 59, optional, fill = "TIM6_IRQHandler" ); // TIM6_IRQHandler + vector ( id = 60, optional, fill = "TIM7_IRQHandler" ); // TIM7_IRQHandler + vector ( id = 61, optional, fill = "SDIO_IRQHandler" ); // SDIO_IRQHandler + vector ( id = 62, optional, fill = "TIM5_IRQHandler" ); //TIM5_IRQHandler + vector ( id = 63, optional, fill = "SPI3_IRQHandler" ); //SPI3_IRQHandler + vector ( id = 64, optional, fill = "UART4_IRQHandler" ); //UART4_IRQHandler + vector ( id = 65, optional, fill = "UART5_IRQHandler" ); //UART5_IRQHandler + vector ( id = 66, optional, fill = "DMA2_Channel1_IRQHandler" ); //DMA2_Channel1_IRQHandler + vector ( id = 67, optional, fill = "DMA2_Channel2_IRQHandler" ); //DMA2_Channel2_IRQHandler + vector ( id = 68, optional, fill = "DMA2_Channel3_IRQHandler" ); //DMA2_Channel3_IRQHandler + vector ( id = 69, optional, fill = "DMA2_Channel4_IRQHandler" ); //DMA2_Channel4_IRQHandler + vector ( id = 70, optional, fill = "DMA2_Channel5_IRQHandler" ); //DMA2_Channel5_IRQHandler + vector ( id = 71, optional, fill = "AES_IRQHandler" ); //AES_IRQHandler + vector ( id = 72, optional, fill = "COMP_ACQ_IRQHandler" ); //Comparator Channel Acquisition + + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..2ef1e92 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 15:57:46 GMT+01:00 2012 +BOARD=STM3210B-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103VB +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210B-EVAL/STM3210B-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210B-EVAL/STM3210B-EVAL.elf.launch new file mode 100644 index 0000000..796c55b --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210B-EVAL/STM3210B-EVAL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Reset to known state monitor reset # Start the executable. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="8"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="8000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="C:\VSS\BARRACUDA\INTRODUCTION PACKAGE\FIRMWARE\STM32_USB-FS-Device_Lib\Project\Mass_Storage\TrueSTUDIO\STM3210B-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM3210B-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210B-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210B-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210E-EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210E-EVAL/.project new file mode 100644 index 0000000..43c9344 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210E-EVAL/.project @@ -0,0 +1,290 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM3210E-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?children?</key> + <value>?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\||</value> + </dictionary> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210E-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM3210E_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f10x.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/readme.txt</locationURI> + </link> + <link> + <name>STM3210E_EVAL/stm3210e_eval.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval.c</locationURI> + </link> + <link> + <name>STM3210E_EVAL/stm3210e_eval_sdio_sd.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval_sdio_sd.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_dma.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_exti.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_flash.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_fsmc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_sdio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_spi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_usart.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f10x_hd.s</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F10x/Source/Templates/TrueSTUDIO/startup_stm32f10x_hd.s</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_core.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_core.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_init.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_init.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_int.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_mem.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_regs.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/fsmc_nand.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/fsmc_nand.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/main.c</locationURI> + </link> + <link> + <name>User/mass_mal.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/mass_mal.c</locationURI> + </link> + <link> + <name>User/memory.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/memory.c</locationURI> + </link> + <link> + <name>User/nand_if.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/nand_if.c</locationURI> + </link> + <link> + <name>User/scsi_data.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/scsi_data.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_bot.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_bot.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_endp.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_endp.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_pwr.c</locationURI> + </link> + <link> + <name>User/usb_scsi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_scsi.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..5c1a494 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 15:58:30 GMT+01:00 2012 +BOARD=STM3210E-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZE +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210E-EVAL_XL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210E-EVAL_XL/.project new file mode 100644 index 0000000..bbcbc81 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM3210E-EVAL_XL/.project @@ -0,0 +1,286 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM3210E-EVAL_XL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM32F103ZG/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> 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<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_init.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_int.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_mem.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_regs.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/main.c</locationURI> + </link> + <link> + <name>User/mass_mal.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/mass_mal.c</locationURI> + </link> + <link> + <name>User/memory.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/memory.c</locationURI> + </link> + <link> + <name>User/scsi_data.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/scsi_data.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_bot.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_bot.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_endp.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_endp.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_pwr.c</locationURI> + </link> + <link> + <name>User/usb_scsi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_scsi.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32303C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32303C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..11c9ee7 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32303C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Thu Dec 13 17:37:51 GMT+01:00 2012 +BOARD=STM32303C-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F303VC +MCU_VENDOR=STMicroelectronics +MODEL=Pro +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=ARM\u00AE +VERSION=3.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32303C-EVAL/STM32303C-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32303C-EVAL/STM32303C-EVAL.elf.launch new file mode 100644 index 0000000..53aeace --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32303C-EVAL/STM32303C-EVAL.elf.launch @@ -0,0 +1,40 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Start the executable continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Set a breakpoint at main(). tbreak main # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="72"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="72000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # The executable starts automatically"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="E:\SVN\STM32_USB-FS-Device_Lib\Projects\Custom_HID\TrueSTUDIO\STM32303C-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32303C-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32303C-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32303C-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32303C-EVAL/STM32F303VC_FLASH.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32303C-EVAL/STM32F303VC_FLASH.ld new file mode 100644 index 0000000..c0e7344 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32303C-EVAL/STM32F303VC_FLASH.ld @@ -0,0 +1,190 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F303VC Device with +** 256KByte FLASH, 40KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2000a000; /* end of 40K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x200; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K + CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 8K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + _siccmram = LOADADDR(.ccmram); + + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; /* create a global symbol at ccmram start */ + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; /* create a global symbol at ccmram end */ + } >CCMRAM AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* 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<value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210E-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32373C_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f37x.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/system_stm32f37x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Custom_HID/readme.txt</locationURI> + </link> + <link> + <name>STM32373C_EVAL/stm32373c_eval.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM32373C_EVAL/stm32373c_eval.c</locationURI> + </link> + <link> + <name>STM32373C_EVAL/stm32373c_eval_spi_sd.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM32373C_EVAL/stm32373c_eval_spi_sd.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_adc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_adc.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_can.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_can.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_cec.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_cec.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_comp.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_comp.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_crc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_crc.c</locationURI> + </link> + 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<name>STM32F37x_StdPeriph_Driver/stm32f37x_syscfg.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_syscfg.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_tim.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_tim.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_usart.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_usart.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_wwdg.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_wwdg.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f37x.s</name> + <type>1</type> + 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<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/main.c</locationURI> + </link> + <link> + <name>User/mass_mal.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/mass_mal.c</locationURI> + </link> + <link> + <name>User/memory.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/memory.c</locationURI> + </link> + <link> + <name>User/scsi_data.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/scsi_data.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_bot.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_bot.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_endp.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_endp.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_pwr.c</locationURI> + </link> + <link> + <name>User/usb_scsi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_scsi.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32373C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32373C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..ab00129 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32373C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Thu Dec 13 17:34:36 GMT+01:00 2012 +BOARD=STM32373C-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F373VC +MCU_VENDOR=STMicroelectronics +MODEL=Pro +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=ARM\u00AE +VERSION=3.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32373C-EVAL/STM32373C-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32373C-EVAL/STM32373C-EVAL.elf.launch new file mode 100644 index 0000000..734d809 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32373C-EVAL/STM32373C-EVAL.elf.launch @@ -0,0 +1,40 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Start the executable continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Set a breakpoint at main(). tbreak main # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="72"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="72000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # The executable starts automatically"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="E:\SVN\STM32_USB-FS-Device_Lib\Projects\Custom_HID\TrueSTUDIO\STM32373C-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32373C-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32373C-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32373C-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32373C-EVAL/STM32F373VC_FLASH.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32373C-EVAL/STM32F373VC_FLASH.ld new file mode 100644 index 0000000..35c7d30 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32373C-EVAL/STM32F373VC_FLASH.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F373VC Device with +** 256KByte FLASH, 32KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20008000; /* end of 32K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x100; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152-EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152-EVAL/.project new file mode 100644 index 0000000..3e3424c --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152-EVAL/.project @@ -0,0 +1,271 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32L152-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210B-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32L152_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_STM32L1xx.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/system_STM32L1xx.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/readme.txt</locationURI> + </link> + <link> + <name>STM32L152_EVAL/stm32l152_eval.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM32L152_EVAL/stm32l152_eval.c</locationURI> + </link> + <link> + <name>STM32L152_EVAL/stm32l152_eval_spi_sd.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM32L152_EVAL/stm32l152_eval_spi_sd.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_dma.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_dma.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_exti.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_exti.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_flash.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_flash.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_gpio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_gpio.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_rcc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_rcc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_spi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_spi.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_usart.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_usart.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_syscfg.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_syscfg.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_STM32L1xx_md.s</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32L1xx/Source/Templates/TrueSTUDIO/startup_STM32L1xx_md.s</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_core.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_core.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_init.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_init.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_int.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_mem.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_regs.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/main.c</locationURI> + </link> + <link> + <name>User/mass_mal.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/mass_mal.c</locationURI> + </link> + <link> + <name>User/memory.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/memory.c</locationURI> + </link> + <link> + <name>User/scsi_data.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/scsi_data.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_bot.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_bot.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_endp.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_endp.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_pwr.c</locationURI> + </link> + <link> + <name>User/usb_scsi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Mass_Storage/src/usb_scsi.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..0ac9ecd --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 15:59:01 GMT+01:00 2012 +BOARD=STM32L152-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32L152VB +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152-EVAL/STM32L152-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152-EVAL/STM32L152-EVAL.elf.launch new file mode 100644 index 0000000..5cc41ea --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152-EVAL/STM32L152-EVAL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Reset to known state monitor reset # Start the executable. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" 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+</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152D-EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152D-EVAL/.cproject new file mode 100644 index 0000000..3726f75 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152D-EVAL/.cproject @@ -0,0 +1,267 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?> + +<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="com.atollic.truestudio.exe.debug.316348137"> + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.atollic.truestudio.exe.debug.316348137" moduleId="org.eclipse.cdt.core.settings" name="Debug"> + <externalSettings> + <externalSetting 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<globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32L152D-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32L152D-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32L152D-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152D-EVAL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152D-EVAL/stm32_flash.ld new file mode 100644 index 0000000..0d8b7b3 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/TrueSTUDIO/STM32L152D-EVAL/stm32_flash.ld @@ -0,0 +1,171 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for stm32l1xx_hd Device with +** 384KByte FLASH, 48KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2000BFF8; + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x800; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 48K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/fsmc_nand.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/fsmc_nand.h new file mode 100644 index 0000000..9bdee98 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/fsmc_nand.h @@ -0,0 +1,112 @@ +/** + ****************************************************************************** + * @file fsmc_nand.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Header for fsmc_nand.c file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __FSMC_NAND_H +#define __FSMC_NAND_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/* Exported types ------------------------------------------------------------*/ +typedef struct +{ + uint8_t Maker_ID; + uint8_t Device_ID; + uint8_t Third_ID; + uint8_t Fourth_ID; +}NAND_IDTypeDef; + +typedef struct +{ + uint16_t Zone; + uint16_t Block; + uint16_t Page; +} NAND_ADDRESS; + +/* Exported constants --------------------------------------------------------*/ +/* NAND Area definition for STM3210E-EVAL Board RevD */ +#define CMD_AREA (uint32_t)(1<<16) /* A16 = CLE high */ +#define ADDR_AREA (uint32_t)(1<<17) /* A17 = ALE high */ + +#define DATA_AREA ((uint32_t)0x00000000) + +/* FSMC NAND memory command */ +#define NAND_CMD_AREA_A ((uint8_t)0x00) +#define NAND_CMD_AREA_B ((uint8_t)0x01) +#define NAND_CMD_AREA_C ((uint8_t)0x50) +#define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30) + +#define NAND_CMD_WRITE0 ((uint8_t)0x80) +#define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10) + +#define NAND_CMD_ERASE0 ((uint8_t)0x60) +#define NAND_CMD_ERASE1 ((uint8_t)0xD0) + +#define NAND_CMD_READID ((uint8_t)0x90) +#define NAND_CMD_STATUS ((uint8_t)0x70) +#define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A) +#define NAND_CMD_RESET ((uint8_t)0xFF) + +/* NAND memory status */ +#define NAND_VALID_ADDRESS ((uint32_t)0x00000100) +#define NAND_INVALID_ADDRESS ((uint32_t)0x00000200) +#define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400) +#define NAND_BUSY ((uint32_t)0x00000000) +#define NAND_ERROR ((uint32_t)0x00000001) +#define NAND_READY ((uint32_t)0x00000040) + +/* FSMC NAND memory parameters */ +#define NAND_PAGE_SIZE ((uint16_t)0x0200) /* 512 bytes per page w/o Spare Area */ +#define NAND_BLOCK_SIZE ((uint16_t)0x0020) /* 32x512 bytes pages per block */ +#define NAND_ZONE_SIZE ((uint16_t)0x0400) /* 1024 Block per zone */ +#define NAND_SPARE_AREA_SIZE ((uint16_t)0x0010) /* last 16 bytes as spare area */ +#define NAND_MAX_ZONE ((uint16_t)0x0004) /* 4 zones of 1024 block */ + +/* FSMC NAND memory address computation */ +#define ADDR_1st_CYCLE(ADDR) (uint8_t)((ADDR)& 0xFF) /* 1st addressing cycle */ +#define ADDR_2nd_CYCLE(ADDR) (uint8_t)(((ADDR)& 0xFF00) >> 8) /* 2nd addressing cycle */ +#define ADDR_3rd_CYCLE(ADDR) (uint8_t)(((ADDR)& 0xFF0000) >> 16) /* 3rd addressing cycle */ +#define ADDR_4th_CYCLE(ADDR) (uint8_t)(((ADDR)& 0xFF000000) >> 24) /* 4th addressing cycle */ + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void FSMC_NAND_Init(void); +void FSMC_NAND_ReadID(NAND_IDTypeDef* NAND_ID); +uint32_t FSMC_NAND_WriteSmallPage(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumPageToWrite); +uint32_t FSMC_NAND_ReadSmallPage (uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumPageToRead); +uint32_t FSMC_NAND_WriteSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaTowrite); +uint32_t FSMC_NAND_ReadSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaToRead); +uint32_t FSMC_NAND_EraseBlock(NAND_ADDRESS Address); +uint32_t FSMC_NAND_Reset(void); +uint32_t FSMC_NAND_GetStatus(void); +uint32_t FSMC_NAND_ReadStatus(void); +uint32_t FSMC_NAND_AddressIncrement(NAND_ADDRESS* Address); + +#endif /* __FSMC_NAND_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/hw_config.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/hw_config.h new file mode 100644 index 0000000..16882c5 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/hw_config.h @@ -0,0 +1,64 @@ +/** + ****************************************************************************** + * @file hw_config.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Hardware Configuration & Setup + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __HW_CONFIG_H +#define __HW_CONFIG_H + +/* Includes ------------------------------------------------------------------*/ + +#include "platform_config.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported define -----------------------------------------------------------*/ +#define BULK_MAX_PACKET_SIZE 0x00000040 + +/* Exported functions ------------------------------------------------------- */ +void Set_System(void); +void Set_USBClock(void); +void Enter_LowPowerMode(void); +void Leave_LowPowerMode(void); +void USB_Interrupts_Config(void); +void Led_Config(void); +void Led_RW_ON(void); +void Led_RW_OFF(void); +void USB_Configured_LED(void); +void USB_NotConfigured_LED(void); +void USB_Cable_Config (FunctionalState NewState); +void Get_SerialNum(void); +void MAL_Config(void); +#if !defined (USE_STM32L152_EVAL) +void USB_Disconnect_Config(void); +#endif /* (USE_STM32L152_EVAL) */ +/* External variables --------------------------------------------------------*/ + +#endif /*__HW_CONFIG_H*/ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/mass_mal.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/mass_mal.h new file mode 100644 index 0000000..4374449 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/mass_mal.h @@ -0,0 +1,49 @@ +/** + ****************************************************************************** + * @file mass_mal.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Header for mass_mal.c file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MASS_MAL_H +#define __MASS_MAL_H + +/* Includes ------------------------------------------------------------------*/ +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +#define MAL_OK 0 +#define MAL_FAIL 1 +#define MAX_LUN 1 + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +uint16_t MAL_Init (uint8_t lun); +uint16_t MAL_GetStatus (uint8_t lun); +uint16_t MAL_Read(uint8_t lun, uint32_t Memory_Offset, uint32_t *Readbuff, uint16_t Transfer_Length); +uint16_t MAL_Write(uint8_t lun, uint32_t Memory_Offset, uint32_t *Writebuff, uint16_t Transfer_Length); +#endif /* __MASS_MAL_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/memory.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/memory.h new file mode 100644 index 0000000..3cc19a7 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/memory.h @@ -0,0 +1,46 @@ +/** + ****************************************************************************** + * @file memory.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Memory management layer + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __memory_H +#define __memory_H + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +#define TXFR_IDLE 0 +#define TXFR_ONGOING 1 + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void Write_Memory (uint8_t lun, uint32_t Memory_Offset, uint32_t Transfer_Length); +void Read_Memory (uint8_t lun, uint32_t Memory_Offset, uint32_t Transfer_Length); +#endif /* __memory_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/platform_config.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/platform_config.h new file mode 100644 index 0000000..ac73393 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/platform_config.h @@ -0,0 +1,182 @@ +/** + ****************************************************************************** + * @file platform_config.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Evaluation board specific configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __PLATFORM_CONFIG_H +#define __PLATFORM_CONFIG_H + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + #include "stm32l1xx.h" + + #if defined (USE_STM32L152_EVAL) + #include "stm32l152_eval.h" + #include "stm32l152_eval_spi_sd.h" + +#elif defined (USE_STM32L152D_EVAL) + #include "stm32l152d_eval_sdio_sd.h" + #include "stm32l152d_eval.h" + +#else + #error "Missing define: USE_STM32L152_EVAL or USE_STM32L152D_EVAL" + #endif /* USE_STM32L152_EVAL */ + +#elif defined (STM32F10X_MD) || defined (STM32F10X_HD) || defined (STM32F10X_XL) + #include "stm32f10x.h" + #if defined (USE_STM3210B_EVAL) + #include "stm3210b_eval.h" + #include "stm3210b_eval_spi_sd.h" + #elif defined (USE_STM3210E_EVAL) + #include "stm3210e_eval_sdio_sd.h" + #include "stm3210e_eval.h" + #include "fsmc_nand.h" + #include "nand_if.h" + #else + #error "Missing define: USE_STM3210B_EVAL or USE_STM3210E_EVAL" + #endif /* USE_STM3210B_EVAL */ + +#elif defined (USE_STM32373C_EVAL) + #include "stm32f37x.h" + #include "stm32373c_eval.h" + #include "stm32373c_eval_spi_sd.h" + +#elif defined (USE_STM32303C_EVAL) + #include "stm32f30x.h" + #include "stm32303c_eval.h" + #include "stm32303c_eval_spi_sd.h" +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line corresponding to the STMicroelectronics evaluation board + used to run the example */ +#if !defined (USE_STM3210B_EVAL) && !defined (USE_STM3210E_EVAL) && !defined (USE_STM32L152_EVAL) && !defined (USE_STM32L152D_EVAL) && !defined (USE_STM32373C_EVAL) && !defined (USE_STM32303C_EVAL) +//#define USE_STM3210B_EVAL +//#define USE_STM3210E_EVAL +//#define USE_STM32L152_EVAL +//#define USE_STM32L152D_EVAL +//#define (USE_STM32373C_EVAL) +#define (USE_STM32303C_EVAL) +#endif + +/*Unique Devices IDs register set*/ + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD) || defined(STM32L1XX_MD_PLUS) + +#define ID1 (0x1FF80050) +#define ID2 (0x1FF80054) +#define ID3 (0x1FF80064) + +#elif defined (STM32F37X) || defined(STM32F30X) + +#define ID1 (0x1FFFF7AC) +#define ID2 (0x1FFFF7B0) +#define ID3 (0x1FFFF7B4) + +#else /*STM32F1x*/ + +#define ID1 (0x1FFFF7E8) +#define ID2 (0x1FFFF7EC) +#define ID3 (0x1FFFF7F0) + +#endif + +#define RCC_AHBPeriph_ALLGPIO (RCC_AHBPeriph_GPIOA \ + | RCC_AHBPeriph_GPIOB \ + | RCC_AHBPeriph_GPIOC \ + | RCC_AHBPeriph_GPIOD \ + | RCC_AHBPeriph_GPIOE \ + | RCC_AHBPeriph_GPIOF ) + +/* Define the STM32F10x hardware depending on the used evaluation board */ +#ifdef USE_STM3210B_EVAL + + #define USB_DISCONNECT GPIOD + #define USB_DISCONNECT_PIN GPIO_Pin_9 + #define RCC_APB2Periph_GPIO_DISCONNECT RCC_APB2Periph_GPIOD + +#elif defined (USE_STM3210E_EVAL) + + #define USB_DISCONNECT GPIOB + #define USB_DISCONNECT_PIN GPIO_Pin_14 + #define RCC_APB2Periph_GPIO_DISCONNECT RCC_APB2Periph_GPIOB + +#elif defined (USE_STM32L152_EVAL) + /* + For STM32L15xx devices it is possible to use the internal USB pullup + controlled by register SYSCFG_PMC (refer to RM0038 reference manual for + more details). + It is also possible to use external pullup (and disable the internal pullup) + by setting the define USB_USE_EXTERNAL_PULLUP in file platform_config.h + and configuring the right pin to be used for the external pull up configuration. + To have more details on how to use an external pull up, please refer to + STM3210E-EVAL evaluation board manuals. + */ + /* Uncomment the following define to use an external pull up instead of the + integrated STM32L15xx internal pull up. In this case make sure to set up + correctly the external required hardware and the GPIO defines below.*/ +/* #define USB_USE_EXTERNAL_PULLUP */ + + #if !defined(USB_USE_EXTERNAL_PULLUP) + #define STM32L15_USB_CONNECT SYSCFG_USBPuCmd(ENABLE) + #define STM32L15_USB_DISCONNECT SYSCFG_USBPuCmd(DISABLE) + + #elif defined(USB_USE_EXTERNAL_PULLUP) + /* PA0 is chosen just as illustrating example, you should modify the defines + below according to your hardware configuration. */ + #define USB_DISCONNECT GPIOA + #define USB_DISCONNECT_PIN GPIO_Pin_0 + #define RCC_AHBPeriph_GPIO_DISCONNECT RCC_AHBPeriph_GPIOA + #define STM32L15_USB_CONNECT GPIO_ResetBits(USB_DISCONNECT, USB_DISCONNECT_PIN) + #define STM32L15_USB_DISCONNECT GPIO_SetBits(USB_DISCONNECT, USB_DISCONNECT_PIN) + #endif /* USB_USE_EXTERNAL_PULLUP */ + +#elif defined (USE_STM32L152D_EVAL) + + #define USB_DISCONNECT GPIOE + #define USB_DISCONNECT_PIN GPIO_Pin_6 + #define RCC_AHBPeriph_GPIO_DISCONNECT RCC_AHBPeriph_GPIOE + +#elif defined (USE_STM32373C_EVAL) + + #define USB_DISCONNECT GPIOC + #define USB_DISCONNECT_PIN GPIO_Pin_5 + #define RCC_AHBPeriph_GPIO_DISCONNECT RCC_AHBPeriph_GPIOC + +#elif defined (USE_STM32303C_EVAL) + + #define USB_DISCONNECT GPIOB + #define USB_DISCONNECT_PIN GPIO_Pin_8 + #define RCC_AHBPeriph_GPIO_DISCONNECT RCC_AHBPeriph_GPIOB +#endif /* USE_STM3210B_EVAL */ + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +#endif /* __PLATFORM_CONFIG_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32_it.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32_it.h new file mode 100644 index 0000000..fb3e1c7 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32_it.h @@ -0,0 +1,61 @@ +/** + ****************************************************************************** + * @file stm32_it.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32_IT_H +#define __STM32_IT_H + +/* Includes ------------------------------------------------------------------*/ +#include "platform_config.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +void USB_HP_CAN1_TX_IRQHandler(void); +void USB_LP_CAN1_RX0_IRQHandler(void); + +#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) +void SDIO_IRQHandler(void); +void SD_SDIO_DMA_IRQHANDLER(void); +#endif /* STM32F10X_HD | STM32F10X_XL */ + +#endif /* __STM32_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32f10x_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32f10x_conf.h new file mode 100644 index 0000000..e08299d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32f10x_conf.h @@ -0,0 +1,85 @@ +/** + ****************************************************************************** + * @file stm32f10x_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CONF_H +#define __STM32F10x_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment the line below to enable peripheral header file inclusion */ +#include "stm32f10x_adc.h" +#include "stm32f10x_bkp.h" +#include "stm32f10x_can.h" +#include "stm32f10x_crc.h" +#include "stm32f10x_dac.h" +#include "stm32f10x_dbgmcu.h" +#include "stm32f10x_dma.h" +#include "stm32f10x_exti.h" +#include "stm32f10x_flash.h" +#include "stm32f10x_fsmc.h" +#include "stm32f10x_gpio.h" +#include "stm32f10x_i2c.h" +#include "stm32f10x_iwdg.h" +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" +#include "stm32f10x_rtc.h" +#include "stm32f10x_sdio.h" +#include "stm32f10x_spi.h" +#include "stm32f10x_tim.h" +#include "stm32f10x_usart.h" +#include "stm32f10x_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/******************************************************************************* +* Macro Name : assert_param +* Description : The assert_param macro is used for function's parameters check. +* Input : - expr: If expr is false, it calls assert_failed function +* which reports the name of the source file and the source +* line number of the call that failed. +* If expr is true, it returns no value. +* Return : None +*******************************************************************************/ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F10x_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32f30x_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32f30x_conf.h new file mode 100644 index 0000000..e716105 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32f30x_conf.h @@ -0,0 +1,82 @@ +/** + ****************************************************************************** + * @file stm32f30x_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F30X_CONF_H +#define __STM32F30X_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Comment the line below to disable peripheral header file inclusion */ +#include "stm32f30x_adc.h" +#include "stm32f30x_can.h" +#include "stm32f30x_crc.h" +#include "stm32f30x_comp.h" +#include "stm32f30x_dac.h" +#include "stm32f30x_dbgmcu.h" +#include "stm32f30x_dma.h" +#include "stm32f30x_exti.h" +#include "stm32f30x_flash.h" +#include "stm32f30x_gpio.h" +#include "stm32f30x_syscfg.h" +#include "stm32f30x_i2c.h" +#include "stm32f30x_iwdg.h" +#include "stm32f30x_opamp.h" +#include "stm32f30x_pwr.h" +#include "stm32f30x_rcc.h" +#include "stm32f30x_rtc.h" +#include "stm32f30x_spi.h" +#include "stm32f30x_tim.h" +#include "stm32f30x_usart.h" +#include "stm32f30x_wwdg.h" +#include "stm32f30x_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F30X_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32f37x_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32f37x_conf.h new file mode 100644 index 0000000..3d39101 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/stm32f37x_conf.h @@ -0,0 +1,83 @@ +/** + ****************************************************************************** + * @file stm32f37x_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F37X_CONF_H +#define __STM32F37X_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Comment the line below to disable peripheral header file inclusion */ +#include "stm32f37x_adc.h" +#include "stm32f37x_can.h" +#include "stm32f37x_cec.h" +#include "stm32f37x_crc.h" +#include "stm32f37x_comp.h" +#include "stm32f37x_dac.h" +#include "stm32f37x_dbgmcu.h" +#include "stm32f37x_dma.h" +#include "stm32f37x_exti.h" +#include "stm32f37x_flash.h" +#include "stm32f37x_gpio.h" +#include "stm32f37x_syscfg.h" +#include "stm32f37x_i2c.h" +#include "stm32f37x_iwdg.h" +#include "stm32f37x_pwr.h" +#include "stm32f37x_rcc.h" +#include "stm32f37x_rtc.h" +#include "stm32f37x_sdadc.h" +#include "stm32f37x_spi.h" +#include "stm32f37x_tim.h" +#include "stm32f37x_usart.h" +#include "stm32f37x_wwdg.h" +#include "stm32f37x_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F37X_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_desc.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_desc.h new file mode 100644 index 0000000..47d20f6 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_desc.h @@ -0,0 +1,62 @@ +/** + ****************************************************************************** + * @file usb_desc.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Descriptor Header for Mass Storage Device + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_DESC_H +#define __USB_DESC_H + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported define -----------------------------------------------------------*/ +#define MASS_SIZ_DEVICE_DESC 18 +#define MASS_SIZ_CONFIG_DESC 32 + +#define MASS_SIZ_STRING_LANGID 4 +#define MASS_SIZ_STRING_VENDOR 38 +#define MASS_SIZ_STRING_PRODUCT 38 +#define MASS_SIZ_STRING_SERIAL 26 +#define MASS_SIZ_STRING_INTERFACE 16 + +/* Exported functions ------------------------------------------------------- */ +extern const uint8_t MASS_DeviceDescriptor[MASS_SIZ_DEVICE_DESC]; +extern const uint8_t MASS_ConfigDescriptor[MASS_SIZ_CONFIG_DESC]; + +extern const uint8_t MASS_StringLangID[MASS_SIZ_STRING_LANGID]; +extern const uint8_t MASS_StringVendor[MASS_SIZ_STRING_VENDOR]; +extern const uint8_t MASS_StringProduct[MASS_SIZ_STRING_PRODUCT]; +extern uint8_t MASS_StringSerial[MASS_SIZ_STRING_SERIAL]; +extern const uint8_t MASS_StringInterface[MASS_SIZ_STRING_INTERFACE]; + +#endif /* __USB_DESC_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_prop.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_prop.h new file mode 100644 index 0000000..ba3e0ab --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_prop.h @@ -0,0 +1,72 @@ +/** + ****************************************************************************** + * @file usb_prop.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief All processing related to Mass Storage Demo (Endpoint 0) + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_PROP_H +#define __USB_PROP_H + +/* Includes ------------------------------------------------------------------*/ +/* Exported types ------------------------------------------------------------*/ + +/* Exported constants --------------------------------------------------------*/ +#define Mass_Storage_GetConfiguration NOP_Process +/* #define Mass_Storage_SetConfiguration NOP_Process*/ +#define Mass_Storage_GetInterface NOP_Process +#define Mass_Storage_SetInterface NOP_Process +#define Mass_Storage_GetStatus NOP_Process +/* #define Mass_Storage_ClearFeature NOP_Process*/ +#define Mass_Storage_SetEndPointFeature NOP_Process +#define Mass_Storage_SetDeviceFeature NOP_Process +/*#define Mass_Storage_SetDeviceAddress NOP_Process*/ + +/* MASS Storage Requests*/ +#define GET_MAX_LUN 0xFE +#define MASS_STORAGE_RESET 0xFF +#define LUN_DATA_LENGTH 1 + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void MASS_init(void); +void MASS_Reset(void); +void Mass_Storage_SetConfiguration(void); +void Mass_Storage_ClearFeature(void); +void Mass_Storage_SetDeviceAddress (void); +void MASS_Status_In (void); +void MASS_Status_Out (void); +RESULT MASS_Data_Setup(uint8_t); +RESULT MASS_NoData_Setup(uint8_t); +RESULT MASS_Get_Interface_Setting(uint8_t Interface, uint8_t AlternateSetting); +uint8_t *MASS_GetDeviceDescriptor(uint16_t ); +uint8_t *MASS_GetConfigDescriptor(uint16_t); +uint8_t *MASS_GetStringDescriptor(uint16_t); +uint8_t *Get_Max_Lun(uint16_t Length); + + +#endif /* __USB_PROP_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_pwr.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_pwr.h new file mode 100644 index 0000000..149dc04 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_pwr.h @@ -0,0 +1,73 @@ +/** + ****************************************************************************** + * @file usb_pwr.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Connection/disconnection & power management header + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_PWR_H +#define __USB_PWR_H +/* Includes ------------------------------------------------------------------*/ +#include "usb_core.h" +#include "usb_type.h" + +/* Exported types ------------------------------------------------------------*/ +typedef enum _RESUME_STATE +{ + RESUME_EXTERNAL, + RESUME_INTERNAL, + RESUME_LATER, + RESUME_WAIT, + RESUME_START, + RESUME_ON, + RESUME_OFF, + RESUME_ESOF +} RESUME_STATE; + +typedef enum _DEVICE_STATE +{ + UNCONNECTED, + ATTACHED, + POWERED, + SUSPENDED, + ADDRESSED, + CONFIGURED +} DEVICE_STATE; + +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void Suspend(void); +void Resume_Init(void); +void Resume(RESUME_STATE eResumeSetVal); +RESULT PowerOn(void); +RESULT PowerOff(void); + +/* External variables --------------------------------------------------------*/ +extern __IO uint32_t bDeviceState; /* USB device status */ +extern __IO bool fSuspendEnabled; /* true when suspend is possible */ + +#endif /*__USB_PWR_H*/ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_scsi.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_scsi.h new file mode 100644 index 0000000..5c4d46f --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/inc/usb_scsi.h @@ -0,0 +1,154 @@ +/** + ****************************************************************************** + * @file usb_scsi.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief All processing related to the SCSI commands + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_SCSI_H +#define __USB_SCSI_H + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +#include "usb_type.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* SCSI Commands */ +#define SCSI_FORMAT_UNIT 0x04 +#define SCSI_INQUIRY 0x12 +#define SCSI_MODE_SELECT6 0x15 +#define SCSI_MODE_SELECT10 0x55 +#define SCSI_MODE_SENSE6 0x1A +#define SCSI_MODE_SENSE10 0x5A +#define SCSI_ALLOW_MEDIUM_REMOVAL 0x1E +#define SCSI_READ6 0x08 +#define SCSI_READ10 0x28 +#define SCSI_READ12 0xA8 +#define SCSI_READ16 0x88 + +#define SCSI_READ_CAPACITY10 0x25 +#define SCSI_READ_CAPACITY16 0x9E + +#define SCSI_REQUEST_SENSE 0x03 +#define SCSI_START_STOP_UNIT 0x1B +#define SCSI_TEST_UNIT_READY 0x00 +#define SCSI_WRITE6 0x0A +#define SCSI_WRITE10 0x2A +#define SCSI_WRITE12 0xAA +#define SCSI_WRITE16 0x8A + +#define SCSI_VERIFY10 0x2F +#define SCSI_VERIFY12 0xAF +#define SCSI_VERIFY16 0x8F + +#define SCSI_SEND_DIAGNOSTIC 0x1D +#define SCSI_READ_FORMAT_CAPACITIES 0x23 + +#define NO_SENSE 0 +#define RECOVERED_ERROR 1 +#define NOT_READY 2 +#define MEDIUM_ERROR 3 +#define HARDWARE_ERROR 4 +#define ILLEGAL_REQUEST 5 +#define UNIT_ATTENTION 6 +#define DATA_PROTECT 7 +#define BLANK_CHECK 8 +#define VENDOR_SPECIFIC 9 +#define COPY_ABORTED 10 +#define ABORTED_COMMAND 11 +#define VOLUME_OVERFLOW 13 +#define MISCOMPARE 14 + + +#define INVALID_COMMAND 0x20 +#define INVALID_FIELED_IN_COMMAND 0x24 +#define PARAMETER_LIST_LENGTH_ERROR 0x1A +#define INVALID_FIELD_IN_PARAMETER_LIST 0x26 +#define ADDRESS_OUT_OF_RANGE 0x21 +#define MEDIUM_NOT_PRESENT 0x3A +#define MEDIUM_HAVE_CHANGED 0x28 + +#define READ_FORMAT_CAPACITY_DATA_LEN 0x0C +#define READ_CAPACITY10_DATA_LEN 0x08 +#define MODE_SENSE10_DATA_LEN 0x08 +#define MODE_SENSE6_DATA_LEN 0x04 +#define REQUEST_SENSE_DATA_LEN 0x12 +#define STANDARD_INQUIRY_DATA_LEN 0x24 +#define BLKVFY 0x04 + +extern uint8_t Page00_Inquiry_Data[]; +extern uint8_t Standard_Inquiry_Data[]; +extern uint8_t Standard_Inquiry_Data2[]; +extern uint8_t Mode_Sense6_data[]; +extern uint8_t Mode_Sense10_data[]; +extern uint8_t Scsi_Sense_Data[]; +extern uint8_t ReadCapacity10_Data[]; +extern uint8_t ReadFormatCapacity_Data []; + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void SCSI_Inquiry_Cmd(uint8_t lun); +void SCSI_ReadFormatCapacity_Cmd(uint8_t lun); +void SCSI_ReadCapacity10_Cmd(uint8_t lun); +void SCSI_RequestSense_Cmd (uint8_t lun); +void SCSI_Start_Stop_Unit_Cmd(uint8_t lun); +void SCSI_ModeSense6_Cmd (uint8_t lun); +void SCSI_ModeSense10_Cmd (uint8_t lun); +void SCSI_Write10_Cmd(uint8_t lun , uint32_t LBA , uint32_t BlockNbr); +void SCSI_Read10_Cmd(uint8_t lun , uint32_t LBA , uint32_t BlockNbr); +void SCSI_Verify10_Cmd(uint8_t lun); + +void SCSI_Invalid_Cmd(uint8_t lun); +void SCSI_Valid_Cmd(uint8_t lun); +bool SCSI_Address_Management(uint8_t lun , uint8_t Cmd , uint32_t LBA , uint32_t BlockNbr); + +void Set_Scsi_Sense_Data(uint8_t lun , uint8_t Sens_Key, uint8_t Asc); +void SCSI_TestUnitReady_Cmd (uint8_t lun); +void SCSI_Format_Cmd (uint8_t lun); + +//#define SCSI_TestUnitReady_Cmd SCSI_Valid_Cmd +#define SCSI_Prevent_Removal_Cmd SCSI_Valid_Cmd + +/* Invalid (Unsupported) commands */ +#define SCSI_READ_CAPACITY16_Cmd SCSI_Invalid_Cmd +//#define SCSI_FormatUnit_Cmd SCSI_Invalid_Cmd +#define SCSI_Write6_Cmd SCSI_Invalid_Cmd +#define SCSI_Write16_Cmd SCSI_Invalid_Cmd +#define SCSI_Write12_Cmd SCSI_Invalid_Cmd +#define SCSI_Read6_Cmd SCSI_Invalid_Cmd +#define SCSI_Read12_Cmd SCSI_Invalid_Cmd +#define SCSI_Read16_Cmd SCSI_Invalid_Cmd +#define SCSI_Send_Diagnostic_Cmd SCSI_Invalid_Cmd +#define SCSI_Mode_Select6_Cmd SCSI_Invalid_Cmd +#define SCSI_Mode_Select10_Cmd SCSI_Invalid_Cmd +#define SCSI_Verify12_Cmd SCSI_Invalid_Cmd +#define SCSI_Verify16_Cmd SCSI_Invalid_Cmd + +#endif /* __USB_SCSI_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/readme.txt b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/readme.txt new file mode 100644 index 0000000..944c366 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/readme.txt @@ -0,0 +1,169 @@ +/** + ****************************************************************************** + * @file readme.txt + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Description of the USB Mass_Storage Demo. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +Example description +=================== +The Mass Storage Demo gives a typical example of how to use the STM32F10xxx, +STM32L15xxx , STM32F30xxx and STM32F37xxx USB-FS-Device peripheral to communicate +with the PC host using the bulk transfer. + +This demo supports the BOT (bulk only transfer) protocol and all needed SCSI +(small computer system interface) commands, and is compatible with both Windows +XP (SP1/SP2) and Windows 2000 (SP4). + +More details about this Demo implementation is given in the User manual +"UM0424 STM32F10xxx USB development kit", available for download from the ST +microcontrollers website: www.st.com/stm32 + + +Directory contents +================== + + \inc: contains the Demo firmware header files + + \EWARM: contains preconfigured projects for EWARM toolchain + + \RIDE: contains preconfigured projects for RIDE toolchain + + \MDK-ARM: contains preconfigured projects for MDK-ARM toolchain + + \TASKING: contains preconfigured projects for TASKING toolchain + + \TrueSTUDIO: contains preconfigured projects for TrueSTUDIO toolchain + + \src: contains the Demo firmware source files + + +Hardware environment +==================== +This example runs these STMicroelectronics evaluation boards and can be easily tailored to any other hardware: + +- STM3210B-EVAL +- STM3210E-EVAL +- STM32L152-EVAL +- STM32F373C_EVAL +- STM32F303C_EVAL +- STM32L152D-EVAL + +To select the STMicroelectronics evaluation board used to run the example, uncomment +the corresponding line in platform_config.h file. + + - STM3210B-EVAL Set-up + - Jumper JP1 (USB disconnect) should be connected in position 2-3. + + - STM3210E-EVAL Set-up + - Jumper JP14 (USB disconnect) should be connected in position 2-3. + - Jumper JP17 should be connected. + - Jumper JP20 should be not connected. + + - STM32L152-EVAL Set-up + - Jumper JP6 should be connected in position 1-2 (SPI2_MISO side). + - Jumper JP2 should be not connected. + + - STM32L152D-EVAL Set-up + - LCD Glass should be mounted On IO position for MicroSD usage. + + - STM32F373C_EVAL Set-up + - None. + + - STM32F303C_EVAL Set-up + - None. + +How to use it +============= + + EWARM + - Open the MassStorageSimpleBuffer.eww workspace. + - In the workspace toolbar select the project config: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all files: Project->Rebuild all + - Load project image: Project->Debug + - Run program: Debug->Go(F5) + + + MDK-ARM + - Open the MassStorageSimpleBuffer.Uv2 project + - In the build toolbar select the project config: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all files: Project->Rebuild all target files + - Load project image: Debug->Start/Stop Debug Session + - Run program: Debug->Run (F5) + + + RIDE + - Open the MassStorageSimpleBuffer.rprj project. + - In the configuration toolbar(Project->properties) select the project config: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all files: Project->build project + - Load project image: Debug->start(ctrl+D) + - Run program: Debug->Run(ctrl+F9) + + + TASKING + - Open TASKING toolchain. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to TASKING workspace directory and select the project: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + + + TrueSTUDIO + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM3210B-EVAL: to load the project for STM32 Medium-density devices + - STM3210E-EVAL: to load the project for STM32 High-density devices + - STM3210E_EVAL_XL: to load the project for STM32 XL-density devices + - STM32L152_EVAL: to load the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****** diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/fsmc_nand.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/fsmc_nand.c new file mode 100644 index 0000000..ae3b79f --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/fsmc_nand.c @@ -0,0 +1,503 @@ +/** + ****************************************************************************** + * @file fsmc_nand.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief This file provides a set of functions needed to drive the +* NAND512W3A2 memory mounted on STM3210E-EVAL board. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fsmc_nand.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ + +#define FSMC_Bank_NAND FSMC_Bank2_NAND +#define Bank_NAND_ADDR Bank2_NAND_ADDR +#define Bank2_NAND_ADDR ((uint32_t)0x70000000) + +/* Private macro -------------------------------------------------------------*/ +#define ROW_ADDRESS (Address.Page + (Address.Block + (Address.Zone * NAND_ZONE_SIZE)) * NAND_BLOCK_SIZE) + +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +/******************************************************************************* +* Function Name : FSMC_NAND_Init +* Description : Configures the FSMC and GPIOs to interface with the NAND memory. +* This function must be called before any write/read operation +* on the NAND. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void FSMC_NAND_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + FSMC_NANDInitTypeDef FSMC_NANDInitStructure; + FSMC_NAND_PCCARDTimingInitTypeDef p; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | + RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG, ENABLE); + +/*-- GPIO Configuration ------------------------------------------------------*/ +/* CLE, ALE, D0->D3, NOE, NWE and NCE2 NAND pin configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_14 | GPIO_Pin_15 | + GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | + GPIO_Pin_7; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + + GPIO_Init(GPIOD, &GPIO_InitStructure); + +/* D4->D7 NAND pin configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10; + + GPIO_Init(GPIOE, &GPIO_InitStructure); + + +/* NWAIT NAND pin configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; + + GPIO_Init(GPIOD, &GPIO_InitStructure); + +/* INT2 NAND pin configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; + GPIO_Init(GPIOG, &GPIO_InitStructure); + + /*-- FSMC Configuration ------------------------------------------------------*/ + p.FSMC_SetupTime = 0x1; + p.FSMC_WaitSetupTime = 0x3; + p.FSMC_HoldSetupTime = 0x2; + p.FSMC_HiZSetupTime = 0x1; + + FSMC_NANDInitStructure.FSMC_Bank = FSMC_Bank2_NAND; + FSMC_NANDInitStructure.FSMC_Waitfeature = FSMC_Waitfeature_Enable; + FSMC_NANDInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; + FSMC_NANDInitStructure.FSMC_ECC = FSMC_ECC_Enable; + FSMC_NANDInitStructure.FSMC_ECCPageSize = FSMC_ECCPageSize_512Bytes; + FSMC_NANDInitStructure.FSMC_TCLRSetupTime = 0x00; + FSMC_NANDInitStructure.FSMC_TARSetupTime = 0x00; + FSMC_NANDInitStructure.FSMC_CommonSpaceTimingStruct = &p; + FSMC_NANDInitStructure.FSMC_AttributeSpaceTimingStruct = &p; + + FSMC_NANDInit(&FSMC_NANDInitStructure); + + /* FSMC NAND Bank Cmd Test */ + FSMC_NANDCmd(FSMC_Bank2_NAND, ENABLE); +} + +/****************************************************************************** +* Function Name : FSMC_NAND_ReadID +* Description : Reads NAND memory's ID. +* Input : - NAND_ID: pointer to a NAND_IDTypeDef structure which will hold +* the Manufacturer and Device ID. +* Output : None +* Return : None +*******************************************************************************/ +void FSMC_NAND_ReadID(NAND_IDTypeDef* NAND_ID) +{ + uint32_t data = 0; + + /* Send Command to the command area */ + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = 0x90; + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; + + /* Sequence to read ID from NAND flash */ + data = *(__IO uint32_t *)(Bank_NAND_ADDR | DATA_AREA); + + NAND_ID->Maker_ID = ADDR_1st_CYCLE (data); + NAND_ID->Device_ID = ADDR_2nd_CYCLE (data); + NAND_ID->Third_ID = ADDR_3rd_CYCLE (data); + NAND_ID->Fourth_ID = ADDR_4th_CYCLE (data); +} + +/****************************************************************************** +* Function Name : FSMC_NAND_WriteSmallPage +* Description : This routine is for writing one or several 512 Bytes Page size. +* Input : - pBuffer: pointer on the Buffer containing data to be written +* - Address: First page address +* - NumPageToWrite: Number of page to write +* Output : None +* Return : New status of the NAND operation. This parameter can be: +* - NAND_TIMEOUT_ERROR: when the previous operation generate +* a Timeout error +* - NAND_READY: when memory is ready for the next operation +* And the new status of the increment address operation. It can be: +* - NAND_VALID_ADDRESS: When the new address is valid address +* - NAND_INVALID_ADDRESS: When the new address is invalid address +*******************************************************************************/ +uint32_t FSMC_NAND_WriteSmallPage(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumPageToWrite) +{ + uint32_t index = 0x00, numpagewritten = 0x00, addressstatus = NAND_VALID_ADDRESS; + uint32_t status = NAND_READY, size = 0x00; + + while((NumPageToWrite != 0x00) && (addressstatus == NAND_VALID_ADDRESS) && (status == NAND_READY)) + { + /* Page write command and address */ + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_A; + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE0; + + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); + + /* Calculate the size */ + size = NAND_PAGE_SIZE + (NAND_PAGE_SIZE * numpagewritten); + + /* Write data */ + for(; index < size; index++) + { + *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA) = pBuffer[index]; + } + + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE_TRUE1; + + /* Check status for successful operation */ + status = FSMC_NAND_GetStatus(); + + if(status == NAND_READY) + { + numpagewritten++; + + NumPageToWrite--; + + /* Calculate Next small page Address */ + addressstatus = FSMC_NAND_AddressIncrement(&Address); + } + } + + return (status | addressstatus); +} + +/****************************************************************************** +* Function Name : FSMC_NAND_ReadSmallPage +* Description : This routine is for sequential read from one or several +* 512 Bytes Page size. +* Input : - pBuffer: pointer on the Buffer to fill +* - Address: First page address +* - NumPageToRead: Number of page to read +* Output : None +* Return : New status of the NAND operation. This parameter can be: +* - NAND_TIMEOUT_ERROR: when the previous operation generate +* a Timeout error +* - NAND_READY: when memory is ready for the next operation +* And the new status of the increment address operation. It can be: +* - NAND_VALID_ADDRESS: When the new address is valid address +* - NAND_INVALID_ADDRESS: When the new address is invalid address +*******************************************************************************/ +uint32_t FSMC_NAND_ReadSmallPage(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumPageToRead) +{ + uint32_t index = 0x00, numpageread = 0x00, addressstatus = NAND_VALID_ADDRESS; + uint32_t status = NAND_READY, size = 0x00; + + while((NumPageToRead != 0x0) && (addressstatus == NAND_VALID_ADDRESS)) + { + /* Page Read command and page address */ + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_A; + + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); + + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_TRUE1; + + /* Calculate the size */ + size = NAND_PAGE_SIZE + (NAND_PAGE_SIZE * numpageread); + + /* Get Data into Buffer */ + for(; index < size; index++) + { + pBuffer[index]= *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA); + } + + numpageread++; + + NumPageToRead--; + + /* Calculate page address */ + addressstatus = FSMC_NAND_AddressIncrement(&Address); + } + + status = FSMC_NAND_GetStatus(); + + return (status | addressstatus); +} + +/****************************************************************************** +* Function Name : FSMC_NAND_WriteSpareArea +* Description : This routine write the spare area information for the specified +* pages addresses. +* Input : - pBuffer: pointer on the Buffer containing data to be written +* - Address: First page address +* - NumSpareAreaTowrite: Number of Spare Area to write +* Output : None +* Return : New status of the NAND operation. This parameter can be: +* - NAND_TIMEOUT_ERROR: when the previous operation generate +* a Timeout error +* - NAND_READY: when memory is ready for the next operation +* And the new status of the increment address operation. It can be: +* - NAND_VALID_ADDRESS: When the new address is valid address +* - NAND_INVALID_ADDRESS: When the new address is invalid address +*******************************************************************************/ +uint32_t FSMC_NAND_WriteSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaTowrite) +{ + uint32_t index = 0x00, numsparesreawritten = 0x00, addressstatus = NAND_VALID_ADDRESS; + uint32_t status = NAND_READY, size = 0x00; + + while((NumSpareAreaTowrite != 0x00) && (addressstatus == NAND_VALID_ADDRESS) && (status == NAND_READY)) + { + /* Page write Spare area command and address */ + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_C; + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE0; + + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); + + /* Calculate the size */ + size = NAND_SPARE_AREA_SIZE + (NAND_SPARE_AREA_SIZE * numsparesreawritten); + + /* Write the data */ + for(; index < size; index++) + { + *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA) = pBuffer[index]; + } + + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_WRITE_TRUE1; + + /* Check status for successful operation */ + status = FSMC_NAND_GetStatus(); + + if(status == NAND_READY) + { + numsparesreawritten++; + + NumSpareAreaTowrite--; + + /* Calculate Next page Address */ + addressstatus = FSMC_NAND_AddressIncrement(&Address); + } + } + + return (status | addressstatus); +} + +/****************************************************************************** +* Function Name : FSMC_NAND_ReadSpareArea +* Description : This routine read the spare area information from the specified +* pages addresses. +* Input : - pBuffer: pointer on the Buffer to fill +* - Address: First page address +* - NumSpareAreaToRead: Number of Spare Area to read +* Output : None +* Return : New status of the NAND operation. This parameter can be: +* - NAND_TIMEOUT_ERROR: when the previous operation generate +* a Timeout error +* - NAND_READY: when memory is ready for the next operation +* And the new status of the increment address operation. It can be: +* - NAND_VALID_ADDRESS: When the new address is valid address +* - NAND_INVALID_ADDRESS: When the new address is invalid address +*******************************************************************************/ +uint32_t FSMC_NAND_ReadSpareArea(uint8_t *pBuffer, NAND_ADDRESS Address, uint32_t NumSpareAreaToRead) +{ + uint32_t numsparearearead = 0x00, index = 0x00, addressstatus = NAND_VALID_ADDRESS; + uint32_t status = NAND_READY, size = 0x00; + + while((NumSpareAreaToRead != 0x0) && (addressstatus == NAND_VALID_ADDRESS)) + { + /* Page Read command and page address */ + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_C; + + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = 0x00; + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); + + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_AREA_TRUE1; + + /* Data Read */ + size = NAND_SPARE_AREA_SIZE + (NAND_SPARE_AREA_SIZE * numsparearearead); + + /* Get Data into Buffer */ + for ( ;index < size; index++) + { + pBuffer[index] = *(__IO uint8_t *)(Bank_NAND_ADDR | DATA_AREA); + } + + numsparearearead++; + + NumSpareAreaToRead--; + + /* Calculate page address */ + addressstatus = FSMC_NAND_AddressIncrement(&Address); + } + + status = FSMC_NAND_GetStatus(); + + return (status | addressstatus); +} + +/****************************************************************************** +* Function Name : FSMC_NAND_EraseBlock +* Description : This routine erase complete block from NAND FLASH +* Input : - Address: Any address into block to be erased +* Output : None +* Return : New status of the NAND operation. This parameter can be: +* - NAND_TIMEOUT_ERROR: when the previous operation generate +* a Timeout error +* - NAND_READY: when memory is ready for the next operation +*******************************************************************************/ +uint32_t FSMC_NAND_EraseBlock(NAND_ADDRESS Address) +{ + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_ERASE0; + + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS); + *(__IO uint8_t *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS); + + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_ERASE1; + + return (FSMC_NAND_GetStatus()); +} + +/****************************************************************************** +* Function Name : FSMC_NAND_Reset +* Description : This routine reset the NAND FLASH +* Input : None +* Output : None +* Return : NAND_READY +*******************************************************************************/ +uint32_t FSMC_NAND_Reset(void) +{ + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_RESET; + + return (NAND_READY); +} + +/****************************************************************************** +* Function Name : FSMC_NAND_GetStatus +* Description : Get the NAND operation status +* Input : None +* Output : None +* Return : New status of the NAND operation. This parameter can be: +* - NAND_TIMEOUT_ERROR: when the previous operation generate +* a Timeout error +* - NAND_READY: when memory is ready for the next operation +*******************************************************************************/ +uint32_t FSMC_NAND_GetStatus(void) +{ + uint32_t timeout = 0x1000000, status = NAND_READY; + + status = FSMC_NAND_ReadStatus(); + + /* Wait for a NAND operation to complete or a TIMEOUT to occur */ + while ((status != NAND_READY) &&( timeout != 0x00)) + { + status = FSMC_NAND_ReadStatus(); + timeout --; + } + + if(timeout == 0x00) + { + status = NAND_TIMEOUT_ERROR; + } + + /* Return the operation status */ + return (status); +} +/****************************************************************************** +* Function Name : FSMC_NAND_ReadStatus +* Description : Reads the NAND memory status using the Read status command +* Input : None +* Output : None +* Return : The status of the NAND memory. This parameter can be: +* - NAND_BUSY: when memory is busy +* - NAND_READY: when memory is ready for the next operation +* - NAND_ERROR: when the previous operation generates error +*******************************************************************************/ +uint32_t FSMC_NAND_ReadStatus(void) +{ + uint32_t data = 0x00, status = NAND_BUSY; + + /* Read status operation ------------------------------------ */ + *(__IO uint8_t *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_STATUS; + data = *(__IO uint8_t *)(Bank_NAND_ADDR); + + if((data & NAND_ERROR) == NAND_ERROR) + { + status = NAND_ERROR; + } + else if((data & NAND_READY) == NAND_READY) + { + status = NAND_READY; + } + else + { + status = NAND_BUSY; + } + + return (status); +} + +/****************************************************************************** +* Function Name : NAND_AddressIncrement +* Description : Increment the NAND memory address +* Input : - Address: address to be incremented. +* Output : None +* Return : The new status of the increment address operation. It can be: +* - NAND_VALID_ADDRESS: When the new address is valid address +* - NAND_INVALID_ADDRESS: When the new address is invalid address +*******************************************************************************/ +uint32_t FSMC_NAND_AddressIncrement(NAND_ADDRESS* Address) +{ + uint32_t status = NAND_VALID_ADDRESS; + + Address->Page++; + + if(Address->Page == NAND_BLOCK_SIZE) + { + Address->Page = 0; + Address->Block++; + + if(Address->Block == NAND_ZONE_SIZE) + { + Address->Block = 0; + Address->Zone++; + + if(Address->Zone == NAND_MAX_ZONE) + { + status = NAND_INVALID_ADDRESS; + } + } + } + + return (status); +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/main.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/main.c new file mode 100644 index 0000000..fc8d962 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/main.c @@ -0,0 +1,86 @@ +/** + ****************************************************************************** + * @file main.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Mass Storage demo main file + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +#include "usb_lib.h" +#include "usb_pwr.h" + +extern uint16_t MAL_Init (uint8_t lun); + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Extern variables ----------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +/******************************************************************************* +* Function Name : main. +* Description : Main routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +int main(void) +{ + Set_System(); + Set_USBClock(); + Led_Config(); + USB_Interrupts_Config(); + USB_Init(); + while (bDeviceState != CONFIGURED); + + USB_Configured_LED(); + + while (1) + {} +} + +#ifdef USE_FULL_ASSERT +/******************************************************************************* +* Function Name : assert_failed +* Description : Reports the name of the source file and the source line number +* where the assert_param error has occurred. +* Input : - file: pointer to the source file name +* - line: assert_param error line source number +* Output : None +* Return : None +*******************************************************************************/ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + /* Infinite loop */ + while (1) + {} +} +#endif + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/mass_mal.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/mass_mal.c new file mode 100644 index 0000000..efce23d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/mass_mal.c @@ -0,0 +1,233 @@ +/** + ****************************************************************************** + * @file mass_mal.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Medium Access Layer interface + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "platform_config.h" +#include "mass_mal.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +uint32_t Mass_Memory_Size[2]; +uint32_t Mass_Block_Size[2]; +uint32_t Mass_Block_Count[2]; +__IO uint32_t Status = 0; + +#if defined(USE_STM3210E_EVAL) || defined(USE_STM32L152D_EVAL) +SD_CardInfo mSDCardInfo; +#endif + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +/******************************************************************************* +* Function Name : MAL_Init +* Description : Initializes the Media on the STM32 +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t MAL_Init(uint8_t lun) +{ + uint16_t status = MAL_OK; + + switch (lun) + { + case 0: + Status = SD_Init(); + break; +#ifdef USE_STM3210E_EVAL + case 1: + NAND_Init(); + break; +#endif + default: + return MAL_FAIL; + } + return status; +} +/******************************************************************************* +* Function Name : MAL_Write +* Description : Write sectors +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t MAL_Write(uint8_t lun, uint32_t Memory_Offset, uint32_t *Writebuff, uint16_t Transfer_Length) +{ + + switch (lun) + { + case 0: + Status = SD_WriteMultiBlocks((uint8_t*)Writebuff, Memory_Offset, Transfer_Length,1); +#if defined(USE_STM3210E_EVAL) || defined(USE_STM32L152D_EVAL) + Status = SD_WaitWriteOperation(); + while(SD_GetStatus() != SD_TRANSFER_OK); + if ( Status != SD_OK ) + { + return MAL_FAIL; + } +#endif /* USE_STM3210E_EVAL ||USE_STM32L152D_EVAL*/ + break; +#ifdef USE_STM3210E_EVAL + case 1: + NAND_Write(Memory_Offset, Writebuff, Transfer_Length); + break; +#endif /* USE_STM3210E_EVAL */ + default: + return MAL_FAIL; + } + return MAL_OK; +} + +/******************************************************************************* +* Function Name : MAL_Read +* Description : Read sectors +* Input : None +* Output : None +* Return : Buffer pointer +*******************************************************************************/ +uint16_t MAL_Read(uint8_t lun, uint32_t Memory_Offset, uint32_t *Readbuff, uint16_t Transfer_Length) +{ + + switch (lun) + { + case 0: + + SD_ReadMultiBlocks((uint8_t*)Readbuff, Memory_Offset, Transfer_Length, 1); +#if defined(USE_STM3210E_EVAL) || defined(USE_STM32L152D_EVAL) + Status = SD_WaitReadOperation(); + while(SD_GetStatus() != SD_TRANSFER_OK) + { + } + + if ( Status != SD_OK ) + { + return MAL_FAIL; + } +#endif /* USE_STM3210E_EVAL */ + break; +#ifdef USE_STM3210E_EVAL + case 1: + NAND_Read(Memory_Offset, Readbuff, Transfer_Length); + ; + break; +#endif + default: + return MAL_FAIL; + } + return MAL_OK; +} + +/******************************************************************************* +* Function Name : MAL_GetStatus +* Description : Get status +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t MAL_GetStatus (uint8_t lun) +{ +#ifdef USE_STM3210E_EVAL + NAND_IDTypeDef NAND_ID; + uint32_t DeviceSizeMul = 0, NumberOfBlocks = 0; +#else + SD_CSD SD_csd; + uint32_t DeviceSizeMul = 0; +#endif /* USE_STM3210E_EVAL */ + +#ifdef USE_STM32L152D_EVAL + + uint32_t NumberOfBlocks = 0; +#endif + + if (lun == 0) + { +#if defined (USE_STM3210E_EVAL) || defined(USE_STM32L152D_EVAL) + if (SD_Init() == SD_OK) + { + SD_GetCardInfo(&mSDCardInfo); + SD_SelectDeselect((uint32_t) (mSDCardInfo.RCA << 16)); + DeviceSizeMul = (mSDCardInfo.SD_csd.DeviceSizeMul + 2); + + if(mSDCardInfo.CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + Mass_Block_Count[0] = (mSDCardInfo.SD_csd.DeviceSize + 1) * 1024; + } + else + { + NumberOfBlocks = ((1 << (mSDCardInfo.SD_csd.RdBlockLen)) / 512); + Mass_Block_Count[0] = ((mSDCardInfo.SD_csd.DeviceSize + 1) * (1 << DeviceSizeMul) << (NumberOfBlocks/2)); + } + Mass_Block_Size[0] = 512; + + Status = SD_SelectDeselect((uint32_t) (mSDCardInfo.RCA << 16)); + Status = SD_EnableWideBusOperation(SDIO_BusWide_4b); + if ( Status != SD_OK ) + { + return MAL_FAIL; + } + +#else + + uint32_t temp_block_mul = 0; + SD_GetCSDRegister(&SD_csd); + DeviceSizeMul = SD_csd.DeviceSizeMul + 2; + temp_block_mul = (1 << SD_csd.RdBlockLen)/ 512; + Mass_Block_Count[0] = ((SD_csd.DeviceSize + 1) * (1 << (DeviceSizeMul))) * temp_block_mul; + Mass_Block_Size[0] = 512; + Mass_Memory_Size[0] = (Mass_Block_Count[0] * Mass_Block_Size[0]); +#endif /* USE_STM3210E_EVAL */ + Mass_Memory_Size[0] = Mass_Block_Count[0] * Mass_Block_Size[0]; + STM_EVAL_LEDOn(LED2); + return MAL_OK; + +#if defined (USE_STM3210E_EVAL) || defined(USE_STM32L152D_EVAL) + } +#endif /* USE_STM3210E_EVAL */ + } +#ifdef USE_STM3210E_EVAL + else + { + FSMC_NAND_ReadID(&NAND_ID); + if (NAND_ID.Device_ID != 0 ) + { + /* only one zone is used */ + Mass_Block_Count[1] = NAND_ZONE_SIZE * NAND_BLOCK_SIZE * NAND_MAX_ZONE ; + Mass_Block_Size[1] = NAND_PAGE_SIZE; + Mass_Memory_Size[1] = (Mass_Block_Count[1] * Mass_Block_Size[1]); + return MAL_OK; + } + } +#endif /* USE_STM3210E_EVAL */ + STM_EVAL_LEDOn(LED2); + return MAL_FAIL; +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/memory.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/memory.c new file mode 100644 index 0000000..919886a --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/memory.c @@ -0,0 +1,178 @@ +/** + ****************************************************************************** + * @file memory.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Memory management layer + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ + +#include "memory.h" +#include "usb_scsi.h" +#include "usb_bot.h" +#include "usb_regs.h" +#include "usb_mem.h" +#include "usb_conf.h" +#include "hw_config.h" +#include "mass_mal.h" +#include "usb_lib.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +__IO uint32_t Block_Read_count = 0; +__IO uint32_t Block_offset; +__IO uint32_t Counter = 0; +uint32_t Idx; +uint32_t Data_Buffer[BULK_MAX_PACKET_SIZE *2]; /* 512 bytes*/ +uint8_t TransferState = TXFR_IDLE; +/* Extern variables ----------------------------------------------------------*/ +extern uint8_t Bulk_Data_Buff[BULK_MAX_PACKET_SIZE]; /* data buffer*/ +extern uint16_t Data_Len; +extern uint8_t Bot_State; +extern Bulk_Only_CBW CBW; +extern Bulk_Only_CSW CSW; +extern uint32_t Mass_Memory_Size[2]; +extern uint32_t Mass_Block_Size[2]; + +/* Private function prototypes -----------------------------------------------*/ +/* Extern function prototypes ------------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : Read_Memory +* Description : Handle the Read operation from the microSD card. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Read_Memory(uint8_t lun, uint32_t Memory_Offset, uint32_t Transfer_Length) +{ + static uint32_t Offset, Length; + + if (TransferState == TXFR_IDLE ) + { + Offset = Memory_Offset * Mass_Block_Size[lun]; + Length = Transfer_Length * Mass_Block_Size[lun]; + TransferState = TXFR_ONGOING; + } + + if (TransferState == TXFR_ONGOING ) + { + if (!Block_Read_count) + { + MAL_Read(lun , + Offset , + Data_Buffer, + Mass_Block_Size[lun]); + + USB_SIL_Write(EP1_IN, (uint8_t *)Data_Buffer, BULK_MAX_PACKET_SIZE); + + Block_Read_count = Mass_Block_Size[lun] - BULK_MAX_PACKET_SIZE; + Block_offset = BULK_MAX_PACKET_SIZE; + } + else + { + USB_SIL_Write(EP1_IN, (uint8_t *)Data_Buffer + Block_offset, BULK_MAX_PACKET_SIZE); + + Block_Read_count -= BULK_MAX_PACKET_SIZE; + Block_offset += BULK_MAX_PACKET_SIZE; + } + + SetEPTxCount(ENDP1, BULK_MAX_PACKET_SIZE); + SetEPTxStatus(ENDP1, EP_TX_VALID); + Offset += BULK_MAX_PACKET_SIZE; + Length -= BULK_MAX_PACKET_SIZE; + + CSW.dDataResidue -= BULK_MAX_PACKET_SIZE; + Led_RW_ON(); + } + if (Length == 0) + { + Block_Read_count = 0; + Block_offset = 0; + Offset = 0; + Bot_State = BOT_DATA_IN_LAST; + TransferState = TXFR_IDLE; + Led_RW_OFF(); + } +} + +/******************************************************************************* +* Function Name : Write_Memory +* Description : Handle the Write operation to the microSD card. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Write_Memory (uint8_t lun, uint32_t Memory_Offset, uint32_t Transfer_Length) +{ + + static uint32_t W_Offset, W_Length; + + uint32_t temp = Counter + 64; + + if (TransferState == TXFR_IDLE ) + { + W_Offset = Memory_Offset * Mass_Block_Size[lun]; + W_Length = Transfer_Length * Mass_Block_Size[lun]; + TransferState = TXFR_ONGOING; + } + + if (TransferState == TXFR_ONGOING ) + { + + for (Idx = 0 ; Counter < temp; Counter++) + { + *((uint8_t *)Data_Buffer + Counter) = Bulk_Data_Buff[Idx++]; + } + + W_Offset += Data_Len; + W_Length -= Data_Len; + + if (!(W_Length % Mass_Block_Size[lun])) + { + Counter = 0; + MAL_Write(lun , + W_Offset - Mass_Block_Size[lun], + Data_Buffer, + Mass_Block_Size[lun]); + } + + CSW.dDataResidue -= Data_Len; + SetEPRxStatus(ENDP2, EP_RX_VALID); /* enable the next transaction*/ + Led_RW_ON(); + } + + if ((W_Length == 0) || (Bot_State == BOT_CSW_Send)) + { + Counter = 0; + Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); + TransferState = TXFR_IDLE; + Led_RW_OFF(); + } +} +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/nand_if.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/nand_if.c new file mode 100644 index 0000000..7139219 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/nand_if.c @@ -0,0 +1,557 @@ +/** + ****************************************************************************** + * @file nand_if.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief manage NAND operations state machine + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +#include "platform_config.h" + +#ifdef USE_STM3210E_EVAL +/* Includes ------------------------------------------------------------------*/ +#include "nand_if.h" +#include "mass_mal.h" +#include "fsmc_nand.h" +#include "memory.h" +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* extern variables-----------------------------------------------------------*/ +extern uint32_t SCSI_LBA; +extern uint32_t SCSI_BlkLen; +/* Private variables ---------------------------------------------------------*/ +uint16_t LUT[1024]; //Look Up Table Buffer +WRITE_STATE Write_State; +BLOCK_STATE Block_State; +NAND_ADDRESS wAddress, fAddress; +uint16_t phBlock, LogAddress, Initial_Page, CurrentZone = 0; +uint16_t Written_Pages = 0; + +uint16_t LUT[1024]; //Look Up Table Buffer +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +static uint16_t NAND_CleanLUT(uint8_t ZoneNbr); +static NAND_ADDRESS NAND_GetAddress(uint32_t Address); +static uint16_t NAND_GetFreeBlock(void); +static uint16_t NAND_Write_Cleanup(void); +SPARE_AREA ReadSpareArea(uint32_t address); +static uint16_t NAND_Copy(NAND_ADDRESS Address_Src, NAND_ADDRESS Address_Dest, uint16_t PageToCopy); +static NAND_ADDRESS NAND_ConvertPhyAddress(uint32_t Address); +static uint16_t NAND_BuildLUT(uint8_t ZoneNbr); + +/******************************************************************************* +* Function Name : NAND_Init +* Description : Init NAND Interface +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +uint16_t NAND_Init(void) +{ + uint16_t Status = NAND_OK; + + FSMC_NAND_Init(); + Status = NAND_BuildLUT(0); + Write_State = WRITE_IDLE; + return Status; +} + +/******************************************************************************* +* Function Name : NAND_Write +* Description : write one sector by once +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +uint16_t NAND_Write(uint32_t Memory_Offset, uint32_t *Writebuff, uint16_t Transfer_Length) +{ + /* check block status and calculate start and end addresses */ + wAddress = NAND_GetAddress(Memory_Offset / 512); + + /*check Zone: if second zone is requested build second LUT*/ + if (wAddress.Zone != CurrentZone) + { + CurrentZone = wAddress.Zone; + NAND_BuildLUT(CurrentZone); + } + + phBlock = LUT[wAddress.Block]; /* Block Index + flags */ + LogAddress = wAddress.Block ; /* save logical block */ + + /* IDLE state */ + /****************/ + if ( Write_State == WRITE_IDLE) + {/* Idle state */ + + if (phBlock & USED_BLOCK) + { /* USED BLOCK */ + + Block_State = OLD_BLOCK; + /* Get a free Block for swap */ + fAddress.Block = NAND_GetFreeBlock(); + fAddress.Zone = wAddress.Zone; + Initial_Page = fAddress.Page = wAddress.Page; + + /* write the new page */ + FSMC_NAND_WriteSmallPage((uint8_t *)Writebuff, fAddress, PAGE_TO_WRITE); + Written_Pages++; + + /* get physical block */ + wAddress.Block = phBlock & 0x3FF; + + + if (Written_Pages == SCSI_BlkLen) + { + NAND_Write_Cleanup(); + Written_Pages = 0; + return NAND_OK; + } + else + { + if (wAddress.Page == (NAND_BLOCK_SIZE - 1)) + { + NAND_Write_Cleanup(); + return NAND_OK; + } + Write_State = WRITE_ONGOING; + return NAND_OK; + } + } + else + {/* UNUSED BLOCK */ + + Block_State = UNUSED_BLOCK; + /* write the new page */ + wAddress.Block = phBlock & 0x3FF; + FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , wAddress, PAGE_TO_WRITE); + + Written_Pages++; + if (Written_Pages == SCSI_BlkLen) + { + Written_Pages = 0; + NAND_Write_Cleanup(); + return NAND_OK; + } + else + { + Write_State = WRITE_ONGOING; + return NAND_OK; + } + } + } + /* WRITE state */ + /***************/ + if ( Write_State == WRITE_ONGOING) + {/* Idle state */ + if (phBlock & USED_BLOCK) + { /* USED BLOCK */ + + wAddress.Block = phBlock & 0x3FF; + Block_State = OLD_BLOCK; + fAddress.Page = wAddress.Page; + + /* check if next pages are in next block */ + if (wAddress.Page == (NAND_BLOCK_SIZE - 1)) + { + /* write Last page */ + FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , fAddress, PAGE_TO_WRITE); + Written_Pages++; + if (Written_Pages == SCSI_BlkLen) + { + Written_Pages = 0; + } + /* Clean up and Update the LUT */ + NAND_Write_Cleanup(); + Write_State = WRITE_IDLE; + return NAND_OK; + } + + /* write next page */ + FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , fAddress, PAGE_TO_WRITE); + Written_Pages++; + if (Written_Pages == SCSI_BlkLen) + { + Write_State = WRITE_IDLE; + NAND_Write_Cleanup(); + Written_Pages = 0; + } + + } + else + {/* UNUSED BLOCK */ + wAddress.Block = phBlock & 0x3FF; + /* check if it is the last page in prev block */ + if (wAddress.Page == (NAND_BLOCK_SIZE - 1)) + { + /* write Last page */ + FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , wAddress, PAGE_TO_WRITE); + Written_Pages++; + if (Written_Pages == SCSI_BlkLen) + { + Written_Pages = 0; + } + + /* Clean up and Update the LUT */ + NAND_Write_Cleanup(); + Write_State = WRITE_IDLE; + + + + return NAND_OK; + } + /* write next page in same block */ + FSMC_NAND_WriteSmallPage( (uint8_t *)Writebuff , wAddress, PAGE_TO_WRITE); + Written_Pages++; + if (Written_Pages == SCSI_BlkLen) + { + Write_State = WRITE_IDLE; + NAND_Write_Cleanup(); + Written_Pages = 0; + } + } + } + return NAND_OK; +} + +/******************************************************************************* +* Function Name : NAND_Read +* Description : Read sectors +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +uint16_t NAND_Read(uint32_t Memory_Offset, uint32_t *Readbuff, uint16_t Transfer_Length) +{ + NAND_ADDRESS phAddress; + + phAddress = NAND_GetAddress(Memory_Offset / 512); + + if (phAddress.Zone != CurrentZone) + { + CurrentZone = phAddress.Zone; + NAND_BuildLUT(CurrentZone); + } + + if (LUT [phAddress.Block] & BAD_BLOCK) + { + return NAND_FAIL; + } + else + { + phAddress.Block = LUT [phAddress.Block] & ~ (USED_BLOCK | VALID_BLOCK); + FSMC_NAND_ReadSmallPage ( (uint8_t *)Readbuff , phAddress, Transfer_Length / 512); + } + return NAND_OK; +} + +/******************************************************************************* +* Function Name : NAND_CleanLUT +* Description : Erase old blocks & rebuild the look up table +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +static uint16_t NAND_CleanLUT (uint8_t ZoneNbr) +{ +#ifdef WEAR_LEVELLING_SUPPORT + uint16_t BlockIdx, LUT_Item; +#endif + /* Rebuild the LUT for the current zone */ + NAND_BuildLUT (ZoneNbr); + +#ifdef WEAR_LEVELLING_SUPPORT + /* Wear Leveling : circular use of free blocks */ + LUT_Item = LUT [BlockIdx] + for (BlockIdx == MAX_LOG_BLOCKS_PER_ZONE ; BlockIdx < MAX_LOG_BLOCKS_PER_ZONE + WEAR_DEPTH ; BlockIdx++) + { + LUT [BlockIdx] = LUT [BlockIdx + 1]; + } + LUT [ MAX_LOG_BLOCKS_PER_ZONE + WEAR_DEPTH - 1] = LUT_Item ; +#endif + + return NAND_OK; +} + +/******************************************************************************* +* Function Name : NAND_GetAddress +* Description : Translate logical address into a phy one +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +static NAND_ADDRESS NAND_GetAddress (uint32_t Address) +{ + NAND_ADDRESS Address_t; + + Address_t.Page = Address & (NAND_BLOCK_SIZE - 1); + Address_t.Block = Address / NAND_BLOCK_SIZE; + Address_t.Zone = 0; + + while (Address_t.Block >= MAX_LOG_BLOCKS_PER_ZONE) + { + Address_t.Block -= MAX_LOG_BLOCKS_PER_ZONE; + Address_t.Zone++; + } + return Address_t; +} + +/******************************************************************************* +* Function Name : NAND_GetFreeBlock +* Description : Look for a free block for data exchange +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +static uint16_t NAND_GetFreeBlock (void) +{ + return LUT[MAX_LOG_BLOCKS_PER_ZONE]& ~(USED_BLOCK | VALID_BLOCK); +} + +/******************************************************************************* +* Function Name : ReadSpareArea +* Description : Check used block +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +SPARE_AREA ReadSpareArea (uint32_t address) +{ + SPARE_AREA t; + uint8_t Buffer[16]; + NAND_ADDRESS address_s; + address_s = NAND_ConvertPhyAddress(address); + FSMC_NAND_ReadSpareArea(Buffer , address_s, 1) ; + + t = *(SPARE_AREA *)Buffer; + + return t; +} + +/******************************************************************************* +* Function Name : NAND_Copy +* Description : Copy page +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +static uint16_t NAND_Copy (NAND_ADDRESS Address_Src, NAND_ADDRESS Address_Dest, uint16_t PageToCopy) +{ + uint8_t Copybuff[512]; + for ( ; PageToCopy > 0 ; PageToCopy-- ) + { + FSMC_NAND_ReadSmallPage ((uint8_t *)Copybuff, Address_Src , 1 ); + FSMC_NAND_WriteSmallPage ((uint8_t *)Copybuff, Address_Dest, 1); + FSMC_NAND_AddressIncrement(&Address_Src); + FSMC_NAND_AddressIncrement(&Address_Dest); + } + + return NAND_OK; +} + +/******************************************************************************* +* Function Name : NAND_Format +* Description : Format the entire NAND flash +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +uint16_t NAND_Format (void) +{ + NAND_ADDRESS phAddress; + SPARE_AREA SpareArea; + uint32_t BlockIndex; + + for (BlockIndex = 0 ; BlockIndex < NAND_ZONE_SIZE * NAND_MAX_ZONE; BlockIndex++) + { + phAddress = NAND_ConvertPhyAddress(BlockIndex * NAND_BLOCK_SIZE ); + SpareArea = ReadSpareArea(BlockIndex * NAND_BLOCK_SIZE); + + if((SpareArea.DataStatus != 0)||(SpareArea.BlockStatus != 0)){ + FSMC_NAND_EraseBlock (phAddress); + } + } + NAND_BuildLUT(0); + return NAND_OK; +} + +/******************************************************************************* +* Function Name : NAND_Write_Cleanup +* Description : None +* Input : None +* Output : None +* Return : Status +*******************************************************************************/ +static uint16_t NAND_Write_Cleanup (void) +{ + uint16_t tempSpareArea [8]; + uint16_t Page_Back; + + if ( Block_State == OLD_BLOCK ) + { + /* precopy old first pages */ + if (Initial_Page != 0) + { + Page_Back = wAddress.Page; + fAddress.Page = wAddress.Page = 0; + NAND_Copy (wAddress, fAddress, Initial_Page); + wAddress.Page = Page_Back ; + } + + /* postcopy remaining pages */ + if ((NAND_BLOCK_SIZE - (wAddress.Page + 1)) != 0) + { + FSMC_NAND_AddressIncrement(&wAddress); + fAddress.Page = wAddress.Page; + NAND_Copy (wAddress, fAddress, NAND_BLOCK_SIZE - wAddress.Page); + } + + /* assign logical address to new block */ + tempSpareArea [0] = LogAddress | USED_BLOCK ; + tempSpareArea [1] = 0xFFFF; + tempSpareArea [2] = 0xFFFF; + + fAddress.Page = 0x00; + FSMC_NAND_WriteSpareArea( (uint8_t *)tempSpareArea , fAddress , 1); + + /* erase old block */ + FSMC_NAND_EraseBlock(wAddress); + NAND_CleanLUT(wAddress.Zone); + } + else + {/* unused block case */ + /* assign logical address to the new used block */ + tempSpareArea [0] = LogAddress | USED_BLOCK ; + tempSpareArea [1] = 0xFFFF; + tempSpareArea [2] = 0xFFFF; + + wAddress.Page = 0x00; + FSMC_NAND_WriteSpareArea((uint8_t *)tempSpareArea , wAddress, 1); + NAND_CleanLUT(wAddress.Zone); + } + return NAND_OK; +} + +/******************************************************************************* +* Function Name : NAND_ConvertPhyAddress +* Description : None +* Input : physical Address +* Output : None +* Return : Status +*******************************************************************************/ +static NAND_ADDRESS NAND_ConvertPhyAddress (uint32_t Address) +{ + NAND_ADDRESS Address_t; + + Address_t.Page = Address & (NAND_BLOCK_SIZE - 1); + Address_t.Block = Address / NAND_BLOCK_SIZE; + Address_t.Zone = 0; + + while (Address_t.Block >= MAX_PHY_BLOCKS_PER_ZONE) + { + Address_t.Block -= MAX_PHY_BLOCKS_PER_ZONE; + Address_t.Zone++; + } + return Address_t; +} + +/******************************************************************************* +* Function Name : NAND_BuildLUT +* Description : Build the look up table +* Input : None +* Output : None +* Return : Status +* !!!! NOTE : THIS ALGORITHM IS A SUBJECT OF PATENT FOR STMICROELECTRONICS !!!!! +*******************************************************************************/ +static uint16_t NAND_BuildLUT (uint8_t ZoneNbr) +{ + + uint16_t pBadBlock, pCurrentBlock, pFreeBlock; + SPARE_AREA SpareArea; + /***************************************************************************** + 1st step : Init. + *****************************************************************************/ + /*Init the LUT (assume all blocks free) */ + for (pCurrentBlock = 0 ; pCurrentBlock < MAX_PHY_BLOCKS_PER_ZONE ; pCurrentBlock++) + { + LUT[pCurrentBlock] = FREE_BLOCK; /* 12th bit is set to 1 */ + } + + /* Init Pointers */ + pBadBlock = MAX_PHY_BLOCKS_PER_ZONE - 1; + pCurrentBlock = 0; + + /***************************************************************************** + 2nd step : locate used and bad blocks + *****************************************************************************/ + + while (pCurrentBlock < MAX_PHY_BLOCKS_PER_ZONE) + { + + SpareArea = ReadSpareArea(pCurrentBlock * NAND_BLOCK_SIZE + (ZoneNbr * NAND_BLOCK_SIZE * MAX_PHY_BLOCKS_PER_ZONE)); + + if ((SpareArea.DataStatus == 0) || (SpareArea.BlockStatus == 0)) + { + + LUT[pBadBlock--] |= pCurrentBlock | (uint16_t)BAD_BLOCK ; + LUT[pCurrentBlock] &= (uint16_t)~FREE_BLOCK; + if (pBadBlock == MAX_LOG_BLOCKS_PER_ZONE) + { + return NAND_FAIL; + } + } + else if (SpareArea.LogicalIndex != 0xFFFF) + { + + LUT[SpareArea.LogicalIndex & 0x3FF] |= pCurrentBlock | VALID_BLOCK | USED_BLOCK; + LUT[pCurrentBlock] &= (uint16_t)( ~FREE_BLOCK); + } + pCurrentBlock++ ; + } + + /***************************************************************************** + 3rd step : locate Free Blocks by scanning the LUT already built partially + *****************************************************************************/ + pFreeBlock = 0; + for (pCurrentBlock = 0 ; pCurrentBlock < MAX_PHY_BLOCKS_PER_ZONE ; pCurrentBlock++ ) + { + + if ( !(LUT[pCurrentBlock]& USED_BLOCK)) + { + do + { + if (LUT[pFreeBlock] & FREE_BLOCK) + { + + LUT [pCurrentBlock] |= pFreeBlock; + LUT [pFreeBlock] &= ~FREE_BLOCK; + break; + } + pFreeBlock++; + } + while ( pFreeBlock < MAX_PHY_BLOCKS_PER_ZONE ); + } + } + return NAND_OK; +} +#endif + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/scsi_data.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/scsi_data.c new file mode 100644 index 0000000..9979d19 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/scsi_data.c @@ -0,0 +1,158 @@ +/** + ****************************************************************************** + * @file scsi_data.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Initialization of the SCSI data + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "usb_scsi.h" +#include "memory.h" + + +uint8_t Page00_Inquiry_Data[] = + { + 0x00, /* PERIPHERAL QUALIFIER & PERIPHERAL DEVICE TYPE*/ + 0x00, + 0x00, + 0x00, + 0x00 /* Supported Pages 00*/ + }; +uint8_t Standard_Inquiry_Data[] = + { + 0x00, /* Direct Access Device */ + 0x80, /* RMB = 1: Removable Medium */ + 0x02, /* Version: No conformance claim to standard */ + 0x02, + + 36 - 4, /* Additional Length */ + 0x00, /* SCCS = 1: Storage Controller Component */ + 0x00, + 0x00, + /* Vendor Identification */ + 'S', 'T', 'M', ' ', ' ', ' ', ' ', ' ', + /* Product Identification */ + 'S', 'D', ' ', 'F', 'l', 'a', 's', 'h', ' ', + 'D', 'i', 's', 'k', ' ', ' ', ' ', + /* Product Revision Level */ + '1', '.', '0', ' ' + }; +uint8_t Standard_Inquiry_Data2[] = + { + 0x00, /* Direct Access Device */ + 0x80, /* RMB = 1: Removable Medium */ + 0x02, /* Version: No conformance claim to standard */ + 0x02, + + 36 - 4, /* Additional Length */ + 0x00, /* SCCS = 1: Storage Controller Component */ + 0x00, + 0x00, + /* Vendor Identification */ + 'S', 'T', 'M', ' ', ' ', ' ', ' ', ' ', + /* Product Identification */ + 'N', 'A', 'N', 'D', ' ', 'F', 'l', 'a', 's', 'h', ' ', + 'D', 'i', 's', 'k', ' ', + /* Product Revision Level */ + '1', '.', '0', ' ' + }; +/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +uint8_t Mode_Sense6_data[] = + { + 0x03, + 0x00, + 0x00, + 0x00, + }; + +/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ + +uint8_t Mode_Sense10_data[] = + { + 0x00, + 0x06, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00 + }; +uint8_t Scsi_Sense_Data[] = + { + 0x70, /*RespCode*/ + 0x00, /*SegmentNumber*/ + NO_SENSE, /* Sens_Key*/ + 0x00, + 0x00, + 0x00, + 0x00, /*Information*/ + 0x0A, /*AdditionalSenseLength*/ + 0x00, + 0x00, + 0x00, + 0x00, /*CmdInformation*/ + NO_SENSE, /*Asc*/ + 0x00, /*ASCQ*/ + 0x00, /*FRUC*/ + 0x00, /*TBD*/ + 0x00, + 0x00 /*SenseKeySpecific*/ + }; +uint8_t ReadCapacity10_Data[] = + { + /* Last Logical Block */ + 0, + 0, + 0, + 0, + + /* Block Length */ + 0, + 0, + 0, + 0 + }; + +uint8_t ReadFormatCapacity_Data [] = + { + 0x00, + 0x00, + 0x00, + 0x08, /* Capacity List Length */ + + /* Block Count */ + 0, + 0, + 0, + 0, + + /* Block Length */ + 0x02,/* Descriptor Code: Formatted Media */ + 0, + 0, + 0 + }; + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/stm32_it.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/stm32_it.c new file mode 100644 index 0000000..7d21a9e --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/stm32_it.c @@ -0,0 +1,256 @@ +/** + ****************************************************************************** + * @file stm32_it.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and peripherals + * interrupt service routine. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +#include "stm32_it.h" +#include "usb_lib.h" +#include "usb_istr.h" +#include "usb_pwr.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************/ +/* Cortex-M Processor Exceptions Handlers */ +/******************************************************************************/ + +/******************************************************************************* +* Function Name : NMI_Handler +* Description : This function handles NMI exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void NMI_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : HardFault_Handler +* Description : This function handles Hard Fault exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : MemManage_Handler +* Description : This function handles Memory Manage exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : BusFault_Handler +* Description : This function handles Bus Fault exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : UsageFault_Handler +* Description : This function handles Usage Fault exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : SVC_Handler +* Description : This function handles SVCall exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void SVC_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : DebugMon_Handler +* Description : This function handles Debug Monitor exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void DebugMon_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : PendSV_Handler +* Description : This function handles PendSVC exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void PendSV_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : SysTick_Handler +* Description : This function handles SysTick Handler. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void SysTick_Handler(void) +{ +} + +/******************************************************************************/ +/* STM32 Peripherals Interrupt Handlers */ +/******************************************************************************/ + +/******************************************************************************* +* Function Name : USB_HP_CAN1_TX_IRQHandler +* Description : This function handles USB High Priority or CAN TX interrupts requests +* requests. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void USB_HP_CAN1_TX_IRQHandler(void) +{ + CTR_HP(); +} + +/******************************************************************************* +* Function Name : USB_IRQHandler +* Description : This function handles USB Low Priority interrupts +* requests. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) || defined(STM32F37X) +void USB_LP_IRQHandler(void) +#else +void USB_LP_CAN1_RX0_IRQHandler(void) +#endif +{ + USB_Istr(); +} + +#if defined(STM32F10X_HD) || defined(STM32F10X_XL) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) +/******************************************************************************* +* Function Name : SDIO_IRQHandler +* Description : This function handles SDIO global interrupt request. +* requests. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void SDIO_IRQHandler(void) +{ + /* Process All SDIO Interrupt Sources */ + SD_ProcessIRQSrc(); + +} + +void SD_SDIO_DMA_IRQHANDLER(void) +{ + /* Process DMA2 Stream3 or DMA2 Stream6 Interrupt Sources */ + SD_ProcessDMAIRQ(); +} + +#endif /* STM32F10X_HD | STM32F10X_XL*/ +/******************************************************************************* +* Function Name : USB_FS_WKUP_IRQHandler +* Description : This function handles USB WakeUp interrupt request. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) +void USB_FS_WKUP_IRQHandler(void) +#else +void USBWakeUp_IRQHandler(void) +#endif +{ + EXTI_ClearITPendingBit(EXTI_Line18); +} + +/******************************************************************************/ +/* STM32 Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32xxx.s). */ +/******************************************************************************/ + +/******************************************************************************* +* Function Name : PPP_IRQHandler +* Description : This function handles PPP interrupt request. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +/*void PPP_IRQHandler(void) +{ +}*/ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/system_stm32f10x.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/system_stm32f10x.c new file mode 100644 index 0000000..3686a2f --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/system_stm32f10x.c @@ -0,0 +1,917 @@ +/** + ****************************************************************************** + * @file system_stm32f10x.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f10x_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on + * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x_system + * @{ + */ + +/** @addtogroup STM32F10x_System_Private_Includes + * @{ + */ + +#include "stm32f10x.h" + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) + frequency (after reset the HSI is used as SYSCLK source) + + IMPORTANT NOTE: + ============== + 1. After each device reset the HSI is used as System clock source. + + 2. Please make sure that the selected System clock doesn't exceed your device's + maximum frequency. + + 3. If none of the define below is enabled, the HSI is used as System clock + source. + + 4. The System clock configuration functions provided within this file assume that: + - For Low, Medium and High density Value line devices an external 8MHz + crystal is used to drive the System clock. + - For Low, Medium and High density devices an external 8MHz crystal is + used to drive the System clock. + - For Connectivity line devices an external 25MHz crystal is used to drive + the System clock. + If you are using different crystal you have to adapt those functions accordingly. + */ + +#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ + #define SYSCLK_FREQ_24MHz 24000000 +#else +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_36MHz 36000000 */ +/* #define SYSCLK_FREQ_48MHz 48000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ +#define SYSCLK_FREQ_72MHz 72000000 +#endif + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM3210E-EVAL board (STM32 High density and XL-density devices) or on + STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) +/* #define DATA_IN_ExtSRAM */ +#endif + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#ifdef SYSCLK_FREQ_HSE + uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_36MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_HSE + static void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + static void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_36MHz + static void SetSysClockTo36(void); +#elif defined SYSCLK_FREQ_48MHz + static void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + static void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + static void SetSysClockTo72(void); +#endif + +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ + + RCC->CFGR &= (uint32_t)0xF8FF0000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; +#endif /* STM32F10X_XX */ + +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + + /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ + /* Configure the Flash Latency cycles and enable prefetch buffer */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depending on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0; + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + uint32_t prediv1factor = 0; +#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } + + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_36MHz + SetSysClockTo36(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + source (default after reset) */ +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f10x.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f10x_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114; + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0; + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BB; + GPIOD->CRH = 0xBBBBBBBB; + + GPIOE->CRL = 0xB44444BB; + GPIOE->CRH = 0xBBBBBBBB; + + GPIOF->CRL = 0x44BBBBBB; + GPIOF->CRH = 0xBBBB4444; + + GPIOG->CRL = 0x44BBBBBB; + GPIOG->CRH = 0x44444B44; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000200; +} +#endif /* DATA_IN_ExtSRAM */ + +#ifdef SYSCLK_FREQ_HSE +/** + * @brief Selects HSE as System clock source and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockToHSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_24MHz +/** + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo24(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_XX */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_36MHz +/** + * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo36(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_48MHz +/** + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo48(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_56MHz +/** + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo56(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_72MHz +/** + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo72(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | + RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/system_stm32f37x.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/system_stm32f37x.c new file mode 100644 index 0000000..943f188 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/system_stm32f37x.c @@ -0,0 +1,380 @@ +/** + ****************************************************************************** + * @file system_stm32f37x.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32F37x devices, + * and is generated by the clock configuration tool + * STM32f37x_Clock_Configuration_V1.0.0.xls + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f37x.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz Range) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f37x.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" defined + * in "stm32f37x.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + * Supported STM32F37x device + *============================================================================= + * System Clock source | PLL (HSE) + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 2 + *----------------------------------------------------------------------------- + * HSE Frequency(Hz) | 8000000 + *---------------------------------------------------------------------------- + * PLLMUL | 9 + *----------------------------------------------------------------------------- + * PREDIV | 1 + *----------------------------------------------------------------------------- + * USB Clock | ENABLE + *----------------------------------------------------------------------------- + * Flash Latency(WS) | 2 + *----------------------------------------------------------------------------- + * Prefetch Buffer | ON + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup STM32F37x_System + * @{ + */ + +/** @addtogroup STM32F37x_System_Private_Includes + * @{ + */ + +#include "stm32f37x.h" + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Variables + * @{ + */ +uint32_t SystemCoreClock = 72000000; +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontrollers system. + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, SDADCPRE and MCOSEL[2:0] bits */ + RCC->CFGR &= (uint32_t)0x00FF0000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + + /* Reset PREDIV1[3:0] bits */ + RCC->CFGR2 &= (uint32_t)0xFFFFFFF0; + + /* Reset USARTSW[1:0], I2CSW and CECSW bits */ + RCC->CFGR3 &= (uint32_t)0xFFF0F8C; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + +/* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */ + SetSysClock(); + + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock according to Clock Register Values + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f37x.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f37x.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + break; + default: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, AHB/APBx prescalers and Flash + * settings. + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer and set Flash Latency */ + FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK / 2 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + /* PLL configuration */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL9); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/system_stm32l1xx.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/system_stm32l1xx.c new file mode 100644 index 0000000..1be659d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/system_stm32l1xx.c @@ -0,0 +1,533 @@ +/** + ****************************************************************************** + * @file system_stm32l1xx.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32L1xx Ultra + * Low Power devices, and is generated by the clock configuration + * tool "STM32L1xx_Clock_Configuration_V1.1.0.xls". + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l1xx_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the MSI (2.1 MHz Range) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l1xx_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and MSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define + * in "stm32l1xx.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + * System Clock Configuration + *============================================================================= + * System Clock source | PLL(HSE) + *----------------------------------------------------------------------------- + * SYSCLK | 32000000 Hz + *----------------------------------------------------------------------------- + * HCLK | 32000000 Hz + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * HSE Frequency | 8000000 Hz + *----------------------------------------------------------------------------- + * PLL DIV | 3 + *----------------------------------------------------------------------------- + * PLL MUL | 12 + *----------------------------------------------------------------------------- + * VDD | 3.3 V + *----------------------------------------------------------------------------- + * Vcore | 1.8 V (Range 1) + *----------------------------------------------------------------------------- + * Flash Latency | 1 WS + *----------------------------------------------------------------------------- + * SDIO clock (SDIOCLK) | 48000000 Hz + *----------------------------------------------------------------------------- + * Require 48MHz for USB clock | Disabled + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l1xx_system + * @{ + */ + +/** @addtogroup STM32L1xx_System_Private_Includes + * @{ + */ + +#include "stm32l1xx.h" + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Defines + * @{ + */ + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM32L152D_EVAL board as data memory */ +/* #define DATA_IN_ExtSRAM */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Variables + * @{ + */ +uint32_t SystemCoreClock = 32000000; +__I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48}; +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /*!< Set MSION bit */ + RCC->CR |= (uint32_t)0x00000100; + + /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */ + RCC->CFGR &= (uint32_t)0x88FFC00C; + + /*!< Reset HSION, HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xEEFEFFFE; + + /*!< Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */ + RCC->CFGR &= (uint32_t)0xFF02FFFF; + + /*!< Disable all interrupts */ + RCC->CIR = 0x00000000; + +#ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); +#endif /* DATA_IN_ExtSRAM */ + + /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock according to Clock Register Values + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI + * value as defined by the MSI range. + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* MSI used as system clock */ + msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13; + SystemCoreClock = (32768 * (1 << (msirange + 1))); + break; + case 0x04: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x08: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x0C: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; + plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; + pllmul = PLLMulTable[(pllmul >> 18)]; + plldiv = (plldiv >> 22) + 1; + + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + + if (pllsource == 0x00) + { + /* HSI oscillator clock selected as PLL clock entry */ + SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv); + } + else + { + /* HSE selected as PLL clock entry */ + SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv); + } + break; + default: /* MSI used as system clock */ + msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13; + SystemCoreClock = (32768 * (1 << (msirange + 1))); + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, AHB/APBx prescalers and Flash + * settings. + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable 64-bit access */ + FLASH->ACR |= FLASH_ACR_ACC64; + + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTEN; + + /* Flash 1 wait state */ + FLASH->ACR |= FLASH_ACR_LATENCY; + + /* Power enable */ + RCC->APB1ENR |= RCC_APB1ENR_PWREN; + + /* Select the Voltage Range 1 (1.8 V) */ + PWR->CR = PWR_CR_VOS_0; + + /* Wait Until the Voltage Regulator is ready */ + while((PWR->CSR & PWR_CSR_VOSF) != RESET) + { + } + + /* HCLK = SYSCLK /1*/ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK /1*/ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK /1*/ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* PLL configuration */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | + RCC_CFGR_PLLDIV)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMUL12 | RCC_CFGR_PLLDIV3); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + } + else + { + /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in SystemInit() function before jump to main. + * This function configures the external SRAM mounted on STM32L152D_EVAL board + * This SRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*-- GPIOs Configuration -----------------------------------------------------*/ +/* + +-------------------+--------------------+------------------+------------------+ + + SRAM pins assignment + + +-------------------+--------------------+------------------+------------------+ + | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | + | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | + | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | + | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | + | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | + | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | + | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 | + | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+ + | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 | + | PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 | + | PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+ + | PD15 <-> FSMC_D1 |--------------------+ + +-------------------+ +*/ + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ + RCC->AHBENR = 0x000080D8; + + /* Connect PDx pins to FSMC Alternate function */ + GPIOD->AFR[0] = 0x00CC00CC; + GPIOD->AFR[1] = 0xCCCCCCCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xAAAA0A0A; + /* Configure PDx pins speed to 40 MHz */ + GPIOD->OSPEEDR = 0xFFFF0F0F; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FSMC Alternate function */ + GPIOE->AFR[0] = 0xC00000CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA800A; + /* Configure PEx pins speed to 40 MHz */ + GPIOE->OSPEEDR = 0xFFFFC00F; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FSMC Alternate function */ + GPIOF->AFR[0] = 0x00CCCCCC; + GPIOF->AFR[1] = 0xCCCC0000; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA000AAA; + /* Configure PFx pins speed to 40 MHz */ + GPIOF->OSPEEDR = 0xFF000FFF; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FSMC Alternate function */ + GPIOG->AFR[0] = 0x00CCCCCC; + GPIOG->AFR[1] = 0x00000C00; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0x00200AAA; + /* Configure PGx pins speed to 40 MHz */ + GPIOG->OSPEEDR = 0x00300FFF; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +/*-- FSMC Configuration ------------------------------------------------------*/ + /* Enable the FSMC interface clock */ + RCC->AHBENR = 0x400080D8; + + /* Configure and enable Bank1_SRAM3 */ + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000300; + FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF; +/* + Bank1_SRAM3 is configured as follow: + + p.FSMC_AddressSetupTime = 0; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 3; + p.FSMC_BusTurnAroundDuration = 0; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); +*/ + +} +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_bot.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_bot.c new file mode 100644 index 0000000..9519a01 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_bot.c @@ -0,0 +1,343 @@ +/** + ****************************************************************************** + * @file usb_bot.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief BOT State Machine management + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "usb_scsi.h" +#include "hw_config.h" +#include "usb_regs.h" +#include "usb_mem.h" +#include "usb_conf.h" +#include "usb_bot.h" +#include "memory.h" +#include "usb_lib.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +uint8_t Bot_State; +uint8_t Bulk_Data_Buff[BULK_MAX_PACKET_SIZE]; /* data buffer*/ +uint16_t Data_Len; +Bulk_Only_CBW CBW; +Bulk_Only_CSW CSW; +uint32_t SCSI_LBA , SCSI_BlkLen; +extern uint32_t Max_Lun; +/* Extern variables ----------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Extern function prototypes ------------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : Mass_Storage_In +* Description : Mass Storage IN transfer. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Mass_Storage_In (void) +{ + switch (Bot_State) + { + case BOT_CSW_Send: + case BOT_ERROR: + Bot_State = BOT_IDLE; + SetEPRxStatus(ENDP2, EP_RX_VALID);/* enable the Endpoint to receive the next cmd*/ + if (GetEPRxStatus(EP2_OUT) == EP_RX_STALL) + { + SetEPRxStatus(EP2_OUT, EP_RX_VALID);/* enable the Endpoint to receive the next cmd*/ + } + break; + case BOT_DATA_IN: + switch (CBW.CB[0]) + { + case SCSI_READ10: + SCSI_Read10_Cmd(CBW.bLUN , SCSI_LBA , SCSI_BlkLen); + break; + } + break; + case BOT_DATA_IN_LAST: + Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); + + SetEPRxStatus(ENDP2, EP_RX_VALID); + break; + default: + break; + } +} + +/******************************************************************************* +* Function Name : Mass_Storage_Out +* Description : Mass Storage OUT transfer. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Mass_Storage_Out (void) +{ + uint8_t CMD; + CMD = CBW.CB[0]; + + Data_Len = USB_SIL_Read(EP2_OUT, Bulk_Data_Buff); + + switch (Bot_State) + { + case BOT_IDLE: + CBW_Decode(); + break; + case BOT_DATA_OUT: + if (CMD == SCSI_WRITE10) + { + SCSI_Write10_Cmd(CBW.bLUN , SCSI_LBA , SCSI_BlkLen); + break; + } + Bot_Abort(DIR_OUT); + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); + Set_CSW (CSW_PHASE_ERROR, SEND_CSW_DISABLE); + break; + default: + Bot_Abort(BOTH_DIR); + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); + Set_CSW (CSW_PHASE_ERROR, SEND_CSW_DISABLE); + break; + } +} + +/******************************************************************************* +* Function Name : CBW_Decode +* Description : Decode the received CBW and call the related SCSI command +* routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void CBW_Decode(void) +{ + uint32_t Counter; + + for (Counter = 0; Counter < Data_Len; Counter++) + { + *((uint8_t *)&CBW + Counter) = Bulk_Data_Buff[Counter]; + } + CSW.dTag = CBW.dTag; + CSW.dDataResidue = CBW.dDataLength; + if (Data_Len != BOT_CBW_PACKET_LENGTH) + { + Bot_Abort(BOTH_DIR); + /* reset the CBW.dSignature to disable the clear feature until receiving a Mass storage reset*/ + CBW.dSignature = 0; + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, PARAMETER_LIST_LENGTH_ERROR); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); + return; + } + + if ((CBW.CB[0] == SCSI_READ10 ) || (CBW.CB[0] == SCSI_WRITE10 )) + { + /* Calculate Logical Block Address */ + SCSI_LBA = (CBW.CB[2] << 24) | (CBW.CB[3] << 16) | (CBW.CB[4] << 8) | CBW.CB[5]; + /* Calculate the Number of Blocks to transfer */ + SCSI_BlkLen = (CBW.CB[7] << 8) | CBW.CB[8]; + } + + if (CBW.dSignature == BOT_CBW_SIGNATURE) + { + /* Valid CBW */ + if ((CBW.bLUN > Max_Lun) || (CBW.bCBLength < 1) || (CBW.bCBLength > 16)) + { + Bot_Abort(BOTH_DIR); + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); + } + else + { + switch (CBW.CB[0]) + { + case SCSI_REQUEST_SENSE: + SCSI_RequestSense_Cmd (CBW.bLUN); + break; + case SCSI_INQUIRY: + SCSI_Inquiry_Cmd(CBW.bLUN); + break; + case SCSI_START_STOP_UNIT: + SCSI_Start_Stop_Unit_Cmd(CBW.bLUN); + break; + case SCSI_ALLOW_MEDIUM_REMOVAL: + SCSI_Start_Stop_Unit_Cmd(CBW.bLUN); + break; + case SCSI_MODE_SENSE6: + SCSI_ModeSense6_Cmd (CBW.bLUN); + break; + case SCSI_MODE_SENSE10: + SCSI_ModeSense10_Cmd (CBW.bLUN); + break; + case SCSI_READ_FORMAT_CAPACITIES: + SCSI_ReadFormatCapacity_Cmd(CBW.bLUN); + break; + case SCSI_READ_CAPACITY10: + SCSI_ReadCapacity10_Cmd(CBW.bLUN); + break; + case SCSI_TEST_UNIT_READY: + SCSI_TestUnitReady_Cmd(CBW.bLUN); + break; + case SCSI_READ10: + SCSI_Read10_Cmd(CBW.bLUN, SCSI_LBA , SCSI_BlkLen); + break; + case SCSI_WRITE10: + SCSI_Write10_Cmd(CBW.bLUN, SCSI_LBA , SCSI_BlkLen); + break; + case SCSI_VERIFY10: + SCSI_Verify10_Cmd(CBW.bLUN); + break; + case SCSI_FORMAT_UNIT: + SCSI_Format_Cmd(CBW.bLUN); + break; + /*Unsupported command*/ + case SCSI_MODE_SELECT10: + SCSI_Mode_Select10_Cmd(CBW.bLUN); + break; + case SCSI_MODE_SELECT6: + SCSI_Mode_Select6_Cmd(CBW.bLUN); + break; + + case SCSI_SEND_DIAGNOSTIC: + SCSI_Send_Diagnostic_Cmd(CBW.bLUN); + break; + case SCSI_READ6: + SCSI_Read6_Cmd(CBW.bLUN); + break; + case SCSI_READ12: + SCSI_Read12_Cmd(CBW.bLUN); + break; + case SCSI_READ16: + SCSI_Read16_Cmd(CBW.bLUN); + break; + case SCSI_READ_CAPACITY16: + SCSI_READ_CAPACITY16_Cmd(CBW.bLUN); + break; + case SCSI_WRITE6: + SCSI_Write6_Cmd(CBW.bLUN); + break; + case SCSI_WRITE12: + SCSI_Write12_Cmd(CBW.bLUN); + break; + case SCSI_WRITE16: + SCSI_Write16_Cmd(CBW.bLUN); + break; + case SCSI_VERIFY12: + SCSI_Verify12_Cmd(CBW.bLUN); + break; + case SCSI_VERIFY16: + SCSI_Verify16_Cmd(CBW.bLUN); + break; + + default: + { + Bot_Abort(BOTH_DIR); + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_COMMAND); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); + } + } + } + } + else + { + /* Invalid CBW */ + Bot_Abort(BOTH_DIR); + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_COMMAND); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); + } +} + +/******************************************************************************* +* Function Name : Transfer_Data_Request +* Description : Send the request response to the PC HOST. +* Input : uint8_t* Data_Address : point to the data to transfer. +* uint16_t Data_Length : the number of Bytes to transfer. +* Output : None. +* Return : None. +*******************************************************************************/ +void Transfer_Data_Request(uint8_t* Data_Pointer, uint16_t Data_Len) +{ + USB_SIL_Write(EP1_IN, Data_Pointer, Data_Len); + + SetEPTxStatus(ENDP1, EP_TX_VALID); + + Bot_State = BOT_DATA_IN_LAST; + CSW.dDataResidue -= Data_Len; + CSW.bStatus = CSW_CMD_PASSED; +} + +/******************************************************************************* +* Function Name : Set_CSW +* Description : Set the SCW with the needed fields. +* Input : uint8_t CSW_Status this filed can be CSW_CMD_PASSED,CSW_CMD_FAILED, +* or CSW_PHASE_ERROR. +* Output : None. +* Return : None. +*******************************************************************************/ +void Set_CSW (uint8_t CSW_Status, uint8_t Send_Permission) +{ + CSW.dSignature = BOT_CSW_SIGNATURE; + CSW.bStatus = CSW_Status; + + USB_SIL_Write(EP1_IN, ((uint8_t *)& CSW), CSW_DATA_LENGTH); + + Bot_State = BOT_ERROR; + if (Send_Permission) + { + Bot_State = BOT_CSW_Send; + SetEPTxStatus(ENDP1, EP_TX_VALID); + } +} + +/******************************************************************************* +* Function Name : Bot_Abort +* Description : Stall the needed Endpoint according to the selected direction. +* Input : Endpoint direction IN, OUT or both directions +* Output : None. +* Return : None. +*******************************************************************************/ +void Bot_Abort(uint8_t Direction) +{ + switch (Direction) + { + case DIR_IN : + SetEPTxStatus(ENDP1, EP_TX_STALL); + break; + case DIR_OUT : + SetEPRxStatus(ENDP2, EP_RX_STALL); + break; + case BOTH_DIR : + SetEPTxStatus(ENDP1, EP_TX_STALL); + SetEPRxStatus(ENDP2, EP_RX_STALL); + break; + default: + break; + } +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_desc.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_desc.c new file mode 100644 index 0000000..f0349d1 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_desc.c @@ -0,0 +1,147 @@ +/** + ****************************************************************************** + * @file usb_desc.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Descriptors for Mass Storage Device + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "usb_desc.h" + +const uint8_t MASS_DeviceDescriptor[MASS_SIZ_DEVICE_DESC] = + { + 0x12, /* bLength */ + 0x01, /* bDescriptorType */ + 0x00, /* bcdUSB, version 2.00 */ + 0x02, + 0x00, /* bDeviceClass : each interface define the device class */ + 0x00, /* bDeviceSubClass */ + 0x00, /* bDeviceProtocol */ + 0x40, /* bMaxPacketSize0 0x40 = 64 */ + 0x83, /* idVendor (0483) */ + 0x04, + 0x20, /* idProduct */ + 0x57, + 0x00, /* bcdDevice 2.00*/ + 0x02, + 1, /* index of string Manufacturer */ + /**/ + 2, /* index of string descriptor of product*/ + /* */ + 3, /* */ + /* */ + /* */ + 0x01 /*bNumConfigurations */ + }; +const uint8_t MASS_ConfigDescriptor[MASS_SIZ_CONFIG_DESC] = + { + + 0x09, /* bLength: Configuration Descriptor size */ + 0x02, /* bDescriptorType: Configuration */ + MASS_SIZ_CONFIG_DESC, + + 0x00, + 0x01, /* bNumInterfaces: 1 interface */ + 0x01, /* bConfigurationValue: */ + /* Configuration value */ + 0x00, /* iConfiguration: */ + /* Index of string descriptor */ + /* describing the configuration */ + 0xC0, /* bmAttributes: */ + /* Self powered */ + 0x32, /* MaxPower 100 mA */ + + /******************** Descriptor of Mass Storage interface ********************/ + /* 09 */ + 0x09, /* bLength: Interface Descriptor size */ + 0x04, /* bDescriptorType: */ + /* Interface descriptor type */ + 0x00, /* bInterfaceNumber: Number of Interface */ + 0x00, /* bAlternateSetting: Alternate setting */ + 0x02, /* bNumEndpoints*/ + 0x08, /* bInterfaceClass: MASS STORAGE Class */ + 0x06, /* bInterfaceSubClass : SCSI transparent*/ + 0x50, /* nInterfaceProtocol */ + 4, /* iInterface: */ + /* 18 */ + 0x07, /*Endpoint descriptor length = 7*/ + 0x05, /*Endpoint descriptor type */ + 0x81, /*Endpoint address (IN, address 1) */ + 0x02, /*Bulk endpoint type */ + 0x40, /*Maximum packet size (64 bytes) */ + 0x00, + 0x00, /*Polling interval in milliseconds */ + /* 25 */ + 0x07, /*Endpoint descriptor length = 7 */ + 0x05, /*Endpoint descriptor type */ + 0x02, /*Endpoint address (OUT, address 2) */ + 0x02, /*Bulk endpoint type */ + 0x40, /*Maximum packet size (64 bytes) */ + 0x00, + 0x00 /*Polling interval in milliseconds*/ + /*32*/ + }; +const uint8_t MASS_StringLangID[MASS_SIZ_STRING_LANGID] = + { + MASS_SIZ_STRING_LANGID, + 0x03, + 0x09, + 0x04 + } + ; /* LangID = 0x0409: U.S. English */ +const uint8_t MASS_StringVendor[MASS_SIZ_STRING_VENDOR] = + { + MASS_SIZ_STRING_VENDOR, /* Size of manufacturer string */ + 0x03, /* bDescriptorType = String descriptor */ + /* Manufacturer: "STMicroelectronics" */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 + }; +const uint8_t MASS_StringProduct[MASS_SIZ_STRING_PRODUCT] = + { + MASS_SIZ_STRING_PRODUCT, + 0x03, + /* Product name: "STM32F10x:USB Mass Storage" */ + 'S', 0, 'T', 0, 'M', 0, '3', 0, '2', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, + 's', 0, ' ', 0, 'S', 0, 't', 0, 'o', 0, 'r', 0, 'a', 0, 'g', 0, 'e', 0 + + }; + +uint8_t MASS_StringSerial[MASS_SIZ_STRING_SERIAL] = + { + MASS_SIZ_STRING_SERIAL, + 0x03, + /* Serial number*/ + 'S', 0, 'T', 0, 'M', 0, '3', 0, '2', 0 + }; +const uint8_t MASS_StringInterface[MASS_SIZ_STRING_INTERFACE] = + { + MASS_SIZ_STRING_INTERFACE, + 0x03, + /* Interface 0: "ST Mass" */ + 'S', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0 + }; + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_endp.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_endp.c new file mode 100644 index 0000000..43799e3 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_endp.c @@ -0,0 +1,66 @@ +/** + ****************************************************************************** + * @file usb_endp.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Endpoint routines + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "usb_lib.h" +#include "usb_bot.h" +#include "usb_istr.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : EP1_IN_Callback +* Description : EP1 IN Callback Routine +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void EP1_IN_Callback(void) +{ + Mass_Storage_In(); +} + +/******************************************************************************* +* Function Name : EP2_OUT_Callback. +* Description : EP2 OUT Callback Routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void EP2_OUT_Callback(void) +{ + Mass_Storage_Out(); +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_prop.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_prop.c new file mode 100644 index 0000000..22eed99 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_prop.c @@ -0,0 +1,411 @@ +/** + ****************************************************************************** + * @file usb_prop.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief All processing related to Mass Storage Demo + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +#include "usb_lib.h" +#include "usb_conf.h" +#include "usb_desc.h" +#include "usb_pwr.h" +#include "usb_bot.h" +#include "memory.h" +#include "mass_mal.h" +#include "usb_prop.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +#if defined (USE_STM3210E_EVAL) +uint32_t Max_Lun = 1; +#else +uint32_t Max_Lun = 0; +#endif + +DEVICE Device_Table = + { + EP_NUM, + 1 + }; + +DEVICE_PROP Device_Property = + { + MASS_init, + MASS_Reset, + MASS_Status_In, + MASS_Status_Out, + MASS_Data_Setup, + MASS_NoData_Setup, + MASS_Get_Interface_Setting, + MASS_GetDeviceDescriptor, + MASS_GetConfigDescriptor, + MASS_GetStringDescriptor, + 0, + 0x40 /*MAX PACKET SIZE*/ + }; + +USER_STANDARD_REQUESTS User_Standard_Requests = + { + Mass_Storage_GetConfiguration, + Mass_Storage_SetConfiguration, + Mass_Storage_GetInterface, + Mass_Storage_SetInterface, + Mass_Storage_GetStatus, + Mass_Storage_ClearFeature, + Mass_Storage_SetEndPointFeature, + Mass_Storage_SetDeviceFeature, + Mass_Storage_SetDeviceAddress + }; + +ONE_DESCRIPTOR Device_Descriptor = + { + (uint8_t*)MASS_DeviceDescriptor, + MASS_SIZ_DEVICE_DESC + }; + +ONE_DESCRIPTOR Config_Descriptor = + { + (uint8_t*)MASS_ConfigDescriptor, + MASS_SIZ_CONFIG_DESC + }; + +ONE_DESCRIPTOR String_Descriptor[5] = + { + {(uint8_t*)MASS_StringLangID, MASS_SIZ_STRING_LANGID}, + {(uint8_t*)MASS_StringVendor, MASS_SIZ_STRING_VENDOR}, + {(uint8_t*)MASS_StringProduct, MASS_SIZ_STRING_PRODUCT}, + {(uint8_t*)MASS_StringSerial, MASS_SIZ_STRING_SERIAL}, + {(uint8_t*)MASS_StringInterface, MASS_SIZ_STRING_INTERFACE}, + }; + +/* Extern variables ----------------------------------------------------------*/ +extern unsigned char Bot_State; +extern Bulk_Only_CBW CBW; + +/* Private function prototypes -----------------------------------------------*/ +/* Extern function prototypes ------------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +/******************************************************************************* +* Function Name : MASS_init +* Description : Mass Storage init routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void MASS_init() +{ + /* Update the serial number string descriptor with the data from the unique + ID*/ + Get_SerialNum(); + + pInformation->Current_Configuration = 0; + + /* Connect the device */ + PowerOn(); + + /* Perform basic device initialization operations */ + USB_SIL_Init(); + + bDeviceState = UNCONNECTED; +} + +/******************************************************************************* +* Function Name : MASS_Reset +* Description : Mass Storage reset routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void MASS_Reset() +{ + /* Set the device as not configured */ + Device_Info.Current_Configuration = 0; + + /* Current Feature initialization */ + pInformation->Current_Feature = MASS_ConfigDescriptor[7]; + + SetBTABLE(BTABLE_ADDRESS); + + /* Initialize Endpoint 0 */ + SetEPType(ENDP0, EP_CONTROL); + SetEPTxStatus(ENDP0, EP_TX_NAK); + SetEPRxAddr(ENDP0, ENDP0_RXADDR); + SetEPRxCount(ENDP0, Device_Property.MaxPacketSize); + SetEPTxAddr(ENDP0, ENDP0_TXADDR); + Clear_Status_Out(ENDP0); + SetEPRxValid(ENDP0); + + /* Initialize Endpoint 1 */ + SetEPType(ENDP1, EP_BULK); + SetEPTxAddr(ENDP1, ENDP1_TXADDR); + SetEPTxStatus(ENDP1, EP_TX_NAK); + SetEPRxStatus(ENDP1, EP_RX_DIS); + + /* Initialize Endpoint 2 */ + SetEPType(ENDP2, EP_BULK); + SetEPRxAddr(ENDP2, ENDP2_RXADDR); + SetEPRxCount(ENDP2, Device_Property.MaxPacketSize); + SetEPRxStatus(ENDP2, EP_RX_VALID); + SetEPTxStatus(ENDP2, EP_TX_DIS); + + + SetEPRxCount(ENDP0, Device_Property.MaxPacketSize); + SetEPRxValid(ENDP0); + + /* Set the device to response on default address */ + SetDeviceAddress(0); + + bDeviceState = ATTACHED; + + CBW.dSignature = BOT_CBW_SIGNATURE; + Bot_State = BOT_IDLE; + + USB_NotConfigured_LED(); +} + +/******************************************************************************* +* Function Name : Mass_Storage_SetConfiguration +* Description : Handle the SetConfiguration request. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Mass_Storage_SetConfiguration(void) +{ + if (pInformation->Current_Configuration != 0) + { + /* Device configured */ + bDeviceState = CONFIGURED; + + ClearDTOG_TX(ENDP1); + ClearDTOG_RX(ENDP2); + + Bot_State = BOT_IDLE; /* set the Bot state machine to the IDLE state */ + } +} + +/******************************************************************************* +* Function Name : Mass_Storage_ClearFeature +* Description : Handle the ClearFeature request. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Mass_Storage_ClearFeature(void) +{ + /* when the host send a CBW with invalid signature or invalid length the two + Endpoints (IN & OUT) shall stall until receiving a Mass Storage Reset */ + if (CBW.dSignature != BOT_CBW_SIGNATURE) + Bot_Abort(BOTH_DIR); +} + +/******************************************************************************* +* Function Name : Mass_Storage_SetConfiguration. +* Description : Update the device state to addressed. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Mass_Storage_SetDeviceAddress (void) +{ + bDeviceState = ADDRESSED; +} +/******************************************************************************* +* Function Name : MASS_Status_In +* Description : Mass Storage Status IN routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void MASS_Status_In(void) +{ + return; +} + +/******************************************************************************* +* Function Name : MASS_Status_Out +* Description : Mass Storage Status OUT routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void MASS_Status_Out(void) +{ + return; +} + +/******************************************************************************* +* Function Name : MASS_Data_Setup. +* Description : Handle the data class specific requests.. +* Input : RequestNo. +* Output : None. +* Return : RESULT. +*******************************************************************************/ +RESULT MASS_Data_Setup(uint8_t RequestNo) +{ + uint8_t *(*CopyRoutine)(uint16_t); + + CopyRoutine = NULL; + if ((Type_Recipient == (CLASS_REQUEST | INTERFACE_RECIPIENT)) + && (RequestNo == GET_MAX_LUN) && (pInformation->USBwValue == 0) + && (pInformation->USBwIndex == 0) && (pInformation->USBwLength == 0x01)) + { + CopyRoutine = Get_Max_Lun; + } + else + { + return USB_UNSUPPORT; + } + + if (CopyRoutine == NULL) + { + return USB_UNSUPPORT; + } + + pInformation->Ctrl_Info.CopyData = CopyRoutine; + pInformation->Ctrl_Info.Usb_wOffset = 0; + (*CopyRoutine)(0); + + return USB_SUCCESS; + +} + +/******************************************************************************* +* Function Name : MASS_NoData_Setup. +* Description : Handle the no data class specific requests. +* Input : RequestNo. +* Output : None. +* Return : RESULT. +*******************************************************************************/ +RESULT MASS_NoData_Setup(uint8_t RequestNo) +{ + if ((Type_Recipient == (CLASS_REQUEST | INTERFACE_RECIPIENT)) + && (RequestNo == MASS_STORAGE_RESET) && (pInformation->USBwValue == 0) + && (pInformation->USBwIndex == 0) && (pInformation->USBwLength == 0x00)) + { + /* Initialize Endpoint 1 */ + ClearDTOG_TX(ENDP1); + + /* Initialize Endpoint 2 */ + ClearDTOG_RX(ENDP2); + + /*initialize the CBW signature to enable the clear feature*/ + CBW.dSignature = BOT_CBW_SIGNATURE; + Bot_State = BOT_IDLE; + + return USB_SUCCESS; + } + return USB_UNSUPPORT; +} + +/******************************************************************************* +* Function Name : MASS_Get_Interface_Setting +* Description : Test the interface and the alternate setting according to the +* supported one. +* Input : uint8_t Interface, uint8_t AlternateSetting. +* Output : None. +* Return : RESULT. +*******************************************************************************/ +RESULT MASS_Get_Interface_Setting(uint8_t Interface, uint8_t AlternateSetting) +{ + if (AlternateSetting > 0) + { + return USB_UNSUPPORT;/* in this application we don't have AlternateSetting*/ + } + else if (Interface > 0) + { + return USB_UNSUPPORT;/*in this application we have only 1 interfaces*/ + } + return USB_SUCCESS; +} + +/******************************************************************************* +* Function Name : MASS_GetDeviceDescriptor +* Description : Get the device descriptor. +* Input : uint16_t Length. +* Output : None. +* Return : None. +*******************************************************************************/ +uint8_t *MASS_GetDeviceDescriptor(uint16_t Length) +{ + return Standard_GetDescriptorData(Length, &Device_Descriptor ); +} + +/******************************************************************************* +* Function Name : MASS_GetConfigDescriptor +* Description : Get the configuration descriptor. +* Input : uint16_t Length. +* Output : None. +* Return : None. +*******************************************************************************/ +uint8_t *MASS_GetConfigDescriptor(uint16_t Length) +{ + return Standard_GetDescriptorData(Length, &Config_Descriptor ); +} + +/******************************************************************************* +* Function Name : MASS_GetStringDescriptor +* Description : Get the string descriptors according to the needed index. +* Input : uint16_t Length. +* Output : None. +* Return : None. +*******************************************************************************/ +uint8_t *MASS_GetStringDescriptor(uint16_t Length) +{ + uint8_t wValue0 = pInformation->USBwValue0; + + if (wValue0 > 5) + { + return NULL; + } + else + { + return Standard_GetDescriptorData(Length, &String_Descriptor[wValue0]); + } +} + +/******************************************************************************* +* Function Name : Get_Max_Lun +* Description : Handle the Get Max Lun request. +* Input : uint16_t Length. +* Output : None. +* Return : None. +*******************************************************************************/ +uint8_t *Get_Max_Lun(uint16_t Length) +{ + if (Length == 0) + { + pInformation->Ctrl_Info.Usb_wLength = LUN_DATA_LENGTH; + return 0; + } + else + { + return((uint8_t*)(&Max_Lun)); + } +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_scsi.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_scsi.c new file mode 100644 index 0000000..028011c --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Mass_Storage/src/usb_scsi.c @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file usb_scsi.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief All processing related to the SCSI commands + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +#include "usb_scsi.h" +#include "mass_mal.h" +#include "usb_bot.h" +#include "usb_regs.h" +#include "memory.h" +#include "platform_config.h" +#include "usb_lib.h" + +#ifdef USE_STM3210E_EVAL + #include "nand_if.h" +#endif /* USE_STM3210E_EVAL */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* External variables --------------------------------------------------------*/ +extern uint8_t Bulk_Data_Buff[BULK_MAX_PACKET_SIZE]; /* data buffer*/ +extern uint8_t Bot_State; +extern Bulk_Only_CBW CBW; +extern Bulk_Only_CSW CSW; +extern uint32_t Mass_Memory_Size[2]; +extern uint32_t Mass_Block_Size[2]; +extern uint32_t Mass_Block_Count[2]; + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : SCSI_Inquiry_Cmd +* Description : SCSI Inquiry Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_Inquiry_Cmd(uint8_t lun) +{ + uint8_t* Inquiry_Data; + uint16_t Inquiry_Data_Length; + + if (CBW.CB[1] & 0x01)/*Evpd is set*/ + { + Inquiry_Data = Page00_Inquiry_Data; + Inquiry_Data_Length = 5; + } + else + { + if ( lun == 0) + { + Inquiry_Data = Standard_Inquiry_Data; + } + else + { + Inquiry_Data = Standard_Inquiry_Data2; + } + if (CBW.CB[4] <= STANDARD_INQUIRY_DATA_LEN) + Inquiry_Data_Length = CBW.CB[4]; + else + Inquiry_Data_Length = STANDARD_INQUIRY_DATA_LEN; + } + Transfer_Data_Request(Inquiry_Data, Inquiry_Data_Length); +} + +/******************************************************************************* +* Function Name : SCSI_ReadFormatCapacity_Cmd +* Description : SCSI ReadFormatCapacity Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_ReadFormatCapacity_Cmd(uint8_t lun) +{ + if (MAL_GetStatus(lun) != 0 ) + { + Set_Scsi_Sense_Data(CBW.bLUN, NOT_READY, MEDIUM_NOT_PRESENT); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); + Bot_Abort(DIR_IN); + return; + } + ReadFormatCapacity_Data[4] = (uint8_t)(Mass_Block_Count[lun] >> 24); + ReadFormatCapacity_Data[5] = (uint8_t)(Mass_Block_Count[lun] >> 16); + ReadFormatCapacity_Data[6] = (uint8_t)(Mass_Block_Count[lun] >> 8); + ReadFormatCapacity_Data[7] = (uint8_t)(Mass_Block_Count[lun]); + + ReadFormatCapacity_Data[9] = (uint8_t)(Mass_Block_Size[lun] >> 16); + ReadFormatCapacity_Data[10] = (uint8_t)(Mass_Block_Size[lun] >> 8); + ReadFormatCapacity_Data[11] = (uint8_t)(Mass_Block_Size[lun]); + Transfer_Data_Request(ReadFormatCapacity_Data, READ_FORMAT_CAPACITY_DATA_LEN); +} + +/******************************************************************************* +* Function Name : SCSI_ReadCapacity10_Cmd +* Description : SCSI ReadCapacity10 Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_ReadCapacity10_Cmd(uint8_t lun) +{ + if (MAL_GetStatus(lun)) + { + Set_Scsi_Sense_Data(CBW.bLUN, NOT_READY, MEDIUM_NOT_PRESENT); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); + Bot_Abort(DIR_IN); + return; + } + + ReadCapacity10_Data[0] = (uint8_t)((Mass_Block_Count[lun] - 1) >> 24); + ReadCapacity10_Data[1] = (uint8_t)((Mass_Block_Count[lun] - 1) >> 16); + ReadCapacity10_Data[2] = (uint8_t)((Mass_Block_Count[lun] - 1) >> 8); + ReadCapacity10_Data[3] = (uint8_t)(Mass_Block_Count[lun] - 1); + + ReadCapacity10_Data[4] = (uint8_t)(Mass_Block_Size[lun] >> 24); + ReadCapacity10_Data[5] = (uint8_t)(Mass_Block_Size[lun] >> 16); + ReadCapacity10_Data[6] = (uint8_t)(Mass_Block_Size[lun] >> 8); + ReadCapacity10_Data[7] = (uint8_t)(Mass_Block_Size[lun]); + Transfer_Data_Request(ReadCapacity10_Data, READ_CAPACITY10_DATA_LEN); +} + +/******************************************************************************* +* Function Name : SCSI_ModeSense6_Cmd +* Description : SCSI ModeSense6 Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_ModeSense6_Cmd (uint8_t lun) +{ + Transfer_Data_Request(Mode_Sense6_data, MODE_SENSE6_DATA_LEN); +} + +/******************************************************************************* +* Function Name : SCSI_ModeSense10_Cmd +* Description : SCSI ModeSense10 Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_ModeSense10_Cmd (uint8_t lun) +{ + Transfer_Data_Request(Mode_Sense10_data, MODE_SENSE10_DATA_LEN); +} + +/******************************************************************************* +* Function Name : SCSI_RequestSense_Cmd +* Description : SCSI RequestSense Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_RequestSense_Cmd (uint8_t lun) +{ + uint8_t Request_Sense_data_Length; + + if (CBW.CB[4] <= REQUEST_SENSE_DATA_LEN) + { + Request_Sense_data_Length = CBW.CB[4]; + } + else + { + Request_Sense_data_Length = REQUEST_SENSE_DATA_LEN; + } + Transfer_Data_Request(Scsi_Sense_Data, Request_Sense_data_Length); +} + +/******************************************************************************* +* Function Name : Set_Scsi_Sense_Data +* Description : Set Scsi Sense Data routine. +* Input : uint8_t Sens_Key + uint8_t Asc. +* Output : None. +* Return : None. +*******************************************************************************/ +void Set_Scsi_Sense_Data(uint8_t lun, uint8_t Sens_Key, uint8_t Asc) +{ + Scsi_Sense_Data[2] = Sens_Key; + Scsi_Sense_Data[12] = Asc; +} + +/******************************************************************************* +* Function Name : SCSI_Start_Stop_Unit_Cmd +* Description : SCSI Start_Stop_Unit Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_Start_Stop_Unit_Cmd(uint8_t lun) +{ + Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); +} + +/******************************************************************************* +* Function Name : SCSI_Read10_Cmd +* Description : SCSI Read10 Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_Read10_Cmd(uint8_t lun , uint32_t LBA , uint32_t BlockNbr) +{ + if (Bot_State == BOT_IDLE) + { + if (!(SCSI_Address_Management(CBW.bLUN, SCSI_READ10, LBA, BlockNbr)))/*address out of range*/ + { + return; + } + + if ((CBW.bmFlags & 0x80) != 0) + { + Bot_State = BOT_DATA_IN; + Read_Memory(lun, LBA , BlockNbr); + } + else + { + Bot_Abort(BOTH_DIR); + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); + } + return; + } + else if (Bot_State == BOT_DATA_IN) + { + Read_Memory(lun , LBA , BlockNbr); + } +} + +/******************************************************************************* +* Function Name : SCSI_Write10_Cmd +* Description : SCSI Write10 Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_Write10_Cmd(uint8_t lun , uint32_t LBA , uint32_t BlockNbr) +{ + if (Bot_State == BOT_IDLE) + { + if (!(SCSI_Address_Management(CBW.bLUN, SCSI_WRITE10 , LBA, BlockNbr)))/*address out of range*/ + { + return; + } + + if ((CBW.bmFlags & 0x80) == 0) + { + Bot_State = BOT_DATA_OUT; + SetEPRxStatus(ENDP2, EP_RX_VALID); + } + else + { + Bot_Abort(DIR_IN); + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); + } + return; + } + else if (Bot_State == BOT_DATA_OUT) + { + Write_Memory(lun , LBA , BlockNbr); + } +} + +/******************************************************************************* +* Function Name : SCSI_Verify10_Cmd +* Description : SCSI Verify10 Command routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_Verify10_Cmd(uint8_t lun) +{ + if ((CBW.dDataLength == 0) && !(CBW.CB[1] & BLKVFY))/* BLKVFY not set*/ + { + Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); + } + else + { + Bot_Abort(BOTH_DIR); + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); + } +} +/******************************************************************************* +* Function Name : SCSI_Valid_Cmd +* Description : Valid Commands routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_Valid_Cmd(uint8_t lun) +{ + if (CBW.dDataLength != 0) + { + Bot_Abort(BOTH_DIR); + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_COMMAND); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); + } + else + Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); +} +/******************************************************************************* +* Function Name : SCSI_Valid_Cmd +* Description : Valid Commands routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_TestUnitReady_Cmd(uint8_t lun) +{ + if (MAL_GetStatus(lun)) + { + Set_Scsi_Sense_Data(CBW.bLUN, NOT_READY, MEDIUM_NOT_PRESENT); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); + Bot_Abort(DIR_IN); + return; + } + else + { + Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); + } +} +/******************************************************************************* +* Function Name : SCSI_Format_Cmd +* Description : Format Commands routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_Format_Cmd(uint8_t lun) +{ + if (MAL_GetStatus(lun)) + { + Set_Scsi_Sense_Data(CBW.bLUN, NOT_READY, MEDIUM_NOT_PRESENT); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_ENABLE); + Bot_Abort(DIR_IN); + return; + } +#ifdef USE_STM3210E_EVAL + else + { + NAND_Format(); + Set_CSW (CSW_CMD_PASSED, SEND_CSW_ENABLE); + } +#endif +} +/******************************************************************************* +* Function Name : SCSI_Invalid_Cmd +* Description : Invalid Commands routine +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void SCSI_Invalid_Cmd(uint8_t lun) +{ + if (CBW.dDataLength == 0) + { + Bot_Abort(DIR_IN); + } + else + { + if ((CBW.bmFlags & 0x80) != 0) + { + Bot_Abort(DIR_IN); + } + else + { + Bot_Abort(BOTH_DIR); + } + } + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_COMMAND); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); +} + +/******************************************************************************* +* Function Name : SCSI_Address_Management +* Description : Test the received address. +* Input : uint8_t Cmd : the command can be SCSI_READ10 or SCSI_WRITE10. +* Output : None. +* Return : Read\Write status (bool). +*******************************************************************************/ +bool SCSI_Address_Management(uint8_t lun , uint8_t Cmd , uint32_t LBA , uint32_t BlockNbr) +{ + if ((LBA + BlockNbr) > Mass_Block_Count[lun] ) + { + if (Cmd == SCSI_WRITE10) + { + Bot_Abort(BOTH_DIR); + } + Bot_Abort(DIR_IN); + Set_Scsi_Sense_Data(lun, ILLEGAL_REQUEST, ADDRESS_OUT_OF_RANGE); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); + return (FALSE); + } + + if (CBW.dDataLength != BlockNbr * Mass_Block_Size[lun]) + { + if (Cmd == SCSI_WRITE10) + { + Bot_Abort(BOTH_DIR); + } + else + { + Bot_Abort(DIR_IN); + } + Set_Scsi_Sense_Data(CBW.bLUN, ILLEGAL_REQUEST, INVALID_FIELED_IN_COMMAND); + Set_CSW (CSW_CMD_FAILED, SEND_CSW_DISABLE); + return (FALSE); + } + return (TRUE); +} +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |