From afbb4cc73c44b6321cae39dbe46b97155805097d Mon Sep 17 00:00:00 2001 From: Trygve Laugstøl Date: Sun, 13 Dec 2015 21:03:11 +0100 Subject: wip --- .../RCC/RCC_ClockConfig/main.c | 715 +++++++++++++++++++++ 1 file changed, 715 insertions(+) create mode 100644 tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/main.c (limited to 'tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/main.c') diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/main.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/main.c new file mode 100644 index 0000000..8dba3b1 --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/RCC/RCC_ClockConfig/main.c @@ -0,0 +1,715 @@ +/** + ****************************************************************************** + * @file RCC/RCC_ClockConfig/main.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main program body. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/** @addtogroup STM32F10x_StdPeriph_Examples + * @{ + */ + + +/** @addtogroup RCC_ClockConfig + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +#define DELAY_COUNT 0x3FFFF + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +GPIO_InitTypeDef GPIO_InitStructure; +RCC_ClocksTypeDef RCC_ClockFreq; +ErrorStatus HSEStartUpStatus; + +/* Private function prototypes -----------------------------------------------*/ +void NVIC_Configuration(void); +void Delay(__IO uint32_t nCount); + +void SetSysClock(void); +#ifdef SYSCLK_HSE + void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_36MHz + void SetSysClockTo36(void); +#elif defined SYSCLK_FREQ_48MHz + void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + void SetSysClockTo72(void); +#endif + +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Main program. + * @param None + * @retval None + */ +int main(void) +{ + /*!< At this stage the microcontroller clock setting is already configured, + this is done through SystemInit() function which is called from startup + file (startup_stm32f10x_xx.s) before to branch to application main. + To reconfigure the default setting of SystemInit() function, refer to + system_stm32f10x.c file + */ + + /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ + SetSysClock(); + + /* This function fills the RCC_ClockFreq structure with the current + frequencies of different on chip clocks (for debug purpose) */ + RCC_GetClocksFreq(&RCC_ClockFreq); + + /* Enable Clock Security System(CSS): this will generate an NMI exception + when HSE clock fails */ + RCC_ClockSecuritySystemCmd(ENABLE); + + /* NVIC configuration ------------------------------------------------------*/ + NVIC_Configuration(); + + /* Initialize Leds mounted on STM3210X-EVAL board --------------------------*/ + STM_EVAL_LEDInit(LED1); + STM_EVAL_LEDInit(LED2); + STM_EVAL_LEDInit(LED3); + STM_EVAL_LEDInit(LED4); + + /* Output HSE clock on MCO pin ---------------------------------------------*/ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOA, &GPIO_InitStructure); + RCC_MCOConfig(RCC_MCO_HSE); + + while (1) + { + /* Toggle LED1 */ + STM_EVAL_LEDToggle(LED1); + /* Insert delay */ + Delay(DELAY_COUNT); + + /* Toggle LED2 */ + STM_EVAL_LEDToggle(LED2); + /* Insert delay */ + Delay(DELAY_COUNT); + + /* Toggle LED3 */ + STM_EVAL_LEDToggle(LED3); + /* Insert delay */ + Delay(DELAY_COUNT); + + /* Toggle LED4 */ + STM_EVAL_LEDToggle(LED4); + /* Insert a delay */ + Delay(DELAY_COUNT); + } +} + +/** + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 + * prescalers. + * @param None + * @retval None + */ +void SetSysClock(void) +{ +/* The System clock configuration functions defined below assume that: + - For Low, Medium and High density devices an external 8MHz crystal is + used to drive the System clock. + - For Connectivity line devices an external 25MHz crystal is used to drive + the System clock. + If you are using different crystal you have to adapt those functions accordingly.*/ + +#if defined SYSCLK_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_36MHz + SetSysClockTo36(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + source (default after reset) */ +} + +/** + * @brief Selects HSE as System clock source and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @param None + * @retval None + */ +void SetSysClockToHSE(void) +{ + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ + /* RCC system reset(for debug purpose) */ + RCC_DeInit(); + + /* Enable HSE */ + RCC_HSEConfig(RCC_HSE_ON); + + /* Wait till HSE is ready */ + HSEStartUpStatus = RCC_WaitForHSEStartUp(); + + if (HSEStartUpStatus == SUCCESS) + { +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); + +#ifndef STM32F10X_CL + /* Flash 0 wait state */ + FLASH_SetLatency(FLASH_Latency_0); +#else + if (HSE_Value <= 24000000) + { + /* Flash 0 wait state */ + FLASH_SetLatency(FLASH_Latency_0); + } + else + { + /* Flash 1 wait state */ + FLASH_SetLatency(FLASH_Latency_1); + } + +#endif /* STM32F10X_CL */ +#endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */ + + /* HCLK = SYSCLK */ + RCC_HCLKConfig(RCC_SYSCLK_Div1); + + /* PCLK2 = HCLK */ + RCC_PCLK2Config(RCC_HCLK_Div1); + + /* PCLK1 = HCLK */ + RCC_PCLK1Config(RCC_HCLK_Div1); + + /* Select HSE as system clock source */ + RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE); + + /* Wait till PLL is used as system clock source */ + while (RCC_GetSYSCLKSource() != 0x04) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock configuration. + User can add here some code to deal with this error */ + + /* Go to infinite loop */ + while (1) + { + } + } +} + +/** + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @param None + * @retval None + */ +void SetSysClockTo24(void) +{ + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ + /* RCC system reset(for debug purpose) */ + RCC_DeInit(); + + /* Enable HSE */ + RCC_HSEConfig(RCC_HSE_ON); + + /* Wait till HSE is ready */ + HSEStartUpStatus = RCC_WaitForHSEStartUp(); + + if (HSEStartUpStatus == SUCCESS) + { +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); + + /* Flash 0 wait state */ + FLASH_SetLatency(FLASH_Latency_0); +#endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */ + + /* HCLK = SYSCLK */ + RCC_HCLKConfig(RCC_SYSCLK_Div1); + + /* PCLK2 = HCLK */ + RCC_PCLK2Config(RCC_HCLK_Div1); + + /* PCLK1 = HCLK */ + RCC_PCLK1Config(RCC_HCLK_Div1); + +#ifdef STM32F10X_CL + /* Configure PLLs *********************************************************/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + RCC_PREDIV2Config(RCC_PREDIV2_Div5); + RCC_PLL2Config(RCC_PLL2Mul_8); + + /* Enable PLL2 */ + RCC_PLL2Cmd(ENABLE); + + /* Wait till PLL2 is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) + {} + + /* PLL configuration: PLLCLK = (PLL2 / 10) * 6 = 24 MHz */ + RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div10); + RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6); +#elif defined STM32F10X_LD_VL || defined STM32F10X_MD_VL || defined STM32F10X_HD_VL + /* PLLCLK = (8MHz/2) * 6 = 24 MHz */ + RCC_PREDIV1Config(RCC_PREDIV1_Source_HSE, RCC_PREDIV1_Div2); + RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6); +#else + /* PLLCLK = 8MHz * 3 = 24 MHz */ + RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_3); +#endif + + /* Enable PLL */ + RCC_PLLCmd(ENABLE); + + /* Wait till PLL is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) + { + } + + /* Select PLL as system clock source */ + RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); + + /* Wait till PLL is used as system clock source */ + while (RCC_GetSYSCLKSource() != 0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock configuration. + User can add here some code to deal with this error */ + + /* Go to infinite loop */ + while (1) + { + } + } +} +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL +/** + * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @param None + * @retval None + */ +void SetSysClockTo36(void) +{ + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ + /* RCC system reset(for debug purpose) */ + RCC_DeInit(); + + /* Enable HSE */ + RCC_HSEConfig(RCC_HSE_ON); + + /* Wait till HSE is ready */ + HSEStartUpStatus = RCC_WaitForHSEStartUp(); + + if (HSEStartUpStatus == SUCCESS) + { + /* Enable Prefetch Buffer */ + FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); + + /* Flash 1 wait state */ + FLASH_SetLatency(FLASH_Latency_1); + + /* HCLK = SYSCLK */ + RCC_HCLKConfig(RCC_SYSCLK_Div1); + + /* PCLK2 = HCLK */ + RCC_PCLK2Config(RCC_HCLK_Div1); + + /* PCLK1 = HCLK */ + RCC_PCLK1Config(RCC_HCLK_Div1); + +#ifdef STM32F10X_CL + /* Configure PLLs *********************************************************/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + RCC_PREDIV2Config(RCC_PREDIV2_Div5); + RCC_PLL2Config(RCC_PLL2Mul_8); + + /* Enable PLL2 */ + RCC_PLL2Cmd(ENABLE); + + /* Wait till PLL2 is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) + {} + + /* PLL configuration: PLLCLK = (PLL2 / 10) * 9 = 36 MHz */ + RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div10); + RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9); +#else + /* PLLCLK = (8MHz / 2) * 9 = 36 MHz */ + RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_9); +#endif + + /* Enable PLL */ + RCC_PLLCmd(ENABLE); + + /* Wait till PLL is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) + { + } + + /* Select PLL as system clock source */ + RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); + + /* Wait till PLL is used as system clock source */ + while (RCC_GetSYSCLKSource() != 0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock configuration. + User can add here some code to deal with this error */ + + /* Go to infinite loop */ + while (1) + { + } + } +} + +/** + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @param None + * @retval None + */ +void SetSysClockTo48(void) +{ + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ + /* RCC system reset(for debug purpose) */ + RCC_DeInit(); + + /* Enable HSE */ + RCC_HSEConfig(RCC_HSE_ON); + + /* Wait till HSE is ready */ + HSEStartUpStatus = RCC_WaitForHSEStartUp(); + + if (HSEStartUpStatus == SUCCESS) + { + /* Enable Prefetch Buffer */ + FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); + + /* Flash 1 wait state */ + FLASH_SetLatency(FLASH_Latency_1); + + /* HCLK = SYSCLK */ + RCC_HCLKConfig(RCC_SYSCLK_Div1); + + /* PCLK2 = HCLK */ + RCC_PCLK2Config(RCC_HCLK_Div1); + + /* PCLK1 = HCLK/2 */ + RCC_PCLK1Config(RCC_HCLK_Div2); + +#ifdef STM32F10X_CL + /* Configure PLLs *********************************************************/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + RCC_PREDIV2Config(RCC_PREDIV2_Div5); + RCC_PLL2Config(RCC_PLL2Mul_8); + + /* Enable PLL2 */ + RCC_PLL2Cmd(ENABLE); + + /* Wait till PLL2 is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) + {} + + /* PLL configuration: PLLCLK = (PLL2 / 5) * 6 = 48 MHz */ + RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); + RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_6); +#else + /* PLLCLK = 8MHz * 6 = 48 MHz */ + RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_6); +#endif + + /* Enable PLL */ + RCC_PLLCmd(ENABLE); + + /* Wait till PLL is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) + { + } + + /* Select PLL as system clock source */ + RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); + + /* Wait till PLL is used as system clock source */ + while (RCC_GetSYSCLKSource() != 0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock configuration. + User can add here some code to deal with this error */ + + /* Go to infinite loop */ + while (1) + { + } + } +} + +/** + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @param None + * @retval None + */ +void SetSysClockTo56(void) +{ + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ + /* RCC system reset(for debug purpose) */ + RCC_DeInit(); + + /* Enable HSE */ + RCC_HSEConfig(RCC_HSE_ON); + + /* Wait till HSE is ready */ + HSEStartUpStatus = RCC_WaitForHSEStartUp(); + + if (HSEStartUpStatus == SUCCESS) + { + /* Enable Prefetch Buffer */ + FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); + + /* Flash 2 wait state */ + FLASH_SetLatency(FLASH_Latency_2); + + /* HCLK = SYSCLK */ + RCC_HCLKConfig(RCC_SYSCLK_Div1); + + /* PCLK2 = HCLK */ + RCC_PCLK2Config(RCC_HCLK_Div1); + + /* PCLK1 = HCLK/2 */ + RCC_PCLK1Config(RCC_HCLK_Div2); + +#ifdef STM32F10X_CL + /* Configure PLLs *********************************************************/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + RCC_PREDIV2Config(RCC_PREDIV2_Div5); + RCC_PLL2Config(RCC_PLL2Mul_8); + + /* Enable PLL2 */ + RCC_PLL2Cmd(ENABLE); + + /* Wait till PLL2 is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) + {} + + /* PLL configuration: PLLCLK = (PLL2 / 5) * 7 = 56 MHz */ + RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); + RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_7); +#else + /* PLLCLK = 8MHz * 7 = 56 MHz */ + RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_7); +#endif + + /* Enable PLL */ + RCC_PLLCmd(ENABLE); + + /* Wait till PLL is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) + { + } + + /* Select PLL as system clock source */ + RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); + + /* Wait till PLL is used as system clock source */ + while (RCC_GetSYSCLKSource() != 0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock configuration. + User can add here some code to deal with this error */ + + /* Go to infinite loop */ + while (1) + { + } + } +} + +/** + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @param None + * @retval None + */ +void SetSysClockTo72(void) +{ + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------------------------*/ + /* RCC system reset(for debug purpose) */ + RCC_DeInit(); + + /* Enable HSE */ + RCC_HSEConfig(RCC_HSE_ON); + + /* Wait till HSE is ready */ + HSEStartUpStatus = RCC_WaitForHSEStartUp(); + + if (HSEStartUpStatus == SUCCESS) + { + /* Enable Prefetch Buffer */ + FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); + + /* Flash 2 wait state */ + FLASH_SetLatency(FLASH_Latency_2); + + /* HCLK = SYSCLK */ + RCC_HCLKConfig(RCC_SYSCLK_Div1); + + /* PCLK2 = HCLK */ + RCC_PCLK2Config(RCC_HCLK_Div1); + + /* PCLK1 = HCLK/2 */ + RCC_PCLK1Config(RCC_HCLK_Div2); + +#ifdef STM32F10X_CL + /* Configure PLLs *********************************************************/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + RCC_PREDIV2Config(RCC_PREDIV2_Div5); + RCC_PLL2Config(RCC_PLL2Mul_8); + + /* Enable PLL2 */ + RCC_PLL2Cmd(ENABLE); + + /* Wait till PLL2 is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) + {} + + /* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */ + RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); + RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9); +#else + /* PLLCLK = 8MHz * 9 = 72 MHz */ + RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); +#endif + + /* Enable PLL */ + RCC_PLLCmd(ENABLE); + + /* Wait till PLL is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) + { + } + + /* Select PLL as system clock source */ + RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); + + /* Wait till PLL is used as system clock source */ + while(RCC_GetSYSCLKSource() != 0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock configuration. + User can add here some code to deal with this error */ + + /* Go to infinite loop */ + while (1) + { + } + } +} + +#endif /* STM32F10X_LD_VL && STM32F10X_MD_VL */ + +/** + * @brief Configures Vector Table base location. + * @param None + * @retval None + */ +void NVIC_Configuration(void) +{ + NVIC_InitTypeDef NVIC_InitStructure; + + /* Enable and configure RCC global IRQ channel */ + NVIC_InitStructure.NVIC_IRQChannel = RCC_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); +} + +/** + * @brief Inserts a delay time. + * @param nCount: specifies the delay time length. + * @retval None + */ +void Delay(__IO uint32_t nCount) +{ + for(; nCount!= 0;nCount--); +} + +#ifdef USE_FULL_ASSERT + +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + /* Infinite loop */ + while (1) + { + } +} + +#endif + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3