From afbb4cc73c44b6321cae39dbe46b97155805097d Mon Sep 17 00:00:00 2001 From: Trygve Laugstøl Date: Sun, 13 Dec 2015 21:03:11 +0100 Subject: wip --- .../TIM/TimeBase/main.c | 221 +++++++++++++++++++++ 1 file changed, 221 insertions(+) create mode 100644 tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/TimeBase/main.c (limited to 'tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/TimeBase/main.c') diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/TimeBase/main.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/TimeBase/main.c new file mode 100644 index 0000000..d142cfb --- /dev/null +++ b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/TIM/TimeBase/main.c @@ -0,0 +1,221 @@ +/** + ****************************************************************************** + * @file TIM/TimeBase/main.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main program body + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Examples + * @{ + */ + +/** @addtogroup TIM_TimeBase + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; +TIM_OCInitTypeDef TIM_OCInitStructure; +__IO uint16_t CCR1_Val = 40961; +__IO uint16_t CCR2_Val = 27309; +__IO uint16_t CCR3_Val = 13654; +__IO uint16_t CCR4_Val = 6826; +uint16_t PrescalerValue = 0; + +/* Private function prototypes -----------------------------------------------*/ +void RCC_Configuration(void); +void GPIO_Configuration(void); +void NVIC_Configuration(void); + +/* Private functions ---------------------------------------------------------*/ + +/** + * @brief Main program + * @param None + * @retval None + */ +int main(void) +{ + /*!< At this stage the microcontroller clock setting is already configured, + this is done through SystemInit() function which is called from startup + file (startup_stm32f10x_xx.s) before to branch to application main. + To reconfigure the default setting of SystemInit() function, refer to + system_stm32f10x.c file + */ + + /* System Clocks Configuration */ + RCC_Configuration(); + + /* NVIC Configuration */ + NVIC_Configuration(); + + /* GPIO Configuration */ + GPIO_Configuration(); + + /* --------------------------------------------------------------- + TIM2 Configuration: Output Compare Timing Mode: + TIM2 counter clock at 6 MHz + CC1 update rate = TIM2 counter clock / CCR1_Val = 146.48 Hz + CC2 update rate = TIM2 counter clock / CCR2_Val = 219.7 Hz + CC3 update rate = TIM2 counter clock / CCR3_Val = 439.4 Hz + CC4 update rate = TIM2 counter clock / CCR4_Val = 878.9 Hz + --------------------------------------------------------------- */ + + /* Compute the prescaler value */ + PrescalerValue = (uint16_t) (SystemCoreClock / 12000000) - 1; + + /* Time base configuration */ + TIM_TimeBaseStructure.TIM_Period = 65535; + TIM_TimeBaseStructure.TIM_Prescaler = 0; + TIM_TimeBaseStructure.TIM_ClockDivision = 0; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + + TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); + + /* Prescaler configuration */ + TIM_PrescalerConfig(TIM2, PrescalerValue, TIM_PSCReloadMode_Immediate); + + /* Output Compare Timing Mode configuration: Channel1 */ + TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Timing; + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = CCR1_Val; + TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; + + TIM_OC1Init(TIM2, &TIM_OCInitStructure); + + TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Disable); + + /* Output Compare Timing Mode configuration: Channel2 */ + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = CCR2_Val; + + TIM_OC2Init(TIM2, &TIM_OCInitStructure); + + TIM_OC2PreloadConfig(TIM2, TIM_OCPreload_Disable); + + /* Output Compare Timing Mode configuration: Channel3 */ + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = CCR3_Val; + + TIM_OC3Init(TIM2, &TIM_OCInitStructure); + + TIM_OC3PreloadConfig(TIM2, TIM_OCPreload_Disable); + + /* Output Compare Timing Mode configuration: Channel4 */ + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = CCR4_Val; + + TIM_OC4Init(TIM2, &TIM_OCInitStructure); + + TIM_OC4PreloadConfig(TIM2, TIM_OCPreload_Disable); + + /* TIM IT enable */ + TIM_ITConfig(TIM2, TIM_IT_CC1 | TIM_IT_CC2 | TIM_IT_CC3 | TIM_IT_CC4, ENABLE); + + /* TIM2 enable counter */ + TIM_Cmd(TIM2, ENABLE); + + while (1); +} + +/** + * @brief Configures the different system clocks. + * @param None + * @retval None + */ +void RCC_Configuration(void) +{ + /* PCLK1 = HCLK/4 */ + RCC_PCLK1Config(RCC_HCLK_Div4); + + /* TIM2 clock enable */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); + + /* GPIOC clock enable */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); +} + +/** + * @brief Configure the GPIO Pins. + * @param None + * @retval None + */ +void GPIO_Configuration(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* GPIOC Configuration:Pin6, 7, 8 and 9 as alternate function push-pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + + GPIO_Init(GPIOC, &GPIO_InitStructure); +} + +/** + * @brief Configure the nested vectored interrupt controller. + * @param None + * @retval None + */ +void NVIC_Configuration(void) +{ + NVIC_InitTypeDef NVIC_InitStructure; + + /* Enable the TIM2 global Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + + NVIC_Init(&NVIC_InitStructure); +} + +#ifdef USE_FULL_ASSERT + +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + while (1) + {} +} + +#endif + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3