/** ****************************************************************************** * @file I2S/Interrupt/main.c * @author MCD Application Team * @version V3.5.0 * @date 08-April-2011 * @brief Main program body ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * *

© COPYRIGHT 2011 STMicroelectronics

****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ #include "stm32f10x.h" /** @addtogroup STM32F10x_StdPeriph_Examples * @{ */ /** @addtogroup I2S_Interrupt * @{ */ /* Private typedef -----------------------------------------------------------*/ typedef enum {FAILED = 0, PASSED = !FAILED} TestStatus; /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ I2S_InitTypeDef I2S_InitStructure; const uint16_t I2S3_Buffer_Tx[32] = {0x0102, 0x0304, 0x0506, 0x0708, 0x090A, 0x0B0C, 0x0D0E, 0x0F10, 0x1112, 0x1314, 0x1516, 0x1718, 0x191A, 0x1B1C, 0x1D1E, 0x1F20, 0x2122, 0x2324, 0x2526, 0x2728, 0x292A, 0x2B2C, 0x2D2E, 0x2F30, 0x3132, 0x3334, 0x3536, 0x3738, 0x393A, 0x3B3C, 0x3D3E, 0x3F40}; uint16_t I2S2_Buffer_Rx[32]; __IO uint32_t TxIdx = 0, RxIdx = 0; TestStatus TransferStatus1 = FAILED, TransferStatus2 = FAILED; ErrorStatus HSEStartUpStatus; /* Private function prototypes -----------------------------------------------*/ void RCC_Configuration(void); void GPIO_Configuration(void); void NVIC_Configuration(void); TestStatus Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength); TestStatus Buffercmp24bits(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength); /* Private functions ---------------------------------------------------------*/ /** * @brief Main program * @param None * @retval None */ int main(void) { /*!< At this stage the microcontroller clock setting is already configured, this is done through SystemInit() function which is called from startup file (startup_stm32f10x_xx.s) before to branch to application main. To reconfigure the default setting of SystemInit() function, refer to system_stm32f10x.c file */ /* System clocks configuration ---------------------------------------------*/ RCC_Configuration(); /* NVIC configuration ------------------------------------------------------*/ NVIC_Configuration(); /* GPIO configuration ------------------------------------------------------*/ GPIO_Configuration(); SPI_I2S_DeInit(SPI3); SPI_I2S_DeInit(SPI2); /* I2S peripheral configuration */ I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips; I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16bextended; I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable; I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_48k; I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low; /* I2S3 Master Transmitter to I2S2 Slave Receiver communication -----------*/ /* I2S3 configuration */ I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx; I2S_Init(SPI3, &I2S_InitStructure); /* I2S2 configuration */ I2S_InitStructure.I2S_Mode = I2S_Mode_SlaveRx; I2S_Init(SPI2, &I2S_InitStructure); /* Enable the I2S3 TxE interrupt */ SPI_I2S_ITConfig(SPI3, SPI_I2S_IT_TXE, ENABLE); /* Enable the I2S2 RxNE interrupt */ SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, ENABLE); /* Enable the I2S2 */ I2S_Cmd(SPI2, ENABLE); /* Enable the I2S3 */ I2S_Cmd(SPI3, ENABLE); /* Wait the end of communication */ while (RxIdx < 32) {} TransferStatus1 = Buffercmp(I2S2_Buffer_Rx, (uint16_t*)I2S3_Buffer_Tx, 32); /* TransferStatus1 = PASSED, if the data transmitted from I2S3 and received by I2S2 are the same TransferStatus1 = FAILED, if the data transmitted from I2S3 and received by I2S2 are different */ /* Reinitialize the buffers */ for (RxIdx = 0; RxIdx < 32; RxIdx++) { I2S2_Buffer_Rx[RxIdx] = 0; } TxIdx = 0; RxIdx = 0; SPI_I2S_DeInit(SPI3); SPI_I2S_DeInit(SPI2); /* I2S peripheral configuration */ I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips; I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_24b; I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable; I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_16k; I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low; /* I2S3 Master Transmitter to I2S2 Slave Receiver communication -----------*/ /* I2S3 configuration */ I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx; I2S_Init(SPI3, &I2S_InitStructure); /* I2S2 configuration */ I2S_InitStructure.I2S_Mode = I2S_Mode_SlaveRx; I2S_Init(SPI2, &I2S_InitStructure); /* Enable the I2S3 TxE interrupt */ SPI_I2S_ITConfig(SPI3, SPI_I2S_IT_TXE, ENABLE); /* Enable the I2S2 RxNE interrupt */ SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, ENABLE); /* Enable the I2S2 */ I2S_Cmd(SPI2, ENABLE); /* Enable the I2S3 */ I2S_Cmd(SPI3, ENABLE); /* Wait the end of communication */ while (RxIdx < 32) { } TransferStatus2 = Buffercmp24bits(I2S2_Buffer_Rx, (uint16_t*)I2S3_Buffer_Tx, 32); /* TransferStatus2 = PASSED, if the data transmitted from I2S3 and received by I2S2 are the same TransferStatus2 = FAILED, if the data transmitted from I2S3 and received by I2S2 are different */ while (1) { } } /** * @brief Configures the different system clocks. * @param None * @retval None */ void RCC_Configuration(void) { /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable HSE */ RCC_HSEConfig(RCC_HSE_ON); /* Wait till HSE is ready */ HSEStartUpStatus = RCC_WaitForHSEStartUp(); if(HSEStartUpStatus == SUCCESS) { /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* ADCCLK = PCLK2/4 */ RCC_ADCCLKConfig(RCC_PCLK2_Div4); #ifndef STM32F10X_CL /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); #else /* Configure PLLs *********************************************************/ /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ RCC_PREDIV2Config(RCC_PREDIV2_Div5); RCC_PLL2Config(RCC_PLL2Mul_8); /* Enable PLL2 */ RCC_PLL2Cmd(ENABLE); /* Wait till PLL2 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL2RDY) == RESET) {} /* PLL configuration: PLLCLK = (PLL2 / 5) * 9 = 72 MHz */ RCC_PREDIV1Config(RCC_PREDIV1_Source_PLL2, RCC_PREDIV1_Div5); RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_9); /* PLL3 configuration: PLL3CLK = (HSE / 5) * 11 => PLL3_VCO = 110 MHz */ RCC_PLL3Config(RCC_PLL3Mul_11); /* Enable PLL3 */ RCC_PLL3Cmd(ENABLE); /* Wait till PLL3 is ready */ while (RCC_GetFlagStatus(RCC_FLAG_PLL3RDY) == RESET) {} /* Configure I2S clock source: On Connectivity Line Devices, the I2S can be clocked by PLL3 VCO instead of SYS_CLK in order to guarantee higher precision */ RCC_I2S3CLKConfig(RCC_I2S3CLKSource_PLL3_VCO); RCC_I2S2CLKConfig(RCC_I2S2CLKSource_PLL3_VCO); #endif /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } /* Enable peripheral clocks ------------------------------------------------*/ /* GPIOA, GPIOB and AFIO clocks enable */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE); #ifdef USE_STM3210C_EVAL /* GPIOC Clock enable (for the SPI3 remapped pins) */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC , ENABLE); #endif /* USE_STM3210C_EVAL */ /* SPI3 and SPI2 clocks enable */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3 | RCC_APB1Periph_SPI2, ENABLE); } /** * @brief Configures the different GPIO ports. * @param None * @retval None */ void GPIO_Configuration(void) { GPIO_InitTypeDef GPIO_InitStructure; #ifdef USE_STM3210E_EVAL /* Disable the JTAG interface and enable the SWJ interface This operation is not necessary for Connectivity Line devices since SPI3 I/Os can be remapped on other GPIO pins */ GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE); #endif /* USE_STM3210E_EVAL */ /* Configure SPI2 pins: CK, WS and SD ---------------------------------*/ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(GPIOB, &GPIO_InitStructure); #ifdef USE_STM3210C_EVAL /* Remap SPI3 on PC10-PC11-PC12-PA4 GPIO pins ------------------------*/ GPIO_PinRemapConfig(GPIO_Remap_SPI3, ENABLE); /* Configure SPI3 pins: CK and SD ------------------------------------*/ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_12; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOC, &GPIO_InitStructure); /* Configure SPI3 pins: WS -------------------------------------------*/ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4; GPIO_Init(GPIOA, &GPIO_InitStructure); #elif defined (USE_STM3210E_EVAL) /* Configure SPI3 pins: CK and SD ------------------------------------*/ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_5; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(GPIOB, &GPIO_InitStructure); /* Configure SPI3 pins: WS -------------------------------------------*/ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; GPIO_Init(GPIOA, &GPIO_InitStructure); #endif /* USE_STM3210C_EVAL */ } /** * @brief Configure the nested vectored interrupt controller. * @param None * @retval None */ void NVIC_Configuration(void) { NVIC_InitTypeDef NVIC_InitStructure; NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0); /* SPI3 IRQ Channel configuration */ NVIC_InitStructure.NVIC_IRQChannel = SPI3_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); /* SPI2 IRQ channel configuration */ NVIC_InitStructure.NVIC_IRQChannel = SPI2_IRQn; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_Init(&NVIC_InitStructure); } /** * @brief Compares two buffers. * @param pBuffer1, pBuffer2: buffers to be compared. * @param BufferLength: buffer's length * @retval PASSED: pBuffer1 identical to pBuffer2 * FAILED: pBuffer1 differs from pBuffer2 */ TestStatus Buffercmp(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength) { while (BufferLength--) { if (*pBuffer1 != *pBuffer2) { return FAILED; } pBuffer1++; pBuffer2++; } return PASSED; } /** * @brief Compares two buffers in 24 bits data format. * @param pBuffer1, pBuffer2: buffers to be compared. * @param BufferLength: buffer's length * @retval PASSED: pBuffer1 identical to pBuffer2 * FAILED: pBuffer1 differs from pBuffer2 */ TestStatus Buffercmp24bits(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength) { while (BufferLength--) { if (*pBuffer1 != *pBuffer2) { if (*pBuffer1 != (*pBuffer2 & 0xFF00)) { return FAILED; } } pBuffer1++; pBuffer2++; } return PASSED; } #ifdef USE_FULL_ASSERT /** * @brief Reports the name of the source file and the source line number * where the assert_param error has occurred. * @param file: pointer to the source file name * @param line: assert_param error line source number * @retval None */ void assert_failed(uint8_t* file, uint32_t line) { /* User can add his own implementation to report the file name and line number, ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ /* Infinite loop */ while (1) {} } #endif /** * @} */ /** * @} */ /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/