summaryrefslogtreecommitdiff
path: root/cmake/elfinfo/lds
diff options
context:
space:
mode:
authorTrygve Laugstøl <trygvis@inamo.no>2016-07-03 11:22:26 +0200
committerTrygve Laugstøl <trygvis@inamo.no>2016-07-03 11:22:26 +0200
commitead2f1961fc653861a151a033c3cd0657c50af16 (patch)
treecc28f63f2fd690bd9287c7793cda1b604560e912 /cmake/elfinfo/lds
parent4b0939539fb99ee8a399d8a59d295ff94c1eeebc (diff)
downloadintel-quark-d2000-playground-ead2f1961fc653861a151a033c3cd0657c50af16.tar.gz
intel-quark-d2000-playground-ead2f1961fc653861a151a033c3cd0657c50af16.tar.bz2
intel-quark-d2000-playground-ead2f1961fc653861a151a033c3cd0657c50af16.tar.xz
intel-quark-d2000-playground-ead2f1961fc653861a151a033c3cd0657c50af16.zip
LD file Antlr4 grammar. Generates a lexer and parser for Java.
Diffstat (limited to 'cmake/elfinfo/lds')
-rw-r--r--cmake/elfinfo/lds/d2000.ld85
-rw-r--r--cmake/elfinfo/lds/stm32.ld62
2 files changed, 147 insertions, 0 deletions
diff --git a/cmake/elfinfo/lds/d2000.ld b/cmake/elfinfo/lds/d2000.ld
new file mode 100644
index 0000000..ef253c6
--- /dev/null
+++ b/cmake/elfinfo/lds/d2000.ld
@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2015, Intel Corporation
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of the Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL CORPORATION OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ENTRY(_start)
+
+MEMORY
+{
+ flash(r) : ORIGIN = 0x00180000, LENGTH = 32K
+ data(rw) : ORIGIN = 0x00200000, LENGTH = 4K
+ /* Place IDT at the bottom of SRAM, 52 gate wide */
+ esram_idt (rw) : ORIGIN = 0x00280000, LENGTH = 0x1A0
+ esram(rw) : ORIGIN = 0x002801A0, LENGTH = 8K - 1K - 0x1A0
+ stack(rw) : ORIGIN = 0x00281C00, LENGTH = 1K
+}
+
+/* IDT definition */
+__idt_start = ORIGIN(esram_idt);
+__idt_end = __idt_start + LENGTH(esram_idt);
+
+SECTIONS
+{
+ .text :
+ {
+ *(.text.entry)
+ *(.text)
+ *(.text.last)
+ *(.text.*)
+ } >flash
+
+ .rodata :
+ {
+ *(.rdata*)
+ *(.rodata*)
+ } >flash
+
+ .data :
+ {
+ *(.data*)
+ } >esram AT>flash
+
+ .bss :
+ {
+ *(.bss*)
+ *(COMMON)
+ } >esram AT>esram
+
+ /* Symbols for C runtime init code. */
+ __data_lma = LOADADDR(.data);
+ __data_vma = ADDR(.data);
+ __data_size = SIZEOF(.data);
+ __bss_start = ADDR(.bss);
+ __bss_end = __bss_start + SIZEOF(.bss);
+
+ /* Heap */
+ __heap = .;
+ __heap_end = ORIGIN(stack);
+
+ .comment 0 : { *(.comment) }
+}
diff --git a/cmake/elfinfo/lds/stm32.ld b/cmake/elfinfo/lds/stm32.ld
new file mode 100644
index 0000000..bafd520
--- /dev/null
+++ b/cmake/elfinfo/lds/stm32.ld
@@ -0,0 +1,62 @@
+ENTRY(_Reset_Handler)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 64K
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20k
+ MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
+}
+
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+SECTIONS
+{
+ /* Put the ISR section at the start of the flash area */
+ .isr :
+ {
+ /* The first word has to be the initial stack pointer */
+ LONG(__initial_stack_pointer);
+ KEEP(*/init_high.cpp.obj(.isr_vectors))
+ } >FLASH
+ ASSERT(SIZEOF(.isr) > 100, "The isr_vectors section is too small")
+ ASSERT(SIZEOF(.isr) < 1000, "The isr_vectors section is too big")
+ ASSERT(ADDR(.isr) == ORIGIN(FLASH), "The isr_vectors section was not placed at the start of the flash area")
+
+ .text :
+ {
+ *(.text)
+ KEEP(*(.text.*))
+ *(.rodata*)
+ } >FLASH
+
+ .init_arrays :
+ {
+ _init_array_start = .;
+ KEEP(*(.init_array))
+ KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
+ _init_array_end = .;
+ } >FLASH
+
+ . = ORIGIN(RAM);
+
+ .data ALIGN(4) :
+ {
+ *(.data)
+ *(.data.*)
+ } >RAM AT >FLASH
+
+ .bss ALIGN(4) (NOLOAD) :
+ {
+ *(.bss)
+ *(.bss.*)
+ } >RAM
+
+ _copy_data_store = ADDR(.data);
+ _copy_data_store_end = _copy_data_store + SIZEOF(.data);
+ _copy_data_load = LOADADDR(.data);
+
+ _bss_start = ADDR(.bss);
+ _bss_end = _bss_start + SIZEOF(.bss);
+
+ __initial_stack_pointer = ORIGIN(RAM) + LENGTH(RAM) - 1;
+}