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-rw-r--r--bsp/radio-controller-1/.mxproject2
-rw-r--r--bsp/radio-controller-1/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_iwdg.h299
-rw-r--r--bsp/radio-controller-1/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c360
-rw-r--r--bsp/radio-controller-1/Inc/main.h2
-rw-r--r--bsp/radio-controller-1/Inc/stm32f1xx_hal_conf.h4
-rw-r--r--bsp/radio-controller-1/Inc/stm32f1xx_it.h1
-rw-r--r--bsp/radio-controller-1/Src/main.c59
-rw-r--r--bsp/radio-controller-1/Src/stm32f1xx_hal_msp.c30
-rw-r--r--bsp/radio-controller-1/Src/stm32f1xx_it.c17
-rw-r--r--bsp/radio-controller-1/radio-controller-1.gpdsc75
-rw-r--r--bsp/radio-controller-1/radio-controller-1.ioc39
11 files changed, 766 insertions, 122 deletions
diff --git a/bsp/radio-controller-1/.mxproject b/bsp/radio-controller-1/.mxproject
index 1640427..f040835 100644
--- a/bsp/radio-controller-1/.mxproject
+++ b/bsp/radio-controller-1/.mxproject
@@ -1,5 +1,5 @@
[PreviousLibFiles]
-LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usb.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/core_sc000.h;
+LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usb.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_iwdg.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h;Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc/usbd_cdc.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103x6.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/core_sc000.h;
[]
SourceFiles=;null;
diff --git a/bsp/radio-controller-1/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_iwdg.h b/bsp/radio-controller-1/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_iwdg.h
new file mode 100644
index 0000000..86a7f5a
--- /dev/null
+++ b/bsp/radio-controller-1/Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_iwdg.h
@@ -0,0 +1,299 @@
+/**
+ ******************************************************************************
+ * @file stm32f1xx_hal_iwdg.h
+ * @author MCD Application Team
+ * @version V1.0.4
+ * @date 29-April-2016
+ * @brief Header file of IWDG HAL module.
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F1xx_HAL_IWDG_H
+#define __STM32F1xx_HAL_IWDG_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal_def.h"
+
+/** @addtogroup STM32F1xx_HAL_Driver
+ * @{
+ */
+
+/** @addtogroup IWDG
+ * @{
+ */
+
+/* Exported types ------------------------------------------------------------*/
+
+/** @defgroup IWDG_Exported_Types IWDG Exported Types
+ * @{
+ */
+
+/**
+ * @brief IWDG HAL State Structure definition
+ */
+typedef enum
+{
+ HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */
+ HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */
+ HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */
+ HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */
+ HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */
+
+}HAL_IWDG_StateTypeDef;
+
+/**
+ * @brief IWDG Init structure definition
+ */
+typedef struct
+{
+ uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
+ This parameter can be a value of @ref IWDG_Prescaler */
+
+ uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
+ This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
+
+}IWDG_InitTypeDef;
+
+/**
+ * @brief IWDG Handle Structure definition
+ */
+typedef struct
+{
+ IWDG_TypeDef *Instance; /*!< Register base address */
+
+ IWDG_InitTypeDef Init; /*!< IWDG required parameters */
+
+ HAL_LockTypeDef Lock; /*!< IWDG Locking object */
+
+ __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */
+
+}IWDG_HandleTypeDef;
+
+/**
+ * @}
+ */
+
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
+ * @{
+ */
+
+/** @defgroup IWDG_Registers_BitMask IWDG Registers BitMask
+ * @brief IWDG registers bit mask
+ * @{
+ */
+/* --- KR Register ---*/
+/* KR register bit mask */
+#define IWDG_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */
+#define IWDG_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */
+#define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */
+#define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */
+
+/**
+ * @}
+ */
+
+/** @defgroup IWDG_Flag_definition IWDG Flag definition
+ * @{
+ */
+#define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update Flag */
+#define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update Flag */
+
+/**
+ * @}
+ */
+
+/** @defgroup IWDG_Prescaler IWDG Prescaler
+ * @{
+ */
+#define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */
+#define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */
+#define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */
+#define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */
+#define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */
+#define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */
+#define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/* Exported macros -----------------------------------------------------------*/
+
+/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
+ * @{
+ */
+
+/** @brief Reset IWDG handle state
+ * @param __HANDLE__: IWDG handle.
+ * @retval None
+ */
+#define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
+
+/**
+ * @brief Enables the IWDG peripheral.
+ * @param __HANDLE__: IWDG handle
+ * @retval None
+ */
+#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
+
+/**
+ * @brief Reloads IWDG counter with value defined in the reload register
+ * (write access to IWDG_PR and IWDG_RLR registers disabled).
+ * @param __HANDLE__: IWDG handle
+ * @retval None
+ */
+#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
+
+
+
+/**
+ * @brief Gets the selected IWDG's flag status.
+ * @param __HANDLE__: IWDG handle
+ * @param __FLAG__: specifies the flag to check.
+ * This parameter can be one of the following values:
+ * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
+ * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
+ * @retval The new state of __FLAG__ (TRUE or FALSE).
+ */
+#define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
+
+/**
+ * @}
+ */
+
+/* Private macro -------------------------------------------------------------*/
+
+/** @defgroup IWDG_Private_Macros IWDG Private Macros
+ * @{
+ */
+
+
+/**
+ * @brief Enables write access to IWDG_PR and IWDG_RLR registers.
+ * @param __HANDLE__: IWDG handle
+ * @retval None
+ */
+#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
+
+/**
+ * @brief Disables write access to IWDG_PR and IWDG_RLR registers.
+ * @param __HANDLE__: IWDG handle
+ * @retval None
+ */
+#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
+
+
+#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
+ ((__PRESCALER__) == IWDG_PRESCALER_8) || \
+ ((__PRESCALER__) == IWDG_PRESCALER_16) || \
+ ((__PRESCALER__) == IWDG_PRESCALER_32) || \
+ ((__PRESCALER__) == IWDG_PRESCALER_64) || \
+ ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
+ ((__PRESCALER__) == IWDG_PRESCALER_256))
+
+
+#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF)
+
+
+/**
+ * @}
+ */
+
+
+
+/* Exported functions --------------------------------------------------------*/
+
+/** @addtogroup IWDG_Exported_Functions
+ * @{
+ */
+
+/** @addtogroup IWDG_Exported_Functions_Group1
+ * @{
+ */
+/* Initialization/de-initialization functions ********************************/
+HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
+void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
+
+/**
+ * @}
+ */
+
+/** @addtogroup IWDG_Exported_Functions_Group2
+ * @{
+ */
+/* I/O operation functions ****************************************************/
+HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
+HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
+
+/**
+ * @}
+ */
+
+/** @addtogroup IWDG_Exported_Functions_Group3
+ * @{
+ */
+/* Peripheral State functions ************************************************/
+HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F1xx_HAL_IWDG_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/bsp/radio-controller-1/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c b/bsp/radio-controller-1/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c
new file mode 100644
index 0000000..f867c7c
--- /dev/null
+++ b/bsp/radio-controller-1/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c
@@ -0,0 +1,360 @@
+/**
+ ******************************************************************************
+ * @file stm32f1xx_hal_iwdg.c
+ * @author MCD Application Team
+ * @version V1.0.4
+ * @date 29-April-2016
+ * @brief IWDG HAL module driver.
+ * This file provides firmware functions to manage the following
+ * functionalities of the Independent Watchdog (IWDG) peripheral:
+ * + Initialization and Configuration functions
+ * + IO operation functions
+ * + Peripheral State functions
+ @verbatim
+================================================================================
+ ##### IWDG specific features #####
+================================================================================
+ [..]
+ (+) The IWDG can be started by either software or hardware (configurable
+ through option byte).
+ (+) The IWDG is clocked by its own dedicated Low-Speed clock (LSI) and
+ thus stays active even if the main clock fails.
+ (+) Once the IWDG is started, the LSI is forced ON and cannot be disabled
+ (LSI cannot be disabled too), and the counter starts counting down from
+ the reset value of 0xFFF. When it reaches the end of count value (0x000)
+ a system reset is generated.
+ (+) The IWDG counter should be refreshed at regular intervals, otherwise the
+ watchdog generates an MCU reset when the counter reaches 0.
+ (+) The IWDG is implemented in the VDD voltage domain that is still functional
+ in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
+ (+) IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
+ reset occurs.
+
+ (+) Min-max timeout value at 40KHz (LSI): 0.1us / 26.2s .
+ The IWDG timeout may vary due to LSI frequency dispersion. STM32F1xx
+ devices provide the capability to measure the LSI frequency (LSI clock
+ connected internally to TIM5 CH4 input capture). The measured value
+ can be used to have an IWDG timeout with an acceptable accuracy.
+ For more information, please refer to the STM32F1xx Reference manual.
+ Note: LSI Calibration is only available on: High density, XL-density and Connectivity line devices.
+
+ ##### How to use this driver #####
+ ==============================================================================
+ [..]
+ (+) Use IWDG using HAL_IWDG_Init() function to :
+ (++) Enable write access to IWDG_PR, IWDG_RLR.
+ (++) Configure the IWDG prescaler, counter reload value.
+ This reload value will be loaded in the IWDG counter each time the counter
+ is reloaded, then the IWDG will start counting down from this value.
+ (+) Use IWDG using HAL_IWDG_Start() function to :
+ (++) Reload IWDG counter with value defined in the IWDG_RLR register.
+ (++) Start the IWDG, when the IWDG is used in software mode (no need
+ to enable the LSI, it will be enabled by hardware).
+ (+) Then the application program must refresh the IWDG counter at regular
+ intervals during normal operation to prevent an MCU reset, using
+ HAL_IWDG_Refresh() function.
+
+ *** IWDG HAL driver macros list ***
+ ====================================
+ [..]
+ Below the list of most used macros in IWDG HAL driver.
+
+ (+) __HAL_IWDG_START: Enable the IWDG peripheral
+ (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in the reload register
+ (+) __HAL_IWDG_GET_FLAG: Get the selected IWDG's flag status
+
+ @endverbatim
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f1xx_hal.h"
+
+/** @addtogroup STM32F1xx_HAL_Driver
+ * @{
+ */
+
+/** @defgroup IWDG IWDG
+ * @brief IWDG HAL module driver.
+ * @{
+ */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/** @defgroup IWDG_Private_Constants IWDG Private Constants
+ * @{
+ */
+
+#define IWDG_DEFAULT_TIMEOUT (uint32_t)1000
+
+/**
+ * @}
+ */
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/** @defgroup IWDG_Exported_Functions IWDG Exported Functions
+ * @{
+ */
+
+/** @defgroup IWDG_Exported_Functions_Group1 Initialization and de-initialization functions
+ * @brief Initialization and Configuration functions.
+ *
+@verbatim
+ ===============================================================================
+ ##### Initialization and de-initialization functions #####
+ ===============================================================================
+ [..] This section provides functions allowing to:
+ (+) Initialize the IWDG according to the specified parameters
+ in the IWDG_InitTypeDef and create the associated handle
+ (+) Initialize the IWDG MSP
+ (+) DeInitialize IWDG MSP
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Initializes the IWDG according to the specified
+ * parameters in the IWDG_InitTypeDef and creates the associated handle.
+ * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains
+ * the configuration information for the specified IWDG module.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
+{
+ /* Check the IWDG handle allocation */
+ if(hiwdg == NULL)
+ {
+ return HAL_ERROR;
+ }
+
+ /* Check the parameters */
+ assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
+ assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
+ assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
+
+ /* Check pending flag, if previous update not done, return error */
+ if((__HAL_IWDG_GET_FLAG(hiwdg, IWDG_FLAG_PVU) != RESET)
+ &&(__HAL_IWDG_GET_FLAG(hiwdg, IWDG_FLAG_RVU) != RESET))
+ {
+ return HAL_ERROR;
+ }
+
+ if(hiwdg->State == HAL_IWDG_STATE_RESET)
+ {
+ /* Allocate lock resource and initialize it */
+ hiwdg->Lock = HAL_UNLOCKED;
+
+ /* Init the low level hardware */
+ HAL_IWDG_MspInit(hiwdg);
+ }
+
+ /* Change IWDG peripheral state */
+ hiwdg->State = HAL_IWDG_STATE_BUSY;
+
+ /* Enable write access to IWDG_PR and IWDG_RLR registers */
+ IWDG_ENABLE_WRITE_ACCESS(hiwdg);
+
+ /* Write to IWDG registers the IWDG_Prescaler & IWDG_Reload values to work with */
+ MODIFY_REG(hiwdg->Instance->PR, IWDG_PR_PR, hiwdg->Init.Prescaler);
+ MODIFY_REG(hiwdg->Instance->RLR, IWDG_RLR_RL, hiwdg->Init.Reload);
+
+ /* Change IWDG peripheral state */
+ hiwdg->State = HAL_IWDG_STATE_READY;
+
+ /* Return function status */
+ return HAL_OK;
+}
+
+/**
+ * @brief Initializes the IWDG MSP.
+ * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains
+ * the configuration information for the specified IWDG module.
+ * @retval None
+ */
+__weak void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg)
+{
+ /* Prevent unused argument(s) compilation warning */
+ UNUSED(hiwdg);
+ /* NOTE : This function Should not be modified, when the callback is needed,
+ the HAL_IWDG_MspInit could be implemented in the user file
+ */
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
+ * @brief IO operation functions
+ *
+@verbatim
+ ===============================================================================
+ ##### IO operation functions #####
+ ===============================================================================
+ [..] This section provides functions allowing to:
+ (+) Start the IWDG.
+ (+) Refresh the IWDG.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Starts the IWDG.
+ * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains
+ * the configuration information for the specified IWDG module.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg)
+{
+ /* Process Locked */
+ __HAL_LOCK(hiwdg);
+
+ /* Change IWDG peripheral state */
+ hiwdg->State = HAL_IWDG_STATE_BUSY;
+
+ /* Start the IWDG peripheral */
+ __HAL_IWDG_START(hiwdg);
+
+ /* Reload IWDG counter with value defined in the RLR register */
+ __HAL_IWDG_RELOAD_COUNTER(hiwdg);
+
+ /* Change IWDG peripheral state */
+ hiwdg->State = HAL_IWDG_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hiwdg);
+
+ /* Return function status */
+ return HAL_OK;
+}
+
+/**
+ * @brief Refreshes the IWDG.
+ * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains
+ * the configuration information for the specified IWDG module.
+ * @retval HAL status
+ */
+HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
+{
+ uint32_t tickstart = 0;
+
+ /* Process Locked */
+ __HAL_LOCK(hiwdg);
+
+ /* Change IWDG peripheral state */
+ hiwdg->State = HAL_IWDG_STATE_BUSY;
+
+ tickstart = HAL_GetTick();
+
+ /* Wait until RVU flag is RESET */
+ while(__HAL_IWDG_GET_FLAG(hiwdg, IWDG_FLAG_RVU) != RESET)
+ {
+ if((HAL_GetTick() - tickstart ) > IWDG_DEFAULT_TIMEOUT)
+ {
+ /* Set IWDG state */
+ hiwdg->State = HAL_IWDG_STATE_TIMEOUT;
+
+ /* Process unlocked */
+ __HAL_UNLOCK(hiwdg);
+
+ return HAL_TIMEOUT;
+ }
+ }
+
+ /* Reload IWDG counter with value defined in the reload register */
+ __HAL_IWDG_RELOAD_COUNTER(hiwdg);
+
+ /* Change IWDG peripheral state */
+ hiwdg->State = HAL_IWDG_STATE_READY;
+
+ /* Process Unlocked */
+ __HAL_UNLOCK(hiwdg);
+
+ /* Return function status */
+ return HAL_OK;
+}
+
+/**
+ * @}
+ */
+
+/** @defgroup IWDG_Exported_Functions_Group3 Peripheral State functions
+ * @brief Peripheral State functions.
+ *
+@verbatim
+ ===============================================================================
+ ##### Peripheral State functions #####
+ ===============================================================================
+ [..]
+ This subsection permits to get in run-time the status of the peripheral
+ and the data flow.
+
+@endverbatim
+ * @{
+ */
+
+/**
+ * @brief Returns the IWDG state.
+ * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains
+ * the configuration information for the specified IWDG module.
+ * @retval HAL state
+ */
+HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg)
+{
+ return hiwdg->State;
+}
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+#endif /* HAL_IWDG_MODULE_ENABLED */
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/bsp/radio-controller-1/Inc/main.h b/bsp/radio-controller-1/Inc/main.h
index be96275..89bca50 100644
--- a/bsp/radio-controller-1/Inc/main.h
+++ b/bsp/radio-controller-1/Inc/main.h
@@ -49,7 +49,7 @@
/* USER CODE END Includes */
/* Private define ------------------------------------------------------------*/
-#define RX_TIMER_PRESCALER (7200 - 1)
+#define RADIO_RX_TIMER_PRESCALER (72000000/200000 - 1)
#define RADIO_RX_Pin GPIO_PIN_8
#define RADIO_RX_GPIO_Port GPIOA
diff --git a/bsp/radio-controller-1/Inc/stm32f1xx_hal_conf.h b/bsp/radio-controller-1/Inc/stm32f1xx_hal_conf.h
index ec25522..eb2b5ca 100644
--- a/bsp/radio-controller-1/Inc/stm32f1xx_hal_conf.h
+++ b/bsp/radio-controller-1/Inc/stm32f1xx_hal_conf.h
@@ -57,14 +57,14 @@
/*#define HAL_CORTEX_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
-#define HAL_DMA_MODULE_ENABLED
+/*#define HAL_DMA_MODULE_ENABLED */
/*#define HAL_ETH_MODULE_ENABLED */
/*#define HAL_FLASH_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
/*#define HAL_I2C_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
-/*#define HAL_IWDG_MODULE_ENABLED */
+#define HAL_IWDG_MODULE_ENABLED
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_NAND_MODULE_ENABLED */
/*#define HAL_PCCARD_MODULE_ENABLED */
diff --git a/bsp/radio-controller-1/Inc/stm32f1xx_it.h b/bsp/radio-controller-1/Inc/stm32f1xx_it.h
index 576c3bd..f56b635 100644
--- a/bsp/radio-controller-1/Inc/stm32f1xx_it.h
+++ b/bsp/radio-controller-1/Inc/stm32f1xx_it.h
@@ -54,7 +54,6 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
-void DMA1_Channel2_IRQHandler(void);
void USB_HP_CAN1_TX_IRQHandler(void);
void USB_LP_CAN1_RX0_IRQHandler(void);
void TIM1_TRG_COM_IRQHandler(void);
diff --git a/bsp/radio-controller-1/Src/main.c b/bsp/radio-controller-1/Src/main.c
index 4b49e82..d7e4c04 100644
--- a/bsp/radio-controller-1/Src/main.c
+++ b/bsp/radio-controller-1/Src/main.c
@@ -51,8 +51,9 @@
/* USER CODE END Includes */
/* Private variables ---------------------------------------------------------*/
+IWDG_HandleTypeDef hiwdg;
+
TIM_HandleTypeDef htim1;
-DMA_HandleTypeDef hdma_tim1_ch1;
UART_HandleTypeDef huart2;
@@ -65,7 +66,7 @@ UART_HandleTypeDef huart2;
void SystemClock_Config(void);
void Error_Handler(void);
static void MX_GPIO_Init(void);
-static void MX_DMA_Init(void);
+static void MX_IWDG_Init(void);
static void MX_TIM1_Init(void);
static void MX_USART2_UART_Init(void);
@@ -95,10 +96,10 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
- MX_DMA_Init();
+ MX_IWDG_Init();
MX_TIM1_Init();
- MX_USB_DEVICE_Init();
MX_USART2_UART_Init();
+ MX_USB_DEVICE_Init();
/* USER CODE BEGIN 2 */
main_post_init();
@@ -128,10 +129,11 @@ void SystemClock_Config(void)
/**Initializes the CPU, AHB and APB busses clocks
*/
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
@@ -173,24 +175,53 @@ void SystemClock_Config(void)
HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
}
+/* IWDG init function */
+static void MX_IWDG_Init(void)
+{
+
+ hiwdg.Instance = IWDG;
+ hiwdg.Init.Prescaler = IWDG_PRESCALER_4;
+ hiwdg.Init.Reload = 4095;
+ if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
+}
+
/* TIM1 init function */
static void MX_TIM1_Init(void)
{
+ TIM_SlaveConfigTypeDef sSlaveConfig;
TIM_MasterConfigTypeDef sMasterConfig;
TIM_IC_InitTypeDef sConfigIC;
htim1.Instance = TIM1;
- htim1.Init.Prescaler = RX_TIMER_PRESCALER;
+ htim1.Init.Prescaler = RADIO_RX_TIMER_PRESCALER;
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
htim1.Init.Period = 0xffff;
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim1.Init.RepetitionCounter = 0;
+ if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
if (HAL_TIM_IC_Init(&htim1) != HAL_OK)
{
Error_Handler();
}
+ sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET;
+ sSlaveConfig.InputTrigger = TIM_TS_TI1FP1;
+ sSlaveConfig.TriggerPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
+ sSlaveConfig.TriggerFilter = 0;
+ if (HAL_TIM_SlaveConfigSynchronization(&htim1, &sSlaveConfig) != HAL_OK)
+ {
+ Error_Handler();
+ }
+
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
@@ -228,21 +259,6 @@ static void MX_USART2_UART_Init(void)
}
-/**
- * Enable DMA controller clock
- */
-static void MX_DMA_Init(void)
-{
- /* DMA controller clock enable */
- __HAL_RCC_DMA1_CLK_ENABLE();
-
- /* DMA interrupt init */
- /* DMA1_Channel2_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
-
-}
-
/** Configure pins as
* Analog
* Input
@@ -288,6 +304,7 @@ void Error_Handler(void)
void assert_failed(uint8_t* file, uint32_t line)
{
/* USER CODE BEGIN 6 */
+ halt();
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
diff --git a/bsp/radio-controller-1/Src/stm32f1xx_hal_msp.c b/bsp/radio-controller-1/Src/stm32f1xx_hal_msp.c
index 0b02774..5ee7f9a 100644
--- a/bsp/radio-controller-1/Src/stm32f1xx_hal_msp.c
+++ b/bsp/radio-controller-1/Src/stm32f1xx_hal_msp.c
@@ -44,8 +44,6 @@
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_hal.h"
-extern DMA_HandleTypeDef hdma_tim1_ch1;
-
extern void Error_Handler(void);
/* USER CODE BEGIN 0 */
@@ -88,11 +86,11 @@ void HAL_MspInit(void)
/* USER CODE END MspInit 1 */
}
-void HAL_TIM_IC_MspInit(TIM_HandleTypeDef* htim_ic)
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
GPIO_InitTypeDef GPIO_InitStruct;
- if(htim_ic->Instance==TIM1)
+ if(htim_base->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspInit 0 */
@@ -108,23 +106,6 @@ void HAL_TIM_IC_MspInit(TIM_HandleTypeDef* htim_ic)
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(RADIO_RX_GPIO_Port, &GPIO_InitStruct);
- /* Peripheral DMA init*/
-
- hdma_tim1_ch1.Instance = DMA1_Channel2;
- hdma_tim1_ch1.Init.Direction = DMA_PERIPH_TO_MEMORY;
- hdma_tim1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
- hdma_tim1_ch1.Init.MemInc = DMA_MINC_ENABLE;
- hdma_tim1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
- hdma_tim1_ch1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
- hdma_tim1_ch1.Init.Mode = DMA_NORMAL;
- hdma_tim1_ch1.Init.Priority = DMA_PRIORITY_LOW;
- if (HAL_DMA_Init(&hdma_tim1_ch1) != HAL_OK)
- {
- Error_Handler();
- }
-
- __HAL_LINKDMA(htim_ic,hdma[TIM_DMA_ID_CC1],hdma_tim1_ch1);
-
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(TIM1_TRG_COM_IRQn, 1, 0);
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_IRQn);
@@ -137,10 +118,10 @@ void HAL_TIM_IC_MspInit(TIM_HandleTypeDef* htim_ic)
}
-void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef* htim_ic)
+void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
- if(htim_ic->Instance==TIM1)
+ if(htim_base->Instance==TIM1)
{
/* USER CODE BEGIN TIM1_MspDeInit 0 */
@@ -153,9 +134,6 @@ void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef* htim_ic)
*/
HAL_GPIO_DeInit(RADIO_RX_GPIO_Port, RADIO_RX_Pin);
- /* Peripheral DMA DeInit*/
- HAL_DMA_DeInit(htim_ic->hdma[TIM_DMA_ID_CC1]);
-
/* Peripheral interrupt DeInit*/
HAL_NVIC_DisableIRQ(TIM1_TRG_COM_IRQn);
diff --git a/bsp/radio-controller-1/Src/stm32f1xx_it.c b/bsp/radio-controller-1/Src/stm32f1xx_it.c
index 8064fb8..67cbc69 100644
--- a/bsp/radio-controller-1/Src/stm32f1xx_it.c
+++ b/bsp/radio-controller-1/Src/stm32f1xx_it.c
@@ -41,7 +41,6 @@
/* External variables --------------------------------------------------------*/
extern PCD_HandleTypeDef hpcd_USB_FS;
-extern DMA_HandleTypeDef hdma_tim1_ch1;
extern TIM_HandleTypeDef htim1;
/******************************************************************************/
@@ -187,20 +186,6 @@ void SysTick_Handler(void)
/******************************************************************************/
/**
-* @brief This function handles DMA1 channel2 global interrupt.
-*/
-void DMA1_Channel2_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
-
- /* USER CODE END DMA1_Channel2_IRQn 0 */
- HAL_DMA_IRQHandler(&hdma_tim1_ch1);
- /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
-
- /* USER CODE END DMA1_Channel2_IRQn 1 */
-}
-
-/**
* @brief This function handles USB high priority or CAN TX interrupts.
*/
void USB_HP_CAN1_TX_IRQHandler(void)
@@ -234,6 +219,7 @@ void USB_LP_CAN1_RX0_IRQHandler(void)
void TIM1_TRG_COM_IRQHandler(void)
{
/* USER CODE BEGIN TIM1_TRG_COM_IRQn 0 */
+
/* USER CODE END TIM1_TRG_COM_IRQn 0 */
HAL_TIM_IRQHandler(&htim1);
/* USER CODE BEGIN TIM1_TRG_COM_IRQn 1 */
@@ -247,6 +233,7 @@ void TIM1_TRG_COM_IRQHandler(void)
void TIM1_CC_IRQHandler(void)
{
/* USER CODE BEGIN TIM1_CC_IRQn 0 */
+
/* USER CODE END TIM1_CC_IRQn 0 */
HAL_TIM_IRQHandler(&htim1);
/* USER CODE BEGIN TIM1_CC_IRQn 1 */
diff --git a/bsp/radio-controller-1/radio-controller-1.gpdsc b/bsp/radio-controller-1/radio-controller-1.gpdsc
index dd069ed..8d085bb 100644
--- a/bsp/radio-controller-1/radio-controller-1.gpdsc
+++ b/bsp/radio-controller-1/radio-controller-1.gpdsc
@@ -1,7 +1,7 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<!-- ******************************************************************************
* File Name : radio-controller-1.gpdsc
- * Date : 27/05/2017 23:23:20
+ * Date : 30/05/2017 22:50:29
* Description : Generator PDSC File generated by STM32CubeMX (DO NOT EDIT!)
****************************************************************************** -->
@@ -11,7 +11,7 @@
<description>STM32CubeMX generated pack description</description>
<releases>
<release version="1.0.0">
- - Generated: 27/05/2017 23:23:20
+ - Generated: 30/05/2017 22:50:29
</release>
</releases>
<requirements>
@@ -93,6 +93,38 @@
<file category="sourceC" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c"/>
</files>
</component>
+ <component Cclass="Device" Cgroup="STM32Cube HAL" Csub="UART" Cversion="0.0.1">
+ <description></description>
+ <files>
+ <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_uart.h"/>
+ <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c"/>
+ </files>
+ </component>
+ <component Cclass="Device" Cgroup="STM32Cube HAL" Csub="PWR" Cversion="0.3.0">
+ <description></description>
+ <files>
+ <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h"/>
+ <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c"/>
+ </files>
+ </component>
+ <component Cclass="Device" Cgroup="STM32Cube HAL" Csub="FLASH" Cversion="0.3.0">
+ <description></description>
+ <files>
+ <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h"/>
+ <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h"/>
+ <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c"/>
+ <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c"/>
+ </files>
+ </component>
+ <component Cclass="Device" Cgroup="STM32Cube HAL" Csub="GPIO" Cversion="0.3.0">
+ <description></description>
+ <files>
+ <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h"/>
+ <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c"/>
+ <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h"/>
+ <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c"/>
+ </files>
+ </component>
<component Cclass="Device" Cgroup="STM32Cube HAL" Csub="PCD" Cversion="1.0.1">
<description></description>
<files>
@@ -104,6 +136,13 @@
<file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_usb.c"/>
</files>
</component>
+ <component Cclass="Device" Cgroup="STM32Cube HAL" Csub="IWDG" Cversion="0.1.0">
+ <description></description>
+ <files>
+ <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_iwdg.h"/>
+ <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_iwdg.c"/>
+ </files>
+ </component>
<component Cclass="Device" Cgroup="STM32Cube HAL" Csub="RCC" Cversion="0.3.0">
<description></description>
<files>
@@ -129,13 +168,6 @@
<file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c"/>
</files>
</component>
- <component Cclass="Device" Cgroup="STM32Cube HAL" Csub="UART" Cversion="0.0.1">
- <description></description>
- <files>
- <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_uart.h"/>
- <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_uart.c"/>
- </files>
- </component>
<component Cclass="Device" Cgroup="STM32Cube HAL" Csub="COMMON" Cversion="0.3.0">
<description></description>
<files>
@@ -153,31 +185,6 @@
<file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c"/>
</files>
</component>
- <component Cclass="Device" Cgroup="STM32Cube HAL" Csub="PWR" Cversion="0.3.0">
- <description></description>
- <files>
- <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_pwr.h"/>
- <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c"/>
- </files>
- </component>
- <component Cclass="Device" Cgroup="STM32Cube HAL" Csub="FLASH" Cversion="0.3.0">
- <description></description>
- <files>
- <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash.h"/>
- <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_flash_ex.h"/>
- <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c"/>
- <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c"/>
- </files>
- </component>
- <component Cclass="Device" Cgroup="STM32Cube HAL" Csub="GPIO" Cversion="0.3.0">
- <description></description>
- <files>
- <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio.h"/>
- <file category="source" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c"/>
- <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Inc\stm32f1xx_hal_gpio_ex.h"/>
- <file category="header" name="Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c"/>
- </files>
- </component>
<component Cclass="Device" Cgroup="STM32Cube HAL" Csub="USB_DEVICE" Cversion="V2.4.2">
<description></description>
<files>
diff --git a/bsp/radio-controller-1/radio-controller-1.ioc b/bsp/radio-controller-1/radio-controller-1.ioc
index c7f9ca7..11a988f 100644
--- a/bsp/radio-controller-1/radio-controller-1.ioc
+++ b/bsp/radio-controller-1/radio-controller-1.ioc
@@ -1,19 +1,8 @@
#MicroXplorer Configuration settings - do not modify
-Dma.Request0=TIM1_CH1
-Dma.RequestsNb=1
-Dma.TIM1_CH1.0.Direction=DMA_PERIPH_TO_MEMORY
-Dma.TIM1_CH1.0.Instance=DMA1_Channel2
-Dma.TIM1_CH1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
-Dma.TIM1_CH1.0.MemInc=DMA_MINC_ENABLE
-Dma.TIM1_CH1.0.Mode=DMA_NORMAL
-Dma.TIM1_CH1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
-Dma.TIM1_CH1.0.PeriphInc=DMA_PINC_DISABLE
-Dma.TIM1_CH1.0.Priority=DMA_PRIORITY_LOW
-Dma.TIM1_CH1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
File.Version=6
KeepUserPlacement=false
Mcu.Family=STM32F1
-Mcu.IP0=DMA
+Mcu.IP0=IWDG
Mcu.IP1=NVIC
Mcu.IP2=RCC
Mcu.IP3=SYS
@@ -27,8 +16,10 @@ Mcu.Package=LQFP48
Mcu.Pin0=PC14-OSC32_IN
Mcu.Pin1=PC15-OSC32_OUT
Mcu.Pin10=PA14
-Mcu.Pin11=VP_SYS_VS_Systick
-Mcu.Pin12=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
+Mcu.Pin11=VP_IWDG_VS_IWDG
+Mcu.Pin12=VP_SYS_VS_Systick
+Mcu.Pin13=VP_TIM1_VS_ControllerModeReset
+Mcu.Pin14=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
Mcu.Pin2=PD0-OSC_IN
Mcu.Pin3=PD1-OSC_OUT
Mcu.Pin4=PA2
@@ -37,13 +28,12 @@ Mcu.Pin6=PA8
Mcu.Pin7=PA11
Mcu.Pin8=PA12
Mcu.Pin9=PA13
-Mcu.PinsNb=13
-Mcu.UserConstants=RX_TIMER_PRESCALER,(7200 - 1)
+Mcu.PinsNb=15
+Mcu.UserConstants=RADIO_RX_TIMER_PRESCALER,(72000000/200000 - 1)
Mcu.UserName=STM32F103C6Tx
MxCube.Version=4.20.1
MxDb.Version=DB.4.0.200
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true
-NVIC.DMA1_Channel2_IRQn=true\:0\:0\:false\:false\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true
@@ -112,7 +102,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=Other Toolchains (GPDSC)
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL,2-MX_DMA_Init-DMA-false-HAL,3-SystemClock_Config-RCC-false-HAL,4-MX_TIM1_Init-TIM1-false-HAL,5-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL,6-MX_USART2_UART_Init-USART2-false-HAL
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL,2-SystemClock_Config-RCC-false-HAL,3-MX_IWDG_Init-IWDG-false-HAL,4-MX_TIM1_Init-TIM1-false-HAL,5-MX_USART2_UART_Init-USART2-false-HAL,6-MX_USB_DEVICE_Init-USB_DEVICE-false-HAL
RCC.ADCFreqValue=36000000
RCC.AHBFreq_Value=72000000
RCC.APB1CLKDivider=RCC_HCLK_DIV2
@@ -136,19 +126,26 @@ RCC.USBFreq_Value=48000000
RCC.USBPrescaler=RCC_USBCLKSOURCE_PLL_DIV1_5
RCC.VCOOutput2Freq_Value=8000000
SH.S_TIM1_CH1.0=TIM1_CH1,Input_Capture1_from_TI1
-SH.S_TIM1_CH1.ConfNb=1
+SH.S_TIM1_CH1.1=TIM1_CH1,TriggerSource_TI1FP1
+SH.S_TIM1_CH1.ConfNb=2
TIM1.Channel-Input_Capture1_from_TI1=TIM_CHANNEL_1
-TIM1.IPParameters=Channel-Input_Capture1_from_TI1,Prescaler,Period
+TIM1.ICFilter_CH1=0
+TIM1.ICPolarity_CH1=TIM_INPUTCHANNELPOLARITY_RISING
+TIM1.IPParameters=Prescaler,Period,Channel-Input_Capture1_from_TI1,ICFilter_CH1,ICPolarity_CH1
TIM1.Period=0xffff
-TIM1.Prescaler=RX_TIMER_PRESCALER
+TIM1.Prescaler=RADIO_RX_TIMER_PRESCALER
USART2.IPParameters=VirtualMode
USART2.VirtualMode=VM_ASYNC
USB_DEVICE.CLASS_NAME_FS=CDC
USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS
USB_DEVICE.VirtualMode=Cdc
USB_DEVICE.VirtualModeFS=Cdc_FS
+VP_IWDG_VS_IWDG.Mode=IWDG_Activate
+VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+VP_TIM1_VS_ControllerModeReset.Mode=Reset Mode
+VP_TIM1_VS_ControllerModeReset.Signal=TIM1_VS_ControllerModeReset
VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS
VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Signal=USB_DEVICE_VS_USB_DEVICE_CDC_FS
board=radio-controller-1