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* o Naming pins.Trygve Laugstøl2017-05-286-15/+16
| | | | | o Correct prescaler for 1us resolution. o Trying out a lock structure for locking between an ISR and a main loop.
* o Moving generated code to under bsp/. Renaming to match PCB.Trygve Laugstøl2017-05-2783-0/+77225