From 89d464c7f38b902e332f082f99df075dee080978 Mon Sep 17 00:00:00 2001
From: Trygve Laugstøl <trygvis@inamo.no>
Date: Sat, 29 Apr 2017 23:10:32 +0200
Subject: o Setting up for TIM1/Channel 1 as input capture. Enabling IWDG.

---
 stm32cubemx/Src/main.c | 26 ++++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

(limited to 'stm32cubemx/Src/main.c')

diff --git a/stm32cubemx/Src/main.c b/stm32cubemx/Src/main.c
index b69bf4f..e9fdb8e 100644
--- a/stm32cubemx/Src/main.c
+++ b/stm32cubemx/Src/main.c
@@ -42,6 +42,7 @@
 IWDG_HandleTypeDef hiwdg;
 
 TIM_HandleTypeDef htim1;
+DMA_HandleTypeDef hdma_tim1_ch1;
 
 /* USER CODE BEGIN PV */
 /* Private variables ---------------------------------------------------------*/
@@ -52,6 +53,7 @@ TIM_HandleTypeDef htim1;
 void SystemClock_Config(void);
 void Error_Handler(void);
 static void MX_GPIO_Init(void);
+static void MX_DMA_Init(void);
 static void MX_TIM1_Init(void);
 static void MX_IWDG_Init(void);
 static void MX_NVIC_Init(void);
@@ -69,7 +71,7 @@ int main(void)
 {
 
   /* USER CODE BEGIN 1 */
-
+  main_pre_init();
   /* USER CODE END 1 */
 
   /* MCU Configuration----------------------------------------------------------*/
@@ -82,6 +84,7 @@ int main(void)
 
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
+  MX_DMA_Init();
   MX_TIM1_Init();
   MX_IWDG_Init();
 
@@ -89,7 +92,7 @@ int main(void)
   MX_NVIC_Init();
 
   /* USER CODE BEGIN 2 */
-
+  main_post_init();
   /* USER CODE END 2 */
 
   /* Infinite loop */
@@ -99,7 +102,7 @@ int main(void)
   /* USER CODE END WHILE */
 
   /* USER CODE BEGIN 3 */
-
+    main_loop();
   }
   /* USER CODE END 3 */
 
@@ -185,7 +188,7 @@ static void MX_TIM1_Init(void)
   TIM_IC_InitTypeDef sConfigIC;
 
   htim1.Instance = TIM1;
-  htim1.Init.Prescaler = 0;
+  htim1.Init.Prescaler = RX_TIMER_PRESCALER;
   htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
   htim1.Init.Period = 0;
   htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
@@ -213,6 +216,21 @@ static void MX_TIM1_Init(void)
 
 }
 
+/** 
+  * Enable DMA controller clock
+  */
+static void MX_DMA_Init(void) 
+{
+  /* DMA controller clock enable */
+  __HAL_RCC_DMA1_CLK_ENABLE();
+
+  /* DMA interrupt init */
+  /* DMA1_Channel2_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
+
+}
+
 /** Configure pins as 
         * Analog 
         * Input 
-- 
cgit v1.2.3