From 1fba999bec5a589e4785594fb1a6fbfab9129097 Mon Sep 17 00:00:00 2001 From: Trygve Laugstøl Date: Thu, 7 Dec 2017 12:12:59 +0100 Subject: o A start of a kicad_pcb parser. --- test/kicad_pcb/parser-1.net | 96 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) create mode 100644 test/kicad_pcb/parser-1.net (limited to 'test/kicad_pcb/parser-1.net') diff --git a/test/kicad_pcb/parser-1.net b/test/kicad_pcb/parser-1.net new file mode 100644 index 0000000..be3173a --- /dev/null +++ b/test/kicad_pcb/parser-1.net @@ -0,0 +1,96 @@ +(export (version D) + (design + (source /home/trygvis/dev/org.bitbucket/solpumpa/hardware/alpha-1/env/src/ee/test/kicad_pcb/parser-1.sch) + (date "to. 07. des. 2017 kl. 11.22 +0100") + (tool "Eeschema 4.0.7+dfsg1-1") + (sheet (number 1) (name /) (tstamps /) + (title_block + (title) + (company) + (rev) + (date) + (source parser-1.sch) + (comment (number 1) (value "")) + (comment (number 2) (value "")) + (comment (number 3) (value "")) + (comment (number 4) (value ""))))) + (components + (comp (ref R1) + (value R) + (footprint Resistors_SMD:R_0603) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A29147F)) + (comp (ref J1) + (value Conn_01x02) + (footprint Pin_Headers:Pin_Header_Straight_1x02_Pitch2.54mm) + (libsource (lib conn) (part Conn_01x02)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A2914CA)) + (comp (ref R2) + (value R) + (footprint Resistors_SMD:R_0603) + (libsource (lib device) (part R)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A29151D)) + (comp (ref C1) + (value C) + (footprint Capacitors_SMD:C_0603) + (libsource (lib device) (part C)) + (sheetpath (names /) (tstamps /)) + (tstamp 5A2915AE))) + (libparts + (libpart (lib device) (part C) + (description "Unpolarized capacitor") + (footprints + (fp C_*)) + (fields + (field (name Reference) C) + (field (name Value) C)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive)))) + (libpart (lib conn) (part Conn_01x02) + (description "Generic connector, single row, 01x02") + (docs ~) + (footprints + (fp Connector*:*_??x*mm*) + (fp Connector*:*1x??x*mm*) + (fp Pin?Header?Straight?1X*) + (fp Pin?Header?Angled?1X*) + (fp Socket?Strip?Straight?1X*) + (fp Socket?Strip?Angled?1X*)) + (fields + (field (name Reference) J) + (field (name Value) Conn_01x02)) + (pins + (pin (num 1) (name Pin_1) (type passive)) + (pin (num 2) (name Pin_2) (type passive)))) + (libpart (lib device) (part R) + (description Resistor) + (footprints + (fp R_*) + (fp R_*)) + (fields + (field (name Reference) R) + (field (name Value) R)) + (pins + (pin (num 1) (name ~) (type passive)) + (pin (num 2) (name ~) (type passive))))) + (libraries + (library (logical device) + (uri /usr/share/kicad/library/device.lib)) + (library (logical conn) + (uri /usr/share/kicad/library/conn.lib))) + (nets + (net (code 1) (name "Net-(J1-Pad2)") + (node (ref J1) (pin 2)) + (node (ref R1) (pin 1))) + (net (code 2) (name "Net-(C1-Pad1)") + (node (ref R1) (pin 2)) + (node (ref R2) (pin 1)) + (node (ref C1) (pin 1))) + (net (code 3) (name GND) + (node (ref C1) (pin 2)) + (node (ref R2) (pin 2)) + (node (ref J1) (pin 1))))) \ No newline at end of file -- cgit v1.2.3