diff options
| -rw-r--r-- | Artix-7/mw.j2 | 4 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A100T.mw | 4 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A12T.mw | 4 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A15T.mw | 4 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A200T.mw | 4 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A25T.mw | 4 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A35T.mw | 4 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A50T.mw | 4 | ||||
| -rw-r--r-- | Artix-7/mw/Chip:XC7A75T.mw | 4 |
9 files changed, 18 insertions, 18 deletions
diff --git a/Artix-7/mw.j2 b/Artix-7/mw.j2 index 79691a4..6a0cb90 100644 --- a/Artix-7/mw.j2 +++ b/Artix-7/mw.j2 @@ -1,7 +1,6 @@ = Overview = -[[Part number::{{ part["Part number"] }}]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::{{ part["Part number"] }}]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -50,5 +49,6 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. {% endif %} [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A100T.mw b/Artix-7/mw/Chip:XC7A100T.mw index 387baa8..078246e 100644 --- a/Artix-7/mw/Chip:XC7A100T.mw +++ b/Artix-7/mw/Chip:XC7A100T.mw @@ -1,7 +1,6 @@ = Overview = -[[Part number::XC7A100T]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::XC7A100T]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -42,4 +41,5 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. * [[Has hard core::DSP48E1 slice;240]] [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A12T.mw b/Artix-7/mw/Chip:XC7A12T.mw index 6d83ff1..2ac72ac 100644 --- a/Artix-7/mw/Chip:XC7A12T.mw +++ b/Artix-7/mw/Chip:XC7A12T.mw @@ -1,7 +1,6 @@ = Overview = -[[Part number::XC7A12T]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::XC7A12T]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -42,4 +41,5 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. * [[Has hard core::DSP48E1 slice;40]] [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A15T.mw b/Artix-7/mw/Chip:XC7A15T.mw index 4982a5d..82d7e18 100644 --- a/Artix-7/mw/Chip:XC7A15T.mw +++ b/Artix-7/mw/Chip:XC7A15T.mw @@ -1,7 +1,6 @@ = Overview = -[[Part number::XC7A15T]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::XC7A15T]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -42,4 +41,5 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. * [[Has hard core::DSP48E1 slice;45]] [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A200T.mw b/Artix-7/mw/Chip:XC7A200T.mw index 87a1119..293e07e 100644 --- a/Artix-7/mw/Chip:XC7A200T.mw +++ b/Artix-7/mw/Chip:XC7A200T.mw @@ -1,7 +1,6 @@ = Overview = -[[Part number::XC7A200T]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::XC7A200T]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -42,4 +41,5 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. * [[Has hard core::DSP48E1 slice;740]] [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A25T.mw b/Artix-7/mw/Chip:XC7A25T.mw index dd06a2a..e60ea9d 100644 --- a/Artix-7/mw/Chip:XC7A25T.mw +++ b/Artix-7/mw/Chip:XC7A25T.mw @@ -1,7 +1,6 @@ = Overview = -[[Part number::XC7A25T]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::XC7A25T]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -42,4 +41,5 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. * [[Has hard core::DSP48E1 slice;80]] [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A35T.mw b/Artix-7/mw/Chip:XC7A35T.mw index 3b734a7..f04f0a2 100644 --- a/Artix-7/mw/Chip:XC7A35T.mw +++ b/Artix-7/mw/Chip:XC7A35T.mw @@ -1,7 +1,6 @@ = Overview = -[[Part number::XC7A35T]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::XC7A35T]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -42,4 +41,5 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. * [[Has hard core::DSP48E1 slice;90]] [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A50T.mw b/Artix-7/mw/Chip:XC7A50T.mw index 694ed02..45469ab 100644 --- a/Artix-7/mw/Chip:XC7A50T.mw +++ b/Artix-7/mw/Chip:XC7A50T.mw @@ -1,7 +1,6 @@ = Overview = -[[Part number::XC7A50T]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::XC7A50T]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -42,4 +41,5 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. * [[Has hard core::DSP48E1 slice;120]] [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A75T.mw b/Artix-7/mw/Chip:XC7A75T.mw index e10f4cd..6f943bc 100644 --- a/Artix-7/mw/Chip:XC7A75T.mw +++ b/Artix-7/mw/Chip:XC7A75T.mw @@ -1,7 +1,6 @@ = Overview = -[[Part number::XC7A75T]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::XC7A75T]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -42,4 +41,5 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. * [[Has hard core::DSP48E1 slice;180]] [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] |