From 7d4b5b7a123bf98fd89a4607a0d18946db7caf36 Mon Sep 17 00:00:00 2001 From: Trygve Laugstøl Date: Wed, 15 Aug 2018 12:32:36 +0200 Subject: o Better categories. --- Artix-7/mw.j2 | 7 +++---- Artix-7/mw/Chip:XC7A100T.mw | 7 +++---- Artix-7/mw/Chip:XC7A12T.mw | 7 +++---- Artix-7/mw/Chip:XC7A15T.mw | 7 +++---- Artix-7/mw/Chip:XC7A200T.mw | 7 +++---- Artix-7/mw/Chip:XC7A25T.mw | 7 +++---- Artix-7/mw/Chip:XC7A35T.mw | 7 +++---- Artix-7/mw/Chip:XC7A50T.mw | 7 +++---- Artix-7/mw/Chip:XC7A75T.mw | 7 +++---- 9 files changed, 27 insertions(+), 36 deletions(-) diff --git a/Artix-7/mw.j2 b/Artix-7/mw.j2 index f52262f..79691a4 100644 --- a/Artix-7/mw.j2 +++ b/Artix-7/mw.j2 @@ -1,9 +1,9 @@ = Overview = +[[Part number::{{ part["Part number"] }}]] is an FPGA from [[Manufacturer::Xilinx]]. +It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. + {|class='wikitable' -!Part number -|[[Part number::{{ part["Part number"] }}]] -|- !Logic Cells |[[Xilix logic cells::{{ part["Logic Cells"] }}]] |- @@ -50,6 +50,5 @@ {% endif %} [[Category:Generated]] -[[Category:FPGA Chip]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A100T.mw b/Artix-7/mw/Chip:XC7A100T.mw index 593238a..387baa8 100644 --- a/Artix-7/mw/Chip:XC7A100T.mw +++ b/Artix-7/mw/Chip:XC7A100T.mw @@ -1,9 +1,9 @@ = Overview = +[[Part number::XC7A100T]] is an FPGA from [[Manufacturer::Xilinx]]. +It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. + {|class='wikitable' -!Part number -|[[Part number::XC7A100T]] -|- !Logic Cells |[[Xilix logic cells::101440]] |- @@ -42,5 +42,4 @@ * [[Has hard core::DSP48E1 slice;240]] [[Category:Generated]] -[[Category:FPGA Chip]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A12T.mw b/Artix-7/mw/Chip:XC7A12T.mw index df498b8..6d83ff1 100644 --- a/Artix-7/mw/Chip:XC7A12T.mw +++ b/Artix-7/mw/Chip:XC7A12T.mw @@ -1,9 +1,9 @@ = Overview = +[[Part number::XC7A12T]] is an FPGA from [[Manufacturer::Xilinx]]. +It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. + {|class='wikitable' -!Part number -|[[Part number::XC7A12T]] -|- !Logic Cells |[[Xilix logic cells::12800]] |- @@ -42,5 +42,4 @@ * [[Has hard core::DSP48E1 slice;40]] [[Category:Generated]] -[[Category:FPGA Chip]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A15T.mw b/Artix-7/mw/Chip:XC7A15T.mw index b7900a6..4982a5d 100644 --- a/Artix-7/mw/Chip:XC7A15T.mw +++ b/Artix-7/mw/Chip:XC7A15T.mw @@ -1,9 +1,9 @@ = Overview = +[[Part number::XC7A15T]] is an FPGA from [[Manufacturer::Xilinx]]. +It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. + {|class='wikitable' -!Part number -|[[Part number::XC7A15T]] -|- !Logic Cells |[[Xilix logic cells::16640]] |- @@ -42,5 +42,4 @@ * [[Has hard core::DSP48E1 slice;45]] [[Category:Generated]] -[[Category:FPGA Chip]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A200T.mw b/Artix-7/mw/Chip:XC7A200T.mw index bfa2f66..87a1119 100644 --- a/Artix-7/mw/Chip:XC7A200T.mw +++ b/Artix-7/mw/Chip:XC7A200T.mw @@ -1,9 +1,9 @@ = Overview = +[[Part number::XC7A200T]] is an FPGA from [[Manufacturer::Xilinx]]. +It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. + {|class='wikitable' -!Part number -|[[Part number::XC7A200T]] -|- !Logic Cells |[[Xilix logic cells::215360]] |- @@ -42,5 +42,4 @@ * [[Has hard core::DSP48E1 slice;740]] [[Category:Generated]] -[[Category:FPGA Chip]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A25T.mw b/Artix-7/mw/Chip:XC7A25T.mw index 266d05a..dd06a2a 100644 --- a/Artix-7/mw/Chip:XC7A25T.mw +++ b/Artix-7/mw/Chip:XC7A25T.mw @@ -1,9 +1,9 @@ = Overview = +[[Part number::XC7A25T]] is an FPGA from [[Manufacturer::Xilinx]]. +It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. + {|class='wikitable' -!Part number -|[[Part number::XC7A25T]] -|- !Logic Cells |[[Xilix logic cells::23360]] |- @@ -42,5 +42,4 @@ * [[Has hard core::DSP48E1 slice;80]] [[Category:Generated]] -[[Category:FPGA Chip]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A35T.mw b/Artix-7/mw/Chip:XC7A35T.mw index 93d8bba..3b734a7 100644 --- a/Artix-7/mw/Chip:XC7A35T.mw +++ b/Artix-7/mw/Chip:XC7A35T.mw @@ -1,9 +1,9 @@ = Overview = +[[Part number::XC7A35T]] is an FPGA from [[Manufacturer::Xilinx]]. +It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. + {|class='wikitable' -!Part number -|[[Part number::XC7A35T]] -|- !Logic Cells |[[Xilix logic cells::33280]] |- @@ -42,5 +42,4 @@ * [[Has hard core::DSP48E1 slice;90]] [[Category:Generated]] -[[Category:FPGA Chip]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A50T.mw b/Artix-7/mw/Chip:XC7A50T.mw index 106769f..694ed02 100644 --- a/Artix-7/mw/Chip:XC7A50T.mw +++ b/Artix-7/mw/Chip:XC7A50T.mw @@ -1,9 +1,9 @@ = Overview = +[[Part number::XC7A50T]] is an FPGA from [[Manufacturer::Xilinx]]. +It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. + {|class='wikitable' -!Part number -|[[Part number::XC7A50T]] -|- !Logic Cells |[[Xilix logic cells::52160]] |- @@ -42,5 +42,4 @@ * [[Has hard core::DSP48E1 slice;120]] [[Category:Generated]] -[[Category:FPGA Chip]] [[Category:Artix-7 generated data set]] diff --git a/Artix-7/mw/Chip:XC7A75T.mw b/Artix-7/mw/Chip:XC7A75T.mw index 02d5890..e10f4cd 100644 --- a/Artix-7/mw/Chip:XC7A75T.mw +++ b/Artix-7/mw/Chip:XC7A75T.mw @@ -1,9 +1,9 @@ = Overview = +[[Part number::XC7A75T]] is an FPGA from [[Manufacturer::Xilinx]]. +It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. + {|class='wikitable' -!Part number -|[[Part number::XC7A75T]] -|- !Logic Cells |[[Xilix logic cells::75520]] |- @@ -42,5 +42,4 @@ * [[Has hard core::DSP48E1 slice;180]] [[Category:Generated]] -[[Category:FPGA Chip]] [[Category:Artix-7 generated data set]] -- cgit v1.2.3