From abb3a34a0557733a7c3754291ea689e44f9a9689 Mon Sep 17 00:00:00 2001 From: Trygve Laugstøl Date: Wed, 15 Aug 2018 13:55:44 +0200 Subject: o Adding pages for Kintex-7. --- Artix-7/mw.j2 | 2 +- Artix-7/mw/Chip:XC7A100T.mw | 2 +- Artix-7/mw/Chip:XC7A12T.mw | 2 +- Artix-7/mw/Chip:XC7A15T.mw | 2 +- Artix-7/mw/Chip:XC7A200T.mw | 2 +- Artix-7/mw/Chip:XC7A25T.mw | 2 +- Artix-7/mw/Chip:XC7A35T.mw | 2 +- Artix-7/mw/Chip:XC7A50T.mw | 2 +- Artix-7/mw/Chip:XC7A75T.mw | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'Artix-7') diff --git a/Artix-7/mw.j2 b/Artix-7/mw.j2 index 6a0cb90..2b7c418 100644 --- a/Artix-7/mw.j2 +++ b/Artix-7/mw.j2 @@ -38,8 +38,8 @@ * [[Has hard core::Gigabit transceiver;{{ part["GTPs"] }}]] {% endif %} {% if part["PCIe"] %} -* [[Has hard core::PCIe;{{ part["PCIe"] }}]] * [[Has hard core::PCIe Gen 2;{{ part["PCIe"] }}]] +{{ "{{" }}#set: Has hard core=PCIe;{{ part["PCIe"] }} }} {% endif %} {% if part["XADC Blocks"] %} * [[Has hard core::XADC;{{ part["XADC Blocks"] }}]] diff --git a/Artix-7/mw/Chip:XC7A100T.mw b/Artix-7/mw/Chip:XC7A100T.mw index 078246e..a0fc091 100644 --- a/Artix-7/mw/Chip:XC7A100T.mw +++ b/Artix-7/mw/Chip:XC7A100T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;8]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;240]] diff --git a/Artix-7/mw/Chip:XC7A12T.mw b/Artix-7/mw/Chip:XC7A12T.mw index 2ac72ac..90ae0e9 100644 --- a/Artix-7/mw/Chip:XC7A12T.mw +++ b/Artix-7/mw/Chip:XC7A12T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;2]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;40]] diff --git a/Artix-7/mw/Chip:XC7A15T.mw b/Artix-7/mw/Chip:XC7A15T.mw index 82d7e18..da7f216 100644 --- a/Artix-7/mw/Chip:XC7A15T.mw +++ b/Artix-7/mw/Chip:XC7A15T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;4]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;45]] diff --git a/Artix-7/mw/Chip:XC7A200T.mw b/Artix-7/mw/Chip:XC7A200T.mw index 293e07e..f86b49d 100644 --- a/Artix-7/mw/Chip:XC7A200T.mw +++ b/Artix-7/mw/Chip:XC7A200T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;16]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;740]] diff --git a/Artix-7/mw/Chip:XC7A25T.mw b/Artix-7/mw/Chip:XC7A25T.mw index e60ea9d..3b898da 100644 --- a/Artix-7/mw/Chip:XC7A25T.mw +++ b/Artix-7/mw/Chip:XC7A25T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;4]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;80]] diff --git a/Artix-7/mw/Chip:XC7A35T.mw b/Artix-7/mw/Chip:XC7A35T.mw index f04f0a2..ca5238d 100644 --- a/Artix-7/mw/Chip:XC7A35T.mw +++ b/Artix-7/mw/Chip:XC7A35T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;4]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;90]] diff --git a/Artix-7/mw/Chip:XC7A50T.mw b/Artix-7/mw/Chip:XC7A50T.mw index 45469ab..1c48103 100644 --- a/Artix-7/mw/Chip:XC7A50T.mw +++ b/Artix-7/mw/Chip:XC7A50T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;4]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;120]] diff --git a/Artix-7/mw/Chip:XC7A75T.mw b/Artix-7/mw/Chip:XC7A75T.mw index 6f943bc..fbee874 100644 --- a/Artix-7/mw/Chip:XC7A75T.mw +++ b/Artix-7/mw/Chip:XC7A75T.mw @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;8]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} * [[Has hard core::XADC;1]] * [[Has hard core::DSP48E1 slice;180]] -- cgit v1.2.3