From abb3a34a0557733a7c3754291ea689e44f9a9689 Mon Sep 17 00:00:00 2001 From: Trygve Laugstøl Date: Wed, 15 Aug 2018 13:55:44 +0200 Subject: o Adding pages for Kintex-7. --- Kintex-7/mw/Chip:XC7K160T.mw | 4 ++-- Kintex-7/mw/Chip:XC7K325T.mw | 4 ++-- Kintex-7/mw/Chip:XC7K355T.mw | 4 ++-- Kintex-7/mw/Chip:XC7K410T.mw | 4 ++-- Kintex-7/mw/Chip:XC7K420T.mw | 4 ++-- Kintex-7/mw/Chip:XC7K480T.mw | 4 ++-- Kintex-7/mw/Chip:XC7K70T.mw | 4 ++-- 7 files changed, 14 insertions(+), 14 deletions(-) (limited to 'Kintex-7/mw') diff --git a/Kintex-7/mw/Chip:XC7K160T.mw b/Kintex-7/mw/Chip:XC7K160T.mw index 0698263..161c391 100644 --- a/Kintex-7/mw/Chip:XC7K160T.mw +++ b/Kintex-7/mw/Chip:XC7K160T.mw @@ -1,6 +1,6 @@ = Overview = -[[Part number::]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. +[[Part number::XC7K160T]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;8]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} [[Category:Generated]] [[Category:Xilinx Kintex-7 family chip|Kintex-7]] diff --git a/Kintex-7/mw/Chip:XC7K325T.mw b/Kintex-7/mw/Chip:XC7K325T.mw index bcd44c6..8b05fc1 100644 --- a/Kintex-7/mw/Chip:XC7K325T.mw +++ b/Kintex-7/mw/Chip:XC7K325T.mw @@ -1,6 +1,6 @@ = Overview = -[[Part number::]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. +[[Part number::XC7K325T]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;16]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} [[Category:Generated]] [[Category:Xilinx Kintex-7 family chip|Kintex-7]] diff --git a/Kintex-7/mw/Chip:XC7K355T.mw b/Kintex-7/mw/Chip:XC7K355T.mw index 1043a31..65f7e36 100644 --- a/Kintex-7/mw/Chip:XC7K355T.mw +++ b/Kintex-7/mw/Chip:XC7K355T.mw @@ -1,6 +1,6 @@ = Overview = -[[Part number::]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. +[[Part number::XC7K355T]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;24]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} [[Category:Generated]] [[Category:Xilinx Kintex-7 family chip|Kintex-7]] diff --git a/Kintex-7/mw/Chip:XC7K410T.mw b/Kintex-7/mw/Chip:XC7K410T.mw index 733e056..1f078ee 100644 --- a/Kintex-7/mw/Chip:XC7K410T.mw +++ b/Kintex-7/mw/Chip:XC7K410T.mw @@ -1,6 +1,6 @@ = Overview = -[[Part number::]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. +[[Part number::XC7K410T]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;16]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} [[Category:Generated]] [[Category:Xilinx Kintex-7 family chip|Kintex-7]] diff --git a/Kintex-7/mw/Chip:XC7K420T.mw b/Kintex-7/mw/Chip:XC7K420T.mw index dc59e81..ba13bd4 100644 --- a/Kintex-7/mw/Chip:XC7K420T.mw +++ b/Kintex-7/mw/Chip:XC7K420T.mw @@ -1,6 +1,6 @@ = Overview = -[[Part number::]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. +[[Part number::XC7K420T]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;32]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} [[Category:Generated]] [[Category:Xilinx Kintex-7 family chip|Kintex-7]] diff --git a/Kintex-7/mw/Chip:XC7K480T.mw b/Kintex-7/mw/Chip:XC7K480T.mw index b5a1bf3..632bd54 100644 --- a/Kintex-7/mw/Chip:XC7K480T.mw +++ b/Kintex-7/mw/Chip:XC7K480T.mw @@ -1,6 +1,6 @@ = Overview = -[[Part number::]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. +[[Part number::XC7K480T]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;32]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} [[Category:Generated]] [[Category:Xilinx Kintex-7 family chip|Kintex-7]] diff --git a/Kintex-7/mw/Chip:XC7K70T.mw b/Kintex-7/mw/Chip:XC7K70T.mw index 206e1bc..6f79905 100644 --- a/Kintex-7/mw/Chip:XC7K70T.mw +++ b/Kintex-7/mw/Chip:XC7K70T.mw @@ -1,6 +1,6 @@ = Overview = -[[Part number::]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. +[[Part number::XC7K70T]] is an FPGA in the [[Chip family::Kintex-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -35,8 +35,8 @@ = Hard cores = * [[Has hard core::Gigabit transceiver;8]] -* [[Has hard core::PCIe;1]] * [[Has hard core::PCIe Gen 2;1]] +{{#set: Has hard core=PCIe;1 }} [[Category:Generated]] [[Category:Xilinx Kintex-7 family chip|Kintex-7]] -- cgit v1.2.3