From 5b53ca0700189ebb98278a8081bdabf527f1bb12 Mon Sep 17 00:00:00 2001 From: Trygve Laugstøl Date: Wed, 15 Aug 2018 13:47:39 +0200 Subject: o Kintex-7. --- Kintex-7/parts.csv | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Kintex-7/parts.csv (limited to 'Kintex-7/parts.csv') diff --git a/Kintex-7/parts.csv b/Kintex-7/parts.csv new file mode 100644 index 0000000..0171f3d --- /dev/null +++ b/Kintex-7/parts.csv @@ -0,0 +1,27 @@ +#,Table 6: Kintex-7 FPGA Feature Summary by Device,,,,,,,,,,,, +,,,,,,,,,,,,, +,,,,,,,,,,,,, +,,,,,,,,,,,,, +,,,,,,,,,,,,, +,,,,,,,,,,,,, +,,,,,,,,,,,,, +,,,,,,,,,,,,, +#,,Configurable Logic Blocks (CLBs),,,Block RAM Blocks(3),,,,,,,, +Device,Logic Cells,Slices(1),Max Distributed RAM (Kb),DSP Slices(2),18 Kb,36 Kb,Max (Kb),CMTs(4),PCIe(5),GTXs,XADC,Total I/O Banks(6),Max User I/O(7) +XC7K70T,65600,10250,838,240,270,135,4860,6,1,8,1,6,300 +XC7K160T,162240,25350,2188,600,650,325,11700,8,1,8,1,8,400 +XC7K325T,326080,50950,4000,840,890,445,16020,10,1,16,1,10,500 +XC7K355T,356160,55650,5088,1440,1430,715,25740,6,1,24,1,6,300 +XC7K410T,406720,63550,5663,1540,1590,795,28620,10,1,16,1,10,500 +XC7K420T,416960,65150,5938,1680,1670,835,30060,8,1,32,1,8,400 +XC7K480T,477760,74650,6788,1920,1910,955,34380,8,1,32,1,8,400 +,,,,,,,,,,,,, +,,,,,,,,,,,,, +#,Notes: ,,,,,,,,,,,, +#,1. Each 7 series FPGA slice contains four LUTs and eight flip-flops; only some slices can use their LUTs as distributed RAM or SRLs. ,,,,,,,,,,,, +#,"2. Each DSP slice contains a pre-adder, a 25 x 18 multiplier, an adder, and an accumulator. ",,,,,,,,,,,, +#,3. Block RAMs are fundamentally 36 Kb in size; each block can also be used as two independent 18 Kb blocks. ,,,,,,,,,,,, +#,4. Each CMT contains one MMCM and one PLL. ,,,,,,,,,,,, +#,5. Kintex-7 FPGA Interface Blocks for PCI Express support up to x8 Gen 2. ,,,,,,,,,,,, +#,6. Does not include configuration Bank 0. ,,,,,,,,,,,, +#,7. This number does not include GTX transceivers ,,,,,,,,,,,, -- cgit v1.2.3