= XC7A25T =

{|class='wikitable'
!Part number
|[[Part number::XC7A25T]]
|-
!Logic Cells
|[[Xilix logic cells::23360]]
|-
!Slices
|[[Slices::3650]]
|-
!Distributed RAM
|[[Distributed RAM::313]]
|-
!DSP48E1 Slices
|[[DSP48E1 Slices::80]]
|-
!RAM blocks
|[[RAM blocks::45]]
|-
!RAM
|[[RAM::1620]]
|-
!Clock management tiles
|[[Xilix Clock management tiles::3]]
|-
!PCIe
|[[PCIe::1]]
|-
!GTPs
|[[GTPs::4]]
|-
!XADC Blocks
|[[XADC Blocks::1]]
|-
!IO banks
|[[IO banks::3]]
|-
!Max User I/O
|[[Max User I/O::150]]
|-
!RAM Block Size
|[[RAM Block Size::36 kB]]
|-
|}

[[Category:Generated]]
[[Category:FPGA Chip]]
[[Category:Artix-7 generated data set]]