Add private header for ARM11 internals.

Reduces confusion about location of associated routines and
reduces clutter in the arm11 header.

Removes extra whitespace around the lines touched by these changes.

4 files changed, 74 insertions, 50 deletions

diff --git a/src/target/arm11.c b/src/target/arm11.c
index fb57ee5d..6cdfa64a 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -27,6 +27,7 @@
 #endif
 
 #include "arm11.h"
+#include "arm11_dbgtap.h"
 #include "armv4_5.h"
 #include "arm_simulator.h"
 #include "time_support.h"
diff --git a/src/target/arm11.h b/src/target/arm11.h
index fe08353a..be5e77bd 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -184,50 +184,4 @@ typedef struct arm11_reg_state_s
 
 int arm11_register_commands(struct command_context_s *cmd_ctx);
 
-/* internals */
-
-void arm11_setup_field			(arm11_common_t * arm11, int num_bits, void * in_data, void * out_data, scan_field_t * field);
-void arm11_add_IR				(arm11_common_t * arm11, uint8_t instr, tap_state_t state);
-int arm11_add_debug_SCAN_N		(arm11_common_t * arm11, uint8_t chain, tap_state_t state);
-void arm11_add_debug_INST		(arm11_common_t * arm11, uint32_t inst, uint8_t * flag, tap_state_t state);
-int arm11_read_DSCR				(arm11_common_t * arm11, uint32_t *dscr);
-int arm11_write_DSCR			(arm11_common_t * arm11, uint32_t dscr);
-
-enum target_debug_reason arm11_get_DSCR_debug_reason(uint32_t dscr);
-
-int arm11_run_instr_data_prepare			(arm11_common_t * arm11);
-int arm11_run_instr_data_finish				(arm11_common_t * arm11);
-int arm11_run_instr_no_data					(arm11_common_t * arm11, uint32_t * opcode, size_t count);
-int arm11_run_instr_no_data1				(arm11_common_t * arm11, uint32_t opcode);
-int arm11_run_instr_data_to_core			(arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
-int arm11_run_instr_data_to_core_noack		(arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
-int arm11_run_instr_data_to_core1			(arm11_common_t * arm11, uint32_t opcode, uint32_t data);
-int arm11_run_instr_data_from_core			(arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
-int arm11_run_instr_data_from_core_via_r0	(arm11_common_t * arm11, uint32_t opcode, uint32_t * data);
-int arm11_run_instr_data_to_core_via_r0	(arm11_common_t * arm11, uint32_t opcode, uint32_t data);
-
-int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state);
-int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state);
-
-/** Used to make a list of read/write commands for scan chain 7
- *
- *  Use with arm11_sc7_run()
- */
-typedef struct arm11_sc7_action_s
-{
-	bool	write;				/**< Access mode: true for write, false for read.	*/
-	uint8_t		address;			/**< Register address mode. Use enum #arm11_sc7		*/
-	uint32_t		value;				/**< If write then set this to value to be written.
-									 In read mode this receives the read value when the
-									 function returns.					*/
-} arm11_sc7_action_t;
-
-int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t count);
-
-/* Mid-level helper functions */
-void arm11_sc7_clear_vbw(arm11_common_t * arm11);
-void arm11_sc7_set_vcr(arm11_common_t * arm11, uint32_t value);
-
-int arm11_read_memory_word(arm11_common_t * arm11, uint32_t address, uint32_t * result);
-
 #endif /* ARM11_H */
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index c9812a15..0e1160f8 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -24,7 +24,7 @@
 #include "config.h"
 #endif
 
-#include "arm11.h"
+#include "arm11_dbgtap.h"
 
 #include "time_support.h"
 
@@ -41,7 +41,7 @@ behavior of the FTDI driver IIRC was to go via RTI.
 Conversely there may be other places in this code where the ARM11 code relies
 on the driver to hit through RTI when coming from Update-?R.
 */
-tap_state_t arm11_move_pi_to_si_via_ci[] =
+static const tap_state_t arm11_move_pi_to_si_via_ci[] =
 {
     TAP_IREXIT2, TAP_IRUPDATE, TAP_DRSELECT, TAP_IRSELECT, TAP_IRCAPTURE, TAP_IRSHIFT
 };
@@ -56,7 +56,7 @@ int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state
 	return ERROR_OK;
 }
 
-tap_state_t arm11_move_pd_to_sd_via_cd[] =
+static const tap_state_t arm11_move_pd_to_sd_via_cd[] =
 {
 	TAP_DREXIT2, TAP_DRUPDATE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
 };
@@ -548,7 +548,7 @@ int arm11_run_instr_data_to_core(arm11_common_t * arm11, uint32_t opcode, uint32
  *  https://lists.berlios.de/pipermail/openocd-development/2009-July/009698.html
  *  https://lists.berlios.de/pipermail/openocd-development/2009-August/009865.html
  */
-tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
+static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
 {
 	TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
 };
diff --git a/src/target/arm11_dbgtap.h b/src/target/arm11_dbgtap.h
new file mode 100644
index 00000000..f8a793fa
--- /dev/null
+++ b/src/target/arm11_dbgtap.h
@@ -0,0 +1,69 @@
+#ifndef ARM11_DBGTAP_H
+#define ARM11_DBGTAP_H
+
+#include "arm11.h"
+
+/* ARM11 internals */
+
+void arm11_setup_field(arm11_common_t *arm11, int num_bits,
+		void *in_data, void *out_data, scan_field_t *field);
+void arm11_add_IR(arm11_common_t *arm11,
+		uint8_t instr, tap_state_t state);
+int arm11_add_debug_SCAN_N(arm11_common_t *arm11,
+		uint8_t chain, tap_state_t state);
+void arm11_add_debug_INST(arm11_common_t *arm11,
+		uint32_t inst, uint8_t *flag, tap_state_t state);
+int arm11_read_DSCR(arm11_common_t *arm11, uint32_t *dscr);
+int arm11_write_DSCR(arm11_common_t *arm11, uint32_t dscr);
+
+enum target_debug_reason arm11_get_DSCR_debug_reason(uint32_t dscr);
+
+int arm11_run_instr_data_prepare(arm11_common_t *arm11);
+int arm11_run_instr_data_finish(arm11_common_t *arm11);
+int arm11_run_instr_no_data(arm11_common_t *arm11,
+		uint32_t *opcode, size_t count);
+int arm11_run_instr_no_data1(arm11_common_t *arm11, uint32_t opcode);
+int arm11_run_instr_data_to_core(arm11_common_t *arm11,
+		uint32_t opcode, uint32_t *data, size_t count);
+int arm11_run_instr_data_to_core_noack(arm11_common_t *arm11,
+		uint32_t opcode, uint32_t *data, size_t count);
+int arm11_run_instr_data_to_core1(arm11_common_t *arm11,
+		uint32_t opcode, uint32_t data);
+int arm11_run_instr_data_from_core(arm11_common_t *arm11,
+		uint32_t opcode, uint32_t *data, size_t count);
+int arm11_run_instr_data_from_core_via_r0(arm11_common_t *arm11,
+		uint32_t opcode, uint32_t *data);
+int arm11_run_instr_data_to_core_via_r0(arm11_common_t *arm11,
+		uint32_t opcode, uint32_t data);
+
+int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields,
+		tap_state_t state);
+int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields,
+		tap_state_t state);
+
+/**
+ * Used with arm11_sc7_run to make a list of read/write commands for
+ * scan chain 7
+ */
+typedef struct arm11_sc7_action_s
+{
+	bool write; /**< Access mode: true for write, false for read. */
+	uint8_t	address; /**< Register address mode. Use enum #arm11_sc7 */
+	/**
+	 * If write then set this to value to be written.  In read mode
+	 * this receives the read value when the function returns.
+	 */
+	uint32_t value;
+} arm11_sc7_action_t;
+
+int arm11_sc7_run(arm11_common_t *arm11,
+		arm11_sc7_action_t *actions, size_t count);
+
+/* Mid-level helper functions */
+void arm11_sc7_clear_vbw(arm11_common_t *arm11);
+void arm11_sc7_set_vcr(arm11_common_t *arm11, uint32_t value);
+
+int arm11_read_memory_word(arm11_common_t *arm11,
+		uint32_t address, uint32_t *result);
+
+#endif // ARM11_DBGTAP_H