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authormlu <mlu@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2009-10-02 16:52:02 +0000
committermlu <mlu@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2009-10-02 16:52:02 +0000
commitf87985b61447115632721e18a04623464331c09b (patch)
tree523bf50bb57a778861db3458543a0d65aa6e7b9a /tcl
parent16742b529bbaf5a4e1da478c0d2bb7cc3517caf0 (diff)
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Updated reset event handling in omap3530 cfg
git-svn-id: svn://svn.berlios.de/openocd/trunk@2796 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'tcl')
-rw-r--r--tcl/target/omap3530.cfg9
1 files changed, 7 insertions, 2 deletions
diff --git a/tcl/target/omap3530.cfg b/tcl/target/omap3530.cfg
index 27e5b007..84460705 100644
--- a/tcl/target/omap3530.cfg
+++ b/tcl/target/omap3530.cfg
@@ -42,15 +42,20 @@ target create omap3.cpu cortex_a8 -chain-position $_CHIPNAME.dap
# FIXME much of this should be in reset event handlers
proc omap3_dbginit { } {
poll off
- reset
sleep 100
jtag tapenable omap3530.dap
targets
# General Cortex A8 debug initialisation
cortex_a8 dbginit
- # Enable DBGU singal for OMAP353x
+ # Enable DBGU signal for OMAP353x
omap3.cpu mww 0x5401d030 0x00002000
poll on
}
+set PRM_RSTCTRL 0x48307250
+
+omap3.cpu configure -event reset-start "omap3.cpu mww $PRM_RSTCTRL 2"
+omap3.cpu configure -event reset-assert-pre "omap3_dbginit"
+
+