diff options
| -rw-r--r-- | src/target/etm.c | 41 |
1 files changed, 15 insertions, 26 deletions
diff --git a/src/target/etm.c b/src/target/etm.c index 4acc041f..24dd0ff7 100644 --- a/src/target/etm.c +++ b/src/target/etm.c @@ -339,42 +339,31 @@ int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) fields[0].tap = etm_reg->jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = reg->value; - fields[0].in_value = NULL; - - fields[0].in_handler = NULL; - fields[1].tap = etm_reg->jtag_info->tap; fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - fields[1].in_value = NULL; - - fields[1].in_handler = NULL; - fields[2].tap = etm_reg->jtag_info->tap; fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 0); - fields[2].in_value = NULL; - - fields[2].in_handler = NULL; - jtag_add_dr_scan(3, fields, TAP_INVALID); fields[0].in_value = reg->value; - jtag_set_check_value(fields+0, check_value, check_mask, NULL); jtag_add_dr_scan(3, fields, TAP_INVALID); + jtag_check_value_mask(fields+0, check_value, check_mask); + free(fields[1].out_value); free(fields[2].out_value); @@ -431,34 +420,34 @@ int etm_write_reg(reg_t *reg, u32 value) fields[0].num_bits = 32; fields[0].out_value = malloc(4); buf_set_u32(fields[0].out_value, 0, 32, value); - + fields[0].in_value = NULL; - - + + fields[0].in_handler = NULL; - + fields[1].tap = etm_reg->jtag_info->tap; fields[1].num_bits = 7; fields[1].out_value = malloc(1); buf_set_u32(fields[1].out_value, 0, 7, reg_addr); - + fields[1].in_value = NULL; - - + + fields[1].in_handler = NULL; - + fields[2].tap = etm_reg->jtag_info->tap; fields[2].num_bits = 1; fields[2].out_value = malloc(1); buf_set_u32(fields[2].out_value, 0, 1, 1); - + fields[2].in_value = NULL; - - + + fields[2].in_handler = NULL; - + jtag_add_dr_scan(3, fields, TAP_INVALID); @@ -993,7 +982,7 @@ static int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd { if (((instruction.type == ARM_B) || (instruction.type == ARM_BL) || - (instruction.type == ARM_BLX)) && + (instruction.type == ARM_BLX)) && (instruction.info.b_bl_bx_blx.target_address != 0xffffffff)) { next_pc = instruction.info.b_bl_bx_blx.target_address; |