diff options
Diffstat (limited to 'src/flash')
-rw-r--r-- | src/flash/at91sam7.c | 46 | ||||
-rw-r--r-- | src/flash/cfi.c | 160 | ||||
-rw-r--r-- | src/flash/ecos.c | 16 | ||||
-rw-r--r-- | src/flash/flash.c | 30 | ||||
-rw-r--r-- | src/flash/lpc2000.c | 34 | ||||
-rw-r--r-- | src/flash/lpc3180_nand_controller.c | 84 | ||||
-rw-r--r-- | src/flash/nand.c | 50 | ||||
-rw-r--r-- | src/flash/non_cfi.c | 2 | ||||
-rw-r--r-- | src/flash/s3c2410_nand.c | 6 | ||||
-rw-r--r-- | src/flash/s3c2440_nand.c | 8 | ||||
-rw-r--r-- | src/flash/s3c24xx_nand.c | 14 | ||||
-rw-r--r-- | src/flash/stellaris.c | 66 | ||||
-rw-r--r-- | src/flash/stm32x.c | 28 | ||||
-rw-r--r-- | src/flash/str7x.c | 36 | ||||
-rw-r--r-- | src/flash/str9x.c | 18 | ||||
-rw-r--r-- | src/flash/str9xpec.c | 32 | ||||
-rw-r--r-- | src/flash/tms470.c | 134 |
17 files changed, 382 insertions, 382 deletions
diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c index 0c7a7c0a..7aba6db4 100644 --- a/src/flash/at91sam7.c +++ b/src/flash/at91sam7.c @@ -243,7 +243,7 @@ void at91sam7_set_flash_mode(flash_bank_t *bank, u8 flashplane, int mode) if (at91sam7_info->mck_freq > 30000000ul) fws = 1; - DEBUG("fmcn[%i]: %i", flashplane, fmcn); + LOG_DEBUG("fmcn[%i]: %i", flashplane, fmcn); fmr = fmcn << 16 | fws << 8; target_write_u32(target, MC_FMR[flashplane], fmr); } @@ -257,21 +257,21 @@ u32 at91sam7_wait_status_busy(flash_bank_t *bank, u8 flashplane, u32 waitbits, i while ((!((status = at91sam7_get_flash_status(bank,flashplane)) & waitbits)) && (timeout-- > 0)) { - DEBUG("status[%i]: 0x%x", flashplane, status); + LOG_DEBUG("status[%i]: 0x%x", flashplane, status); usleep(1000); } - DEBUG("status[%i]: 0x%x", flashplane, status); + LOG_DEBUG("status[%i]: 0x%x", flashplane, status); if (status & 0x0C) { - ERROR("status register: 0x%x", status); + LOG_ERROR("status register: 0x%x", status); if (status & 0x4) - ERROR("Lock Error Bit Detected, Operation Abort"); + LOG_ERROR("Lock Error Bit Detected, Operation Abort"); if (status & 0x8) - ERROR("Invalid command and/or bad keyword, Operation Abort"); + LOG_ERROR("Invalid command and/or bad keyword, Operation Abort"); if (status & 0x10) - ERROR("Security Bit Set, Operation Abort"); + LOG_ERROR("Security Bit Set, Operation Abort"); } return status; @@ -287,7 +287,7 @@ int at91sam7_flash_command(struct flash_bank_s *bank, u8 flashplane, u8 cmd, u16 fcr = (0x5A<<24) | ((pagen&0x3FF)<<8) | cmd; target_write_u32(target, MC_FCR[flashplane], fcr); - DEBUG("Flash command: 0x%x, flashplane: %i, pagenumber:%u", fcr, flashplane, pagen); + LOG_DEBUG("Flash command: 0x%x, flashplane: %i, pagenumber:%u", fcr, flashplane, pagen); if ((at91sam7_info->cidr_arch == 0x60)&&((cmd==SLB)|(cmd==CLB))) { @@ -322,7 +322,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) if (cidr == 0) { - WARNING("Cannot identify target as an AT91SAM"); + LOG_WARNING("Cannot identify target as an AT91SAM"); return ERROR_FLASH_OPERATION_FAILED; } @@ -363,7 +363,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) - DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch ); + LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch ); /* Read main and master clock freqency register */ at91sam7_read_clock_info(bank); @@ -384,7 +384,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) at91sam7_info->target_name = "AT91SAM7S512"; at91sam7_info->num_planes = 2; if (at91sam7_info->num_planes != bank->num_sectors) - WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");; + LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");; at91sam7_info->num_lockbits = 2*16; at91sam7_info->pagesize = 256; at91sam7_info->pages_in_lockregion = 64; @@ -437,7 +437,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) at91sam7_info->target_name = "AT91SAM7XC512"; at91sam7_info->num_planes = 2; if (at91sam7_info->num_planes != bank->num_sectors) - WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");; + LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");; at91sam7_info->num_lockbits = 2*16; at91sam7_info->pagesize = 256; at91sam7_info->pages_in_lockregion = 64; @@ -474,7 +474,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) at91sam7_info->target_name = "AT91SAM7SE512"; at91sam7_info->num_planes = 2; if (at91sam7_info->num_planes != bank->num_sectors) - WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");; + LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");; at91sam7_info->num_lockbits = 32; at91sam7_info->pagesize = 256; at91sam7_info->pages_in_lockregion = 64; @@ -511,12 +511,12 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) at91sam7_info->target_name = "AT91SAM7X512"; at91sam7_info->num_planes = 2; if (at91sam7_info->num_planes != bank->num_sectors) - WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");; + LOG_WARNING("Internal error: Number of flash planes and erase sectors does not match, please report");; at91sam7_info->num_lockbits = 32; at91sam7_info->pagesize = 256; at91sam7_info->pages_in_lockregion = 64; at91sam7_info->num_pages = 2*16*64; - DEBUG("Support for AT91SAM7X512 is experimental in this version!"); + LOG_DEBUG("Support for AT91SAM7X512 is experimental in this version!"); } if (bank->size==0x40000) /* AT91SAM7X256 */ { @@ -556,7 +556,7 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) return ERROR_OK; } - WARNING("at91sam7 flash only tested for AT91SAM7Sxx series"); + LOG_WARNING("at91sam7 flash only tested for AT91SAM7Sxx series"); return ERROR_OK; } @@ -609,7 +609,7 @@ int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch if (argc < 6) { - WARNING("incomplete flash_bank at91sam7 configuration"); + LOG_WARNING("incomplete flash_bank at91sam7 configuration"); return ERROR_FLASH_BANK_INVALID; } @@ -643,7 +643,7 @@ int at91sam7_erase(struct flash_bank_s *bank, int first, int last) { if ((first == 0) && (last == (at91sam7_info->num_lockbits-1))) { - WARNING("Sector numbers based on lockbit count, probably a deprecated script"); + LOG_WARNING("Sector numbers based on lockbit count, probably a deprecated script"); last = bank->num_sectors-1; } else return ERROR_FLASH_SECTOR_INVALID; @@ -738,7 +738,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) if (offset % dst_min_alignment) { - WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment); + LOG_WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -748,7 +748,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) first_page = offset/dst_min_alignment; last_page = CEIL(offset + count, dst_min_alignment); - DEBUG("first_page: %i, last_page: %i, count %i", first_page, last_page, count); + LOG_DEBUG("first_page: %i, last_page: %i, count %i", first_page, last_page, count); at91sam7_read_clock_info(bank); @@ -773,7 +773,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { return ERROR_FLASH_OPERATION_FAILED; } - DEBUG("Write flash plane:%i page number:%i", flashplane, pagen); + LOG_DEBUG("Write flash plane:%i page number:%i", flashplane, pagen); } return ERROR_OK; @@ -914,7 +914,7 @@ int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, if (bank->target->state != TARGET_HALTED) { - ERROR("target has to be halted to perform flash operation"); + LOG_ERROR("target has to be halted to perform flash operation"); return ERROR_TARGET_NOT_HALTED; } @@ -942,7 +942,7 @@ int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, } status = at91sam7_get_flash_status(bank, 0); - DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value 0x%x, status 0x%x \n",flashcmd,bit,status); + LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value 0x%x, status 0x%x \n",flashcmd,bit,status); at91sam7_info->nvmbits = (status>>8)&((1<<at91sam7_info->num_nvmbits)-1); return ERROR_OK; diff --git a/src/flash/cfi.c b/src/flash/cfi.c index b11aae94..6aad04a7 100644 --- a/src/flash/cfi.c +++ b/src/flash/cfi.c @@ -139,7 +139,7 @@ __inline__ u32 flash_address(flash_bank_t *bank, int sector, u32 offset) { if (!bank->sectors) { - ERROR("BUG: sector list not yet built"); + LOG_ERROR("BUG: sector list not yet built"); exit(-1); } return bank->base + bank->sectors[sector].offset + offset * bank->bus_width; @@ -253,7 +253,7 @@ void cfi_intel_clear_status_register(flash_bank_t *bank) if (target->state != TARGET_HALTED) { - ERROR("BUG: attempted to clear status register while target wasn't halted"); + LOG_ERROR("BUG: attempted to clear status register while target wasn't halted"); exit(-1); } @@ -267,34 +267,34 @@ u8 cfi_intel_wait_status_busy(flash_bank_t *bank, int timeout) while ((!((status = cfi_get_u8(bank, 0, 0x0)) & 0x80)) && (timeout-- > 0)) { - DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%x", status); usleep(1000); } /* mask out bit 0 (reserved) */ status = status & 0xfe; - DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%x", status); if ((status & 0x80) != 0x80) { - ERROR("timeout while waiting for WSM to become ready"); + LOG_ERROR("timeout while waiting for WSM to become ready"); } else if (status != 0x80) { - ERROR("status register: 0x%x", status); + LOG_ERROR("status register: 0x%x", status); if (status & 0x2) - ERROR("Block Lock-Bit Detected, Operation Abort"); + LOG_ERROR("Block Lock-Bit Detected, Operation Abort"); if (status & 0x4) - ERROR("Program suspended"); + LOG_ERROR("Program suspended"); if (status & 0x8) - ERROR("Low Programming Voltage Detected, Operation Aborted"); + LOG_ERROR("Low Programming Voltage Detected, Operation Aborted"); if (status & 0x10) - ERROR("Program Error / Error in Setting Lock-Bit"); + LOG_ERROR("Program Error / Error in Setting Lock-Bit"); if (status & 0x20) - ERROR("Error in Block Erasure or Clear Lock-Bits"); + LOG_ERROR("Error in Block Erasure or Clear Lock-Bits"); if (status & 0x40) - ERROR("Block Erase Suspended"); + LOG_ERROR("Block Erase Suspended"); cfi_intel_clear_status_register(bank); } @@ -315,15 +315,15 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) oldstatus = cfi_get_u8(bank, 0, 0x0); status = cfi_get_u8(bank, 0, 0x0); if ((status ^ oldstatus) & 0x40) { - ERROR("dq5 timeout, status: 0x%x", status); + LOG_ERROR("dq5 timeout, status: 0x%x", status); return(ERROR_FLASH_OPERATION_FAILED); } else { - DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%x", status); return(ERROR_OK); } } } else { - DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%x", status); return(ERROR_OK); } @@ -331,7 +331,7 @@ int cfi_spansion_wait_status_busy(flash_bank_t *bank, int timeout) usleep(1000); } while (timeout-- > 0); - ERROR("timeout, status: 0x%x", status); + LOG_ERROR("timeout, status: 0x%x", status); return(ERROR_FLASH_BUSY); } @@ -361,32 +361,32 @@ int cfi_read_intel_pri_ext(flash_bank_t *bank) pri_ext->major_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 3); pri_ext->minor_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 4); - DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version); + LOG_DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version); pri_ext->feature_support = cfi_query_u32(bank, 0, cfi_info->pri_addr + 5); pri_ext->suspend_cmd_support = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9); pri_ext->blk_status_reg_mask = cfi_query_u16(bank, 0, cfi_info->pri_addr + 0xa); - DEBUG("feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask); + LOG_DEBUG("feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask); pri_ext->vcc_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xc); pri_ext->vpp_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xd); - DEBUG("Vcc opt: %1.1x.%1.1x, Vpp opt: %1.1x.%1.1x", + LOG_DEBUG("Vcc opt: %1.1x.%1.1x, Vpp opt: %1.1x.%1.1x", (pri_ext->vcc_optimal & 0xf0) >> 4, pri_ext->vcc_optimal & 0x0f, (pri_ext->vpp_optimal & 0xf0) >> 4, pri_ext->vpp_optimal & 0x0f); pri_ext->num_protection_fields = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xe); if (pri_ext->num_protection_fields != 1) { - WARNING("expected one protection register field, but found %i", pri_ext->num_protection_fields); + LOG_WARNING("expected one protection register field, but found %i", pri_ext->num_protection_fields); } pri_ext->prot_reg_addr = cfi_query_u16(bank, 0, cfi_info->pri_addr + 0xf); pri_ext->fact_prot_reg_size = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0x11); pri_ext->user_prot_reg_size = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0x12); - DEBUG("protection_fields: %i, prot_reg_addr: 0x%x, factory pre-programmed: %i, user programmable: %i", pri_ext->num_protection_fields, pri_ext->prot_reg_addr, 1 << pri_ext->fact_prot_reg_size, 1 << pri_ext->user_prot_reg_size); + LOG_DEBUG("protection_fields: %i, prot_reg_addr: 0x%x, factory pre-programmed: %i, user programmable: %i", pri_ext->num_protection_fields, pri_ext->prot_reg_addr, 1 << pri_ext->fact_prot_reg_size, 1 << pri_ext->user_prot_reg_size); return ERROR_OK; } @@ -414,7 +414,7 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank) pri_ext->major_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 3); pri_ext->minor_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 4); - DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version); + LOG_DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1], pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version); pri_ext->SiliconRevision = cfi_query_u8(bank, 0, cfi_info->pri_addr + 5); pri_ext->EraseSuspend = cfi_query_u8(bank, 0, cfi_info->pri_addr + 6); @@ -428,20 +428,20 @@ int cfi_read_spansion_pri_ext(flash_bank_t *bank) pri_ext->VppMax = cfi_query_u8(bank, 0, cfi_info->pri_addr + 14); pri_ext->TopBottom = cfi_query_u8(bank, 0, cfi_info->pri_addr + 15); - DEBUG("Silicon Revision: 0x%x, Erase Suspend: 0x%x, Block protect: 0x%x", pri_ext->SiliconRevision, + LOG_DEBUG("Silicon Revision: 0x%x, Erase Suspend: 0x%x, Block protect: 0x%x", pri_ext->SiliconRevision, pri_ext->EraseSuspend, pri_ext->BlkProt); - DEBUG("Temporary Unprotect: 0x%x, Block Protect Scheme: 0x%x, Simultaneous Ops: 0x%x", pri_ext->TmpBlkUnprotect, + LOG_DEBUG("Temporary Unprotect: 0x%x, Block Protect Scheme: 0x%x, Simultaneous Ops: 0x%x", pri_ext->TmpBlkUnprotect, pri_ext->BlkProtUnprot, pri_ext->SimultaneousOps); - DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->BurstMode, pri_ext->PageMode); + LOG_DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->BurstMode, pri_ext->PageMode); - DEBUG("Vpp min: %2.2d.%1.1d, Vpp max: %2.2d.%1.1x", + LOG_DEBUG("Vpp min: %2.2d.%1.1d, Vpp max: %2.2d.%1.1x", (pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f, (pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f); - DEBUG("WP# protection 0x%x", pri_ext->TopBottom); + LOG_DEBUG("WP# protection 0x%x", pri_ext->TopBottom); /* default values for implementation specific workarounds */ pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1; @@ -486,7 +486,7 @@ int cfi_read_atmel_pri_ext(flash_bank_t *bank) atmel_pri_ext.major_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 3); atmel_pri_ext.minor_version = cfi_query_u8(bank, 0, cfi_info->pri_addr + 4); - DEBUG("pri: '%c%c%c', version: %c.%c", atmel_pri_ext.pri[0], atmel_pri_ext.pri[1], atmel_pri_ext.pri[2], atmel_pri_ext.major_version, atmel_pri_ext.minor_version); + LOG_DEBUG("pri: '%c%c%c', version: %c.%c", atmel_pri_ext.pri[0], atmel_pri_ext.pri[1], atmel_pri_ext.pri[2], atmel_pri_ext.major_version, atmel_pri_ext.minor_version); pri_ext->major_version = atmel_pri_ext.major_version; pri_ext->minor_version = atmel_pri_ext.minor_version; @@ -496,7 +496,7 @@ int cfi_read_atmel_pri_ext(flash_bank_t *bank) atmel_pri_ext.burst_mode = cfi_query_u8(bank, 0, cfi_info->pri_addr + 7); atmel_pri_ext.page_mode = cfi_query_u8(bank, 0, cfi_info->pri_addr + 8); - DEBUG("features: 0x%2.2x, bottom_boot: 0x%2.2x, burst_mode: 0x%2.2x, page_mode: 0x%2.2x", + LOG_DEBUG("features: 0x%2.2x, bottom_boot: 0x%2.2x, burst_mode: 0x%2.2x, page_mode: 0x%2.2x", atmel_pri_ext.features, atmel_pri_ext.bottom_boot, atmel_pri_ext.burst_mode, atmel_pri_ext.page_mode); if (atmel_pri_ext.features & 0x02) @@ -611,14 +611,14 @@ int cfi_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char ** if (argc < 6) { - WARNING("incomplete flash_bank cfi configuration"); + LOG_WARNING("incomplete flash_bank cfi configuration"); return ERROR_FLASH_BANK_INVALID; } if ((strtoul(args[4], NULL, 0) > CFI_MAX_CHIP_WIDTH) || (strtoul(args[3], NULL, 0) > CFI_MAX_BUS_WIDTH)) { - ERROR("chip and bus width have to specified in bytes"); + LOG_ERROR("chip and bus width have to specified in bytes"); return ERROR_FLASH_BANK_INVALID; } @@ -677,7 +677,7 @@ int cfi_intel_erase(struct flash_bank_s *bank, int first, int last) cfi_command(bank, 0xff, command); target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); + LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); return ERROR_FLASH_OPERATION_FAILED; } } @@ -723,7 +723,7 @@ int cfi_spansion_erase(struct flash_bank_s *bank, int first, int last) cfi_command(bank, 0xf0, command); target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); + LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base); return ERROR_FLASH_OPERATION_FAILED; } } @@ -761,7 +761,7 @@ int cfi_erase(struct flash_bank_s *bank, int first, int last) return cfi_spansion_erase(bank, first, last); break; default: - ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; } @@ -788,19 +788,19 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) for (i = first; i <= last; i++) { cfi_command(bank, 0x60, command); - DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); + LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); if (set) { cfi_command(bank, 0x01, command); - DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); + LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); bank->sectors[i].is_protected = 1; } else { cfi_command(bank, 0xd0, command); - DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); + LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); target->type->write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command); bank->sectors[i].is_protected = 0; } @@ -821,7 +821,7 @@ int cfi_intel_protect(struct flash_bank_s *bank, int set, int first, int last) if ((block_status & 0x1) != set) { - ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status); + LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status); cfi_command(bank, 0x70, command); target->type->write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command); cfi_intel_wait_status_busy(bank, 10); @@ -889,7 +889,7 @@ int cfi_protect(struct flash_bank_s *bank, int set, int first, int last) cfi_intel_protect(bank, set, first, last); break; default: - ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; } @@ -961,7 +961,7 @@ u32 cfi_command_val(flash_bank_t *bank, u8 cmd) return target_buffer_get_u32(target, buf); break; default : - ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); + LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); return 0; } } @@ -1071,7 +1071,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 target_code_size = sizeof(word_32_code); break; default: - ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); + LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } @@ -1080,7 +1080,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 { if ( target_code_size > sizeof(target_code) ) { - WARNING("Internal error - target code buffer to small. Increase CFI_MAX_INTEL_CODESIZE and recompile."); + LOG_WARNING("Internal error - target code buffer to small. Increase CFI_MAX_INTEL_CODESIZE and recompile."); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); @@ -1089,7 +1089,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 retval = target_alloc_working_area(target, target_code_size, &cfi_info->write_algorithm); if (retval != ERROR_OK) { - WARNING("No working area available, can't do block memory writes"); + LOG_WARNING("No working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; @@ -1097,7 +1097,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 retval = target_write_buffer(target, cfi_info->write_algorithm->address, target_code_size, target_code); if (retval != ERROR_OK) { - ERROR("Unable to write block write code to target"); + LOG_ERROR("Unable to write block write code to target"); goto cleanup; } } @@ -1110,7 +1110,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 buffer_size /= 2; if (buffer_size <= 256) { - WARNING("no large enough working area available, can't do block memory writes"); + LOG_WARNING("no large enough working area available, can't do block memory writes"); retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; goto cleanup; } @@ -1130,7 +1130,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 busy_pattern_val = cfi_command_val(bank, 0x80); error_pattern_val = cfi_command_val(bank, 0x7e); - INFO("Using target buffer at 0x%08x and of size 0x%04x", source->address, buffer_size ); + LOG_INFO("Using target buffer at 0x%08x and of size 0x%04x", source->address, buffer_size ); /* Programming main loop */ while (count > 0) @@ -1148,7 +1148,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 buf_set_u32(reg_params[5].value, 0, 32, busy_pattern_val); buf_set_u32(reg_params[6].value, 0, 32, error_pattern_val); - INFO("Write 0x%04x bytes to flash at 0x%08x", thisrun_count, address ); + LOG_INFO("Write 0x%04x bytes to flash at 0x%08x", thisrun_count, address ); /* Execute algorithm, assume breakpoint for last instruction */ retval = target->type->run_algorithm(target, 0, NULL, 7, reg_params, @@ -1161,7 +1161,7 @@ int cfi_intel_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, u3 if (retval != ERROR_OK) { cfi_intel_clear_status_register(bank); - ERROR("Execution of flash algorythm failed. Can't fall back. Please report."); + LOG_ERROR("Execution of flash algorythm failed. Can't fall back. Please report."); retval = ERROR_FLASH_OPERATION_FAILED; /* retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; */ /* FIXME To allow fall back or recovery, we must save the actual status @@ -1366,7 +1366,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, target_code_size = sizeof(word_32_code); break; default: - ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); + LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width); return ERROR_FLASH_OPERATION_FAILED; } target_code = malloc(target_code_size); @@ -1395,7 +1395,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, if (cfi_info->write_algorithm) target_free_working_area(target, cfi_info->write_algorithm); - WARNING("not enough working area available, can't do block memory writes"); + LOG_WARNING("not enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } }; @@ -1436,7 +1436,7 @@ int cfi_spansion_write_block(struct flash_bank_s *bank, u8 *buffer, u32 address, if ((retval != ERROR_OK) || status != 0x80) { - DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%x", status); exit_code = ERROR_FLASH_OPERATION_FAILED; break; } @@ -1479,7 +1479,7 @@ int cfi_intel_write_word(struct flash_bank_s *bank, u8 *word, u32 address) cfi_command(bank, 0xff, command); target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); + LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -1500,7 +1500,7 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 /* Check for valid range */ if (address & buffermask) { - ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); + LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); return ERROR_FLASH_OPERATION_FAILED; } switch(bank->chip_width) @@ -1509,14 +1509,14 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 case 2 : bufferwsize = buffersize / 2; break; case 1 : bufferwsize = buffersize; break; default: - ERROR("Unsupported chip width %d", bank->chip_width); + LOG_ERROR("Unsupported chip width %d", bank->chip_width); return ERROR_FLASH_OPERATION_FAILED; } /* Check for valid size */ if (wordcount > bufferwsize) { - ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize); + LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize); return ERROR_FLASH_OPERATION_FAILED; } @@ -1531,7 +1531,7 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 cfi_command(bank, 0xff, command); target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address); + LOG_ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -1549,7 +1549,7 @@ int cfi_intel_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u3 cfi_command(bank, 0xff, command); target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address); + LOG_ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -1579,7 +1579,7 @@ int cfi_spansion_write_word(struct flash_bank_s *bank, u8 *word, u32 address) cfi_command(bank, 0xf0, command); target->type->write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); + LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address); return ERROR_FLASH_OPERATION_FAILED; } @@ -1600,7 +1600,7 @@ int cfi_write_word(struct flash_bank_s *bank, u8 *word, u32 address) return cfi_spansion_write_word(bank, word, address); break; default: - ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; } @@ -1619,10 +1619,10 @@ int cfi_write_words(struct flash_bank_s *bank, u8 *word, u32 wordcount, u32 addr break; case 2: /* return cfi_spansion_write_words(bank, word, address); */ - ERROR("cfi primary command set %i unimplemented - FIXME", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unimplemented - FIXME", cfi_info->pri_id); break; default: - ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; } @@ -1654,7 +1654,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) write_p = address & ~(bank->bus_width - 1); if ((align = address - write_p) != 0) { - INFO("Fixup %d unaligned head bytes", align ); + LOG_INFO("Fixup %d unaligned head bytes", align ); for (i = 0; i < bank->bus_width; i++) current_word[i] = 0; @@ -1703,7 +1703,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) retval = cfi_spansion_write_block(bank, buffer, write_p, blk_count); break; default: - ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); retval = ERROR_FLASH_OPERATION_FAILED; break; } @@ -1728,7 +1728,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) case 2 : bufferwsize = buffersize / 2; break; case 1 : bufferwsize = buffersize; break; default: - ERROR("Unsupported chip width %d", bank->chip_width); + LOG_ERROR("Unsupported chip width %d", bank->chip_width); return ERROR_FLASH_OPERATION_FAILED; } @@ -1737,7 +1737,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { if ((write_p & 0xff) == 0) { - INFO("Programming at %08x, count %08x bytes remaining", write_p, count); + LOG_INFO("Programming at %08x, count %08x bytes remaining", write_p, count); } if ((bufferwsize > 0) && (count >= buffersize) && !(write_p & buffermask)) { @@ -1781,7 +1781,7 @@ int cfi_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* handle unaligned tail bytes */ if (count > 0) { - INFO("Fixup %d unaligned tail bytes", count ); + LOG_INFO("Fixup %d unaligned tail bytes", count ); copy_p = write_p; for (i = 0; i < bank->bus_width; i++) @@ -1828,7 +1828,7 @@ void cfi_fixup_0002_erase_regions(flash_bank_t *bank, void *param) if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3)) { - DEBUG("swapping reversed erase region information on cmdset 0002 device"); + LOG_DEBUG("swapping reversed erase region information on cmdset 0002 device"); for (i = 0; i < cfi_info->num_erase_regions / 2; i++) { @@ -1929,7 +1929,7 @@ int cfi_probe(struct flash_bank_s *bank) cfi_info->qry[1] = cfi_query_u8(bank, 0, 0x11); cfi_info->qry[2] = cfi_query_u8(bank, 0, 0x12); - DEBUG("CFI qry returned: 0x%2.2x 0x%2.2x 0x%2.2x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2]); + LOG_DEBUG("CFI qry returned: 0x%2.2x 0x%2.2x 0x%2.2x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2]); if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y')) { @@ -1945,7 +1945,7 @@ int cfi_probe(struct flash_bank_s *bank) cfi_info->alt_id = cfi_query_u16(bank, 0, 0x17); cfi_info->alt_addr = cfi_query_u16(bank, 0, 0x19); - DEBUG("qry: '%c%c%c', pri_id: 0x%4.4x, pri_addr: 0x%4.4x, alt_id: 0x%4.4x, alt_addr: 0x%4.4x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2], cfi_info->pri_id, cfi_info->pri_addr, cfi_info->alt_id, cfi_info->alt_addr); + LOG_DEBUG("qry: '%c%c%c', pri_id: 0x%4.4x, pri_addr: 0x%4.4x, alt_id: 0x%4.4x, alt_addr: 0x%4.4x", cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2], cfi_info->pri_id, cfi_info->pri_addr, cfi_info->alt_id, cfi_info->alt_addr); cfi_info->vcc_min = cfi_query_u8(bank, 0, 0x1b); cfi_info->vcc_max = cfi_query_u8(bank, 0, 0x1c); @@ -1960,14 +1960,14 @@ int cfi_probe(struct flash_bank_s *bank) cfi_info->block_erase_timeout_max = cfi_query_u8(bank, 0, 0x25); cfi_info->chip_erase_timeout_max = cfi_query_u8(bank, 0, 0x26); - DEBUG("Vcc min: %1.1x.%1.1x, Vcc max: %1.1x.%1.1x, Vpp min: %1.1x.%1.1x, Vpp max: %1.1x.%1.1x", + LOG_DEBUG("Vcc min: %1.1x.%1.1x, Vcc max: %1.1x.%1.1x, Vpp min: %1.1x.%1.1x, Vpp max: %1.1x.%1.1x", (cfi_info->vcc_min & 0xf0) >> 4, cfi_info->vcc_min & 0x0f, (cfi_info->vcc_max & 0xf0) >> 4, cfi_info->vcc_max & 0x0f, (cfi_info->vpp_min & 0xf0) >> 4, cfi_info->vpp_min & 0x0f, (cfi_info->vpp_max & 0xf0) >> 4, cfi_info->vpp_max & 0x0f); - DEBUG("typ. word write timeout: %u, typ. buf write timeout: %u, typ. block erase timeout: %u, typ. chip erase timeout: %u", 1 << cfi_info->word_write_timeout_typ, 1 << cfi_info->buf_write_timeout_typ, + LOG_DEBUG("typ. word write timeout: %u, typ. buf write timeout: %u, typ. block erase timeout: %u, typ. chip erase timeout: %u", 1 << cfi_info->word_write_timeout_typ, 1 << cfi_info->buf_write_timeout_typ, 1 << cfi_info->block_erase_timeout_typ, 1 << cfi_info->chip_erase_timeout_typ); - DEBUG("max. word write timeout: %u, max. buf write timeout: %u, max. block erase timeout: %u, max. chip erase timeout: %u", (1 << cfi_info->word_write_timeout_max) * (1 << cfi_info->word_write_timeout_typ), + LOG_DEBUG("max. word write timeout: %u, max. buf write timeout: %u, max. block erase timeout: %u, max. chip erase timeout: %u", (1 << cfi_info->word_write_timeout_max) * (1 << cfi_info->word_write_timeout_typ), (1 << cfi_info->buf_write_timeout_max) * (1 << cfi_info->buf_write_timeout_typ), (1 << cfi_info->block_erase_timeout_max) * (1 << cfi_info->block_erase_timeout_typ), (1 << cfi_info->chip_erase_timeout_max) * (1 << cfi_info->chip_erase_timeout_typ)); @@ -1977,11 +1977,11 @@ int cfi_probe(struct flash_bank_s *bank) cfi_info->max_buf_write_size = cfi_query_u16(bank, 0, 0x2a); cfi_info->num_erase_regions = cfi_query_u8(bank, 0, 0x2c); - DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", 1 << cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size)); + LOG_DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", 1 << cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size)); if (((1 << cfi_info->dev_size) * bank->bus_width / bank->chip_width) != bank->size) { - WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, 1 << cfi_info->dev_size); + LOG_WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, 1 << cfi_info->dev_size); } if (cfi_info->num_erase_regions) @@ -1990,7 +1990,7 @@ int cfi_probe(struct flash_bank_s *bank) for (i = 0; i < cfi_info->num_erase_regions; i++) { cfi_info->erase_region_info[i] = cfi_query_u32(bank, 0, 0x2d + (4 * i)); - DEBUG("erase region[%i]: %i blocks of size 0x%x", i, (cfi_info->erase_region_info[i] & 0xffff) + 1, (cfi_info->erase_region_info[i] >> 16) * 256); + LOG_DEBUG("erase region[%i]: %i blocks of size 0x%x", i, (cfi_info->erase_region_info[i] & 0xffff) + 1, (cfi_info->erase_region_info[i] >> 16) * 256); } } else @@ -2013,7 +2013,7 @@ int cfi_probe(struct flash_bank_s *bank) cfi_read_0002_pri_ext(bank); break; default: - ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; } @@ -2039,7 +2039,7 @@ int cfi_probe(struct flash_bank_s *bank) cfi_fixup(bank, cfi_0002_fixups); break; default: - ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; } @@ -2118,7 +2118,7 @@ int cfi_erase_check(struct flash_bank_s *bank) /* make sure we have a working area */ if (target_alloc_working_area(target, 20, &cfi_info->erase_check_algorithm) != ERROR_OK) { - WARNING("no working area available, falling back to slow memory reads"); + LOG_WARNING("no working area available, falling back to slow memory reads"); } else { @@ -2294,7 +2294,7 @@ int cfi_protect_check(struct flash_bank_s *bank) return cfi_spansion_protect_check(bank); break; default: - ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; } @@ -2371,7 +2371,7 @@ int cfi_info(struct flash_bank_s *bank, char *buf, int buf_size) cfi_spansion_info(bank, buf, buf_size); break; default: - ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); + LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id); break; } } diff --git a/src/flash/ecos.c b/src/flash/ecos.c index 4127cf53..55e54e05 100644 --- a/src/flash/ecos.c +++ b/src/flash/ecos.c @@ -147,14 +147,14 @@ int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c if (argc < 7) { - WARNING("incomplete flash_bank ecosflash configuration"); + LOG_WARNING("incomplete flash_bank ecosflash configuration"); return ERROR_FLASH_BANK_INVALID; } info = malloc(sizeof(ecosflash_flash_bank_t)); if(info == NULL) { - ERROR("no memory for flash bank info"); + LOG_ERROR("no memory for flash bank info"); exit(-1); } bank->driver_priv = info; @@ -180,7 +180,7 @@ int ecosflash_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c info->target = get_target_by_num(strtoul(args[5], NULL, 0)); if (info->target == NULL) { - ERROR("no target '%i' configured", (int)strtoul(args[5], NULL, 0)); + LOG_ERROR("no target '%i' configured", (int)strtoul(args[5], NULL, 0)); exit(-1); } return ERROR_OK; @@ -212,14 +212,14 @@ int loadDriver(ecosflash_flash_bank_t *info) int retval; if ((retval = image_read_section(&image, i, 0x0, image.sections[i].size, buffer, &buf_cnt)) != ERROR_OK) { - ERROR("image_read_section failed with error code: %i", retval); + LOG_ERROR("image_read_section failed with error code: %i", retval); free(buffer); image_close(&image); return ERROR_FLASH_BANK_INVALID; } target_write_buffer(target, image.sections[i].base_address, buf_cnt, buffer); image_size += buf_cnt; - DEBUG("%u byte written at address 0x%8.8x", buf_cnt, image.sections[i].base_address); + LOG_DEBUG("%u byte written at address 0x%8.8x", buf_cnt, image.sections[i].base_address); free(buffer); } @@ -266,7 +266,7 @@ int runCode(ecosflash_flash_bank_t *info, codeStop, timeout, &armv4_5_info)) != ERROR_OK) { - ERROR("error executing eCos flash algorithm"); + LOG_ERROR("error executing eCos flash algorithm"); return retval; } @@ -303,7 +303,7 @@ int eCosBoard_erase(ecosflash_flash_bank_t *info, u32 address, u32 len) if (flashErr != 0x0) { - ERROR("Flash erase failed with %d (%s)\n", flashErr, flash_errmsg(flashErr)); + LOG_ERROR("Flash erase failed with %d (%s)\n", flashErr, flash_errmsg(flashErr)); return ERROR_JTAG_DEVICE_ERROR; } @@ -362,7 +362,7 @@ int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, u32 address, u32 l if (flashErr != 0x0) { - ERROR("Flash prog failed with %d (%s)\n", flashErr, flash_errmsg(flashErr)); + LOG_ERROR("Flash prog failed with %d (%s)\n", flashErr, flash_errmsg(flashErr)); return ERROR_JTAG_DEVICE_ERROR; } } diff --git a/src/flash/flash.c b/src/flash/flash.c index 1c6773db..b3d1aa75 100644 --- a/src/flash/flash.c +++ b/src/flash/flash.c @@ -93,7 +93,7 @@ static int flash_driver_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, retval=bank->driver->write(bank, buffer, offset, count); if (retval!=ERROR_OK) { - ERROR("error writing to flash at address 0x%08x at offset 0x%8.8x (%d)", bank->base, offset, retval); + LOG_ERROR("error writing to flash at address 0x%08x at offset 0x%8.8x (%d)", bank->base, offset, retval); } return retval; @@ -106,7 +106,7 @@ static int flash_driver_erase(struct flash_bank_s *bank, int first, int last) retval=bank->driver->erase(bank, first, last); if (retval!=ERROR_OK) { - ERROR("failed erasing sectors %d to %d (%d)", first, last, retval); + LOG_ERROR("failed erasing sectors %d to %d (%d)", first, last, retval); } return retval; @@ -119,7 +119,7 @@ int flash_driver_protect(struct flash_bank_s *bank, int set, int first, int last retval=bank->driver->protect(bank, set, first, last); if (retval!=ERROR_OK) { - ERROR("failed setting protection for areas %d to %d (%d)", first, last, retval); + LOG_ERROR("failed setting protection for areas %d to %d (%d)", first, last, retval); } return retval; @@ -177,7 +177,7 @@ flash_bank_t *get_flash_bank_by_num_noprobe(int num) return p; } } - ERROR("flash bank %d does not exist", num); + LOG_ERROR("flash bank %d does not exist", num); return NULL; } @@ -204,7 +204,7 @@ flash_bank_t *get_flash_bank_by_num(int num) if (retval != ERROR_OK) { - ERROR("auto_probe failed %d\n", retval); + LOG_ERROR("auto_probe failed %d\n", retval); return NULL; } return p; @@ -223,7 +223,7 @@ int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char if ((target = get_target_by_num(strtoul(args[5], NULL, 0))) == NULL) { - ERROR("target %lu not defined", strtoul(args[5], NULL, 0)); + LOG_ERROR("target %lu not defined", strtoul(args[5], NULL, 0)); return ERROR_OK; } @@ -236,7 +236,7 @@ int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char /* register flash specific commands */ if (flash_drivers[i]->register_commands(cmd_ctx) != ERROR_OK) { - ERROR("couldn't register '%s' commands", args[0]); + LOG_ERROR("couldn't register '%s' commands", args[0]); exit(-1); } @@ -254,7 +254,7 @@ int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char if (flash_drivers[i]->flash_bank_command(cmd_ctx, cmd, args, argc, c) != ERROR_OK) { - ERROR("'%s' driver rejected flash bank at 0x%8.8x", args[0], c->base); + LOG_ERROR("'%s' driver rejected flash bank at 0x%8.8x", args[0], c->base); free(c); return ERROR_OK; } @@ -279,7 +279,7 @@ int handle_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char /* no matching flash driver found */ if (!found) { - ERROR("flash driver '%s' not found", args[0]); + LOG_ERROR("flash driver '%s' not found", args[0]); exit(-1); } @@ -356,7 +356,7 @@ int handle_flash_info_command(struct command_context_s *cmd_ctx, char *cmd, char retval = p->driver->info(p, buf, sizeof(buf)); command_print(cmd_ctx, "%s", buf); if (retval != ERROR_OK) - ERROR("error retrieving flash info (%d)", retval); + LOG_ERROR("error retrieving flash info (%d)", retval); } } @@ -598,7 +598,7 @@ int handle_flash_write_image_command(struct command_context_s *cmd_ctx, char *cm if (!target) { - ERROR("no target selected"); + LOG_ERROR("no target selected"); return ERROR_OK; } @@ -731,14 +731,14 @@ flash_bank_t *get_flash_bank_by_addr(target_t *target, u32 addr) if (retval != ERROR_OK) { - ERROR("auto_probe failed %d\n", retval); + LOG_ERROR("auto_probe failed %d\n", retval); return NULL; } /* check whether address belongs to this flash bank */ if ((addr >= c->base) && (addr < c->base + c->size) && target == c->target) return c; } - ERROR("No flash at address 0x%08x\n", addr); + LOG_ERROR("No flash at address 0x%08x\n", addr); return NULL; } @@ -823,7 +823,7 @@ int flash_write(target_t *target, image_t *image, u32 *written, int erase) if (image->sections[section].size == 0) { - WARNING("empty section %d", section); + LOG_WARNING("empty section %d", section); section++; section_offset = 0; continue; @@ -845,7 +845,7 @@ int flash_write(target_t *target, image_t *image, u32 *written, int erase) { if (image->sections[section_last + 1].base_address < (run_address + run_size)) { - DEBUG("section %d out of order(very slightly surprising, but supported)", section_last + 1); + LOG_DEBUG("section %d out of order(very slightly surprising, but supported)", section_last + 1); break; } if (image->sections[section_last + 1].base_address != (run_address + run_size)) diff --git a/src/flash/lpc2000.c b/src/flash/lpc2000.c index 5d9781ac..3424374d 100644 --- a/src/flash/lpc2000.c +++ b/src/flash/lpc2000.c @@ -146,7 +146,7 @@ int lpc2000_build_sector_list(struct flash_bank_s *bank) } else { - ERROR("BUG: unknown bank->size encountered"); + LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); } } @@ -187,7 +187,7 @@ int lpc2000_build_sector_list(struct flash_bank_s *bank) num_sectors = 27; break; default: - ERROR("BUG: unknown bank->size encountered"); + LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); break; } @@ -225,7 +225,7 @@ int lpc2000_build_sector_list(struct flash_bank_s *bank) } else { - ERROR("BUG: unknown lpc2000_info->variant encountered"); + LOG_ERROR("BUG: unknown lpc2000_info->variant encountered"); exit(-1); } @@ -256,7 +256,7 @@ int lpc2000_iap_call(flash_bank_t *bank, int code, u32 param_table[5], u32 resul /* make sure we have a working area */ if (target_alloc_working_area(target, 172, &lpc2000_info->iap_working_area) != ERROR_OK) { - ERROR("no working area specified, can't write LPC2000 internal flash"); + LOG_ERROR("no working area specified, can't write LPC2000 internal flash"); return ERROR_FLASH_OPERATION_FAILED; } @@ -351,7 +351,7 @@ int lpc2000_iap_blank_check(struct flash_bank_s *bank, int first, int last) return ERROR_FLASH_BUSY; break; default: - ERROR("BUG: unknown LPC2000 status code"); + LOG_ERROR("BUG: unknown LPC2000 status code"); exit(-1); } } @@ -367,7 +367,7 @@ int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, cha if (argc < 8) { - WARNING("incomplete flash_bank lpc2000 configuration"); + LOG_WARNING("incomplete flash_bank lpc2000 configuration"); return ERROR_FLASH_BANK_INVALID; } @@ -390,7 +390,7 @@ int lpc2000_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, cha } else { - ERROR("unknown LPC2000 variant"); + LOG_ERROR("unknown LPC2000 variant"); free(lpc2000_info); return ERROR_FLASH_BANK_INVALID; } @@ -437,7 +437,7 @@ int lpc2000_erase(struct flash_bank_s *bank, int first, int last) return ERROR_FLASH_SECTOR_INVALID; break; default: - WARNING("lpc2000 prepare sectors returned %i", status_code); + LOG_WARNING("lpc2000 prepare sectors returned %i", status_code); return ERROR_FLASH_OPERATION_FAILED; } @@ -453,7 +453,7 @@ int lpc2000_erase(struct flash_bank_s *bank, int first, int last) return ERROR_FLASH_SECTOR_INVALID; break; default: - WARNING("lpc2000 erase sectors returned %i", status_code); + LOG_WARNING("lpc2000 erase sectors returned %i", status_code); return ERROR_FLASH_OPERATION_FAILED; } @@ -489,7 +489,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) /* allocate a working area */ if (target_alloc_working_area(target, lpc2000_info->cmd51_max_buffer, &download_area) != ERROR_OK) { - ERROR("no working area specified, can't write LPC2000 internal flash"); + LOG_ERROR("no working area specified, can't write LPC2000 internal flash"); return ERROR_FLASH_OPERATION_FAILED; } @@ -503,7 +503,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) if (offset % dst_min_alignment) { - WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment); + LOG_WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -515,7 +515,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) last_sector = i; } - DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector); + LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector); /* check if exception vectors should be flashed */ if ((offset == 0) && (count >= 0x20) && lpc2000_info->calc_checksum) @@ -524,12 +524,12 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) int i = 0; for (i = 0; i < 8; i++) { - DEBUG("0x%2.2x: 0x%8.8x", i * 4, buf_get_u32(buffer + (i * 4), 0, 32)); + LOG_DEBUG("0x%2.2x: 0x%8.8x", i * 4, buf_get_u32(buffer + (i * 4), 0, 32)); if (i != 5) checksum += buf_get_u32(buffer + (i * 4), 0, 32); } checksum = 0 - checksum; - DEBUG("checksum: 0x%8.8x", checksum); + LOG_DEBUG("checksum: 0x%8.8x", checksum); buf_set_u32(buffer + 0x14, 0, 32, checksum); } @@ -559,7 +559,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) return ERROR_FLASH_SECTOR_INVALID; break; default: - WARNING("lpc2000 prepare sectors returned %i", status_code); + LOG_WARNING("lpc2000 prepare sectors returned %i", status_code); return ERROR_FLASH_OPERATION_FAILED; } @@ -582,7 +582,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) free(last_buffer); } - DEBUG("writing 0x%x bytes to address 0x%x", thisrun_bytes, bank->base + offset + bytes_written); + LOG_DEBUG("writing 0x%x bytes to address 0x%x", thisrun_bytes, bank->base + offset + bytes_written); /* Write data */ param_table[0] = bank->base + offset + bytes_written; @@ -600,7 +600,7 @@ int lpc2000_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) return ERROR_FLASH_SECTOR_INVALID; break; default: - WARNING("lpc2000 returned %i", status_code); + LOG_WARNING("lpc2000 returned %i", status_code); return ERROR_FLASH_OPERATION_FAILED; } diff --git a/src/flash/lpc3180_nand_controller.c b/src/flash/lpc3180_nand_controller.c index 2874f62f..8b6a5ace 100644 --- a/src/flash/lpc3180_nand_controller.c +++ b/src/flash/lpc3180_nand_controller.c @@ -72,7 +72,7 @@ int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, ch if (argc < 3) { - WARNING("incomplete 'lpc3180' nand flash configuration"); + LOG_WARNING("incomplete 'lpc3180' nand flash configuration"); return ERROR_FLASH_BANK_INVALID; } @@ -82,14 +82,14 @@ int lpc3180_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, ch lpc3180_info->target = get_target_by_num(strtoul(args[1], NULL, 0)); if (!lpc3180_info->target) { - ERROR("no target '%s' configured", args[1]); + LOG_ERROR("no target '%s' configured", args[1]); return ERROR_NAND_DEVICE_INVALID; } lpc3180_info->osc_freq = strtoul(args[2], NULL, 0); if ((lpc3180_info->osc_freq < 1000) || (lpc3180_info->osc_freq > 20000)) { - WARNING("LPC3180 oscillator frequency should be between 1000 and 20000 kHz, was %i", lpc3180_info->osc_freq); + LOG_WARNING("LPC3180 oscillator frequency should be between 1000 and 20000 kHz, was %i", lpc3180_info->osc_freq); } lpc3180_info->selected_controller = LPC3180_NO_CONTROLLER; lpc3180_info->sw_write_protection = 0; @@ -119,7 +119,7 @@ int lpc3180_pll(int fclkin, u32 pll_ctrl) int lock = (pll_ctrl & 0x1); if (!lock) - WARNING("PLL is not locked"); + LOG_WARNING("PLL is not locked"); if (!bypass && direct) /* direct mode */ return (m * fclkin) / n; @@ -179,7 +179,7 @@ float lpc3180_cycle_time(lpc3180_nand_controller_t *lpc3180_info) } } - DEBUG("LPC3180 HCLK currently clocked at %i kHz", hclk); + LOG_DEBUG("LPC3180 HCLK currently clocked at %i kHz", hclk); cycle = (1.0 / hclk) * 1000000.0; @@ -196,14 +196,14 @@ int lpc3180_init(struct nand_device_s *device) if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } /* sanitize arguments */ if ((bus_width != 8) && (bus_width != 16)) { - ERROR("LPC3180 only supports 8 or 16 bit bus width, not %i", bus_width); + LOG_ERROR("LPC3180 only supports 8 or 16 bit bus width, not %i", bus_width); return ERROR_NAND_OPERATION_NOT_SUPPORTED; } @@ -212,7 +212,7 @@ int lpc3180_init(struct nand_device_s *device) */ if (bus_width == 16) { - WARNING("LPC3180 only supports 8 bit bus width"); + LOG_WARNING("LPC3180 only supports 8 bit bus width"); } /* inform calling code about selected bus width */ @@ -220,20 +220,20 @@ int lpc3180_init(struct nand_device_s *device) if ((address_cycles != 3) && (address_cycles != 4)) { - ERROR("LPC3180 only supports 3 or 4 address cycles, not %i", address_cycles); + LOG_ERROR("LPC3180 only supports 3 or 4 address cycles, not %i", address_cycles); return ERROR_NAND_OPERATION_NOT_SUPPORTED; } if ((page_size != 512) && (page_size != 2048)) { - ERROR("LPC3180 only supports 512 or 2048 byte pages, not %i", page_size); + LOG_ERROR("LPC3180 only supports 512 or 2048 byte pages, not %i", page_size); return ERROR_NAND_OPERATION_NOT_SUPPORTED; } /* select MLC controller if none is currently selected */ if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - DEBUG("no LPC3180 NAND flash controller selected, using default 'mlc'"); + LOG_DEBUG("no LPC3180 NAND flash controller selected, using default 'mlc'"); lpc3180_info->selected_controller = LPC3180_MLC_CONTROLLER; } @@ -323,13 +323,13 @@ int lpc3180_reset(struct nand_device_s *device) if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - ERROR("BUG: no LPC3180 NAND flash controller selected"); + LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) @@ -339,7 +339,7 @@ int lpc3180_reset(struct nand_device_s *device) if (!lpc3180_controller_ready(device, 100)) { - ERROR("LPC3180 NAND controller timed out after reset"); + LOG_ERROR("LPC3180 NAND controller timed out after reset"); return ERROR_NAND_OPERATION_TIMEOUT; } } @@ -350,7 +350,7 @@ int lpc3180_reset(struct nand_device_s *device) if (!lpc3180_controller_ready(device, 100)) { - ERROR("LPC3180 NAND controller timed out after reset"); + LOG_ERROR("LPC3180 NAND controller timed out after reset"); return ERROR_NAND_OPERATION_TIMEOUT; } } @@ -365,13 +365,13 @@ int lpc3180_command(struct nand_device_s *device, u8 command) if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - ERROR("BUG: no LPC3180 NAND flash controller selected"); + LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) @@ -395,13 +395,13 @@ int lpc3180_address(struct nand_device_s *device, u8 address) if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - ERROR("BUG: no LPC3180 NAND flash controller selected"); + LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) @@ -425,13 +425,13 @@ int lpc3180_write_data(struct nand_device_s *device, u16 data) if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - ERROR("BUG: no LPC3180 NAND flash controller selected"); + LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) @@ -455,13 +455,13 @@ int lpc3180_read_data(struct nand_device_s *device, void *data) if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - ERROR("BUG: no LPC3180 NAND flash controller selected"); + LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) @@ -479,7 +479,7 @@ int lpc3180_read_data(struct nand_device_s *device, void *data) } else { - ERROR("BUG: bus_width neither 8 nor 16 bit"); + LOG_ERROR("BUG: bus_width neither 8 nor 16 bit"); return ERROR_NAND_OPERATION_FAILED; } } @@ -502,7 +502,7 @@ int lpc3180_read_data(struct nand_device_s *device, void *data) } else { - ERROR("BUG: bus_width neither 8 nor 16 bit"); + LOG_ERROR("BUG: bus_width neither 8 nor 16 bit"); return ERROR_NAND_OPERATION_FAILED; } } @@ -519,13 +519,13 @@ int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 dat if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - ERROR("BUG: no LPC3180 NAND flash controller selected"); + LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) @@ -536,19 +536,19 @@ int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 dat if (!data && oob) { - ERROR("LPC3180 MLC controller can't write OOB data only"); + LOG_ERROR("LPC3180 MLC controller can't write OOB data only"); return ERROR_NAND_OPERATION_NOT_SUPPORTED; } if (oob && (oob_size > 6)) { - ERROR("LPC3180 MLC controller can't write more than 6 bytes of OOB data"); + LOG_ERROR("LPC3180 MLC controller can't write more than 6 bytes of OOB data"); return ERROR_NAND_OPERATION_NOT_SUPPORTED; } if (data_size > device->page_size) { - ERROR("data size exceeds page size"); + LOG_ERROR("data size exceeds page size"); return ERROR_NAND_OPERATION_NOT_SUPPORTED; } @@ -618,7 +618,7 @@ int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 dat if (!lpc3180_controller_ready(device, 1000)) { - ERROR("timeout while waiting for completion of auto encode cycle"); + LOG_ERROR("timeout while waiting for completion of auto encode cycle"); return ERROR_NAND_OPERATION_FAILED; } } @@ -628,13 +628,13 @@ int lpc3180_write_page(struct nand_device_s *device, u32 page, u8 *data, u32 dat if ((retval = nand_read_status(device, &status)) != ERROR_OK) { - ERROR("couldn't read status"); + LOG_ERROR("couldn't read status"); return ERROR_NAND_OPERATION_FAILED; } if (status & NAND_STATUS_FAIL) { - ERROR("write operation didn't pass, status: 0x%2.2x", status); + LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status); return ERROR_NAND_OPERATION_FAILED; } @@ -656,13 +656,13 @@ int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) { - ERROR("BUG: no LPC3180 NAND flash controller selected"); + LOG_ERROR("BUG: no LPC3180 NAND flash controller selected"); return ERROR_NAND_OPERATION_FAILED; } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) @@ -676,14 +676,14 @@ int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data #if 0 if (oob && (oob_size > 6)) { - ERROR("LPC3180 MLC controller can't read more than 6 bytes of OOB data"); + LOG_ERROR("LPC3180 MLC controller can't read more than 6 bytes of OOB data"); return ERROR_NAND_OPERATION_NOT_SUPPORTED; } #endif if (data_size > device->page_size) { - ERROR("data size exceeds page size"); + LOG_ERROR("data size exceeds page size"); return ERROR_NAND_OPERATION_NOT_SUPPORTED; } @@ -748,7 +748,7 @@ int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data if (!lpc3180_controller_ready(device, 1000)) { - ERROR("timeout while waiting for completion of auto decode cycle"); + LOG_ERROR("timeout while waiting for completion of auto decode cycle"); return ERROR_NAND_OPERATION_FAILED; } @@ -758,11 +758,11 @@ int lpc3180_read_page(struct nand_device_s *device, u32 page, u8 *data, u32 data { if (mlc_isr & 0x40) { - ERROR("uncorrectable error detected: 0x%2.2x", mlc_isr); + LOG_ERROR("uncorrectable error detected: 0x%2.2x", mlc_isr); return ERROR_NAND_OPERATION_FAILED; } - WARNING("%i symbol error detected and corrected", ((mlc_isr & 0x30) >> 4) + 1); + LOG_WARNING("%i symbol error detected and corrected", ((mlc_isr & 0x30) >> 4) + 1); } if (data) @@ -804,7 +804,7 @@ int lpc3180_controller_ready(struct nand_device_s *device, int timeout) if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } @@ -837,7 +837,7 @@ int lpc3180_nand_ready(struct nand_device_s *device, int timeout) if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use LPC3180 NAND flash controller"); + LOG_ERROR("target must be halted to use LPC3180 NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } diff --git a/src/flash/nand.c b/src/flash/nand.c index f01b94c2..4d355cf1 100644 --- a/src/flash/nand.c +++ b/src/flash/nand.c @@ -193,7 +193,7 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha if (argc < 1) { - WARNING("incomplete flash device nand configuration"); + LOG_WARNING("incomplete flash device nand configuration"); return ERROR_FLASH_BANK_INVALID; } @@ -206,7 +206,7 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha /* register flash specific commands */ if (nand_flash_controllers[i]->register_commands(cmd_ctx) != ERROR_OK) { - ERROR("couldn't register '%s' commands", args[0]); + LOG_ERROR("couldn't register '%s' commands", args[0]); exit(-1); } @@ -224,7 +224,7 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha if ((retval = nand_flash_controllers[i]->nand_device_command(cmd_ctx, cmd, args, argc, c)) != ERROR_OK) { - ERROR("'%s' driver rejected nand flash", c->controller->name); + LOG_ERROR("'%s' driver rejected nand flash", c->controller->name); free(c); return ERROR_OK; } @@ -249,11 +249,11 @@ int handle_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, cha /* no valid NAND controller was found (i.e. the configuration option, * didn't match one of the compiled-in controllers) */ - ERROR("No valid NAND flash controller found (%s)", args[0]); - ERROR("compiled-in NAND flash controllers:"); + LOG_ERROR("No valid NAND flash controller found (%s)", args[0]); + LOG_ERROR("compiled-in NAND flash controllers:"); for (i = 0; nand_flash_controllers[i]; i++) { - ERROR("%i: %s", i, nand_flash_controllers[i]->name); + LOG_ERROR("%i: %s", i, nand_flash_controllers[i]->name); } return ERROR_OK; @@ -333,7 +333,7 @@ int nand_build_bbt(struct nand_device_s *device, int first, int last) || (((device->page_size == 512) && (oob[5] != 0xff)) || ((device->page_size == 2048) && (oob[0] != 0xff)))) { - WARNING("invalid block: %i", i); + LOG_WARNING("invalid block: %i", i); device->blocks[i].is_bad = 1; } else @@ -395,13 +395,13 @@ int nand_probe(struct nand_device_s *device) switch (retval) { case ERROR_NAND_OPERATION_FAILED: - DEBUG("controller initialization failed"); + LOG_DEBUG("controller initialization failed"); return ERROR_NAND_OPERATION_FAILED; case ERROR_NAND_OPERATION_NOT_SUPPORTED: - ERROR("BUG: controller reported that it doesn't support default parameters"); + LOG_ERROR("BUG: controller reported that it doesn't support default parameters"); return ERROR_NAND_OPERATION_FAILED; default: - ERROR("BUG: unknown controller initialization failure"); + LOG_ERROR("BUG: unknown controller initialization failure"); return ERROR_NAND_OPERATION_FAILED; } } @@ -452,12 +452,12 @@ int nand_probe(struct nand_device_s *device) if (!device->device) { - ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x", + LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x", manufacturer_id, device_id); return ERROR_NAND_OPERATION_FAILED; } - DEBUG("found %s (%s)", device->device->name, device->manufacturer->name); + LOG_DEBUG("found %s (%s)", device->device->name, device->manufacturer->name); /* initialize device parameters */ @@ -499,7 +499,7 @@ int nand_probe(struct nand_device_s *device) } else if (device->device->page_size == 256) { - ERROR("NAND flashes with 256 byte pagesize are not supported"); + LOG_ERROR("NAND flashes with 256 byte pagesize are not supported"); return ERROR_NAND_OPERATION_FAILED; } else @@ -517,7 +517,7 @@ int nand_probe(struct nand_device_s *device) device->address_cycles = 4; else { - ERROR("BUG: small page NAND device with more than 8 GiB encountered"); + LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered"); device->address_cycles = 5; } } @@ -530,7 +530,7 @@ int nand_probe(struct nand_device_s *device) device->address_cycles = 5; else { - ERROR("BUG: small page NAND device with more than 32 GiB encountered"); + LOG_ERROR("BUG: small page NAND device with more than 32 GiB encountered"); device->address_cycles = 6; } } @@ -564,14 +564,14 @@ int nand_probe(struct nand_device_s *device) switch (retval) { case ERROR_NAND_OPERATION_FAILED: - DEBUG("controller initialization failed"); + LOG_DEBUG("controller initialization failed"); return ERROR_NAND_OPERATION_FAILED; case ERROR_NAND_OPERATION_NOT_SUPPORTED: - ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)", + LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)", device->bus_width, device->address_cycles, device->page_size); return ERROR_NAND_OPERATION_FAILED; default: - ERROR("BUG: unknown controller initialization failure"); + LOG_ERROR("BUG: unknown controller initialization failure"); return ERROR_NAND_OPERATION_FAILED; } } @@ -651,19 +651,19 @@ int nand_erase(struct nand_device_s *device, int first_block, int last_block) if (!device->controller->nand_ready(device, 1000)) { - ERROR("timeout waiting for NAND flash block erase to complete"); + LOG_ERROR("timeout waiting for NAND flash block erase to complete"); return ERROR_NAND_OPERATION_TIMEOUT; } if ((retval = nand_read_status(device, &status)) != ERROR_OK) { - ERROR("couldn't read status"); + LOG_ERROR("couldn't read status"); return ERROR_NAND_OPERATION_FAILED; } if (status & 0x1) { - ERROR("erase operation didn't pass, status: 0x%2.2x", status); + LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status); return ERROR_NAND_OPERATION_FAILED; } } @@ -680,7 +680,7 @@ int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 dat if (address % device->page_size) { - ERROR("reads need to be page aligned"); + LOG_ERROR("reads need to be page aligned"); return ERROR_NAND_OPERATION_FAILED; } @@ -717,7 +717,7 @@ int nand_write_plain(struct nand_device_s *device, u32 address, u8 *data, u32 da if (address % device->page_size) { - ERROR("writes need to be page aligned"); + LOG_ERROR("writes need to be page aligned"); return ERROR_NAND_OPERATION_FAILED; } @@ -976,13 +976,13 @@ int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 da if ((retval = nand_read_status(device, &status)) != ERROR_OK) { - ERROR("couldn't read status"); + LOG_ERROR("couldn't read status"); return ERROR_NAND_OPERATION_FAILED; } if (status & NAND_STATUS_FAIL) { - ERROR("write operation didn't pass, status: 0x%2.2x", status); + LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status); return ERROR_NAND_OPERATION_FAILED; } diff --git a/src/flash/non_cfi.c b/src/flash/non_cfi.c index dbb02b0c..74334126 100644 --- a/src/flash/non_cfi.c +++ b/src/flash/non_cfi.c @@ -250,7 +250,7 @@ void cfi_fixup_non_cfi(flash_bank_t *bank, void *param) cfi_info->pri_ext = pri_ext; } else if ((cfi_info->pri_id == 0x1) || (cfi_info->pri_id == 0x3)) { - ERROR("BUG: non-CFI flashes using the Intel commandset are not yet supported"); + LOG_ERROR("BUG: non-CFI flashes using the Intel commandset are not yet supported"); exit(-1); } } diff --git a/src/flash/s3c2410_nand.c b/src/flash/s3c2410_nand.c index 352d3849..65a66102 100644 --- a/src/flash/s3c2410_nand.c +++ b/src/flash/s3c2410_nand.c @@ -99,7 +99,7 @@ int s3c2410_write_data(struct nand_device_s *device, u16 data) target_t *target = s3c24xx_info->target; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } @@ -113,7 +113,7 @@ int s3c2410_read_data(struct nand_device_s *device, void *data) target_t *target = s3c24xx_info->target; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } @@ -128,7 +128,7 @@ int s3c2410_nand_ready(struct nand_device_s *device, int timeout) u8 status; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } diff --git a/src/flash/s3c2440_nand.c b/src/flash/s3c2440_nand.c index dc64ad6d..41081bff 100644 --- a/src/flash/s3c2440_nand.c +++ b/src/flash/s3c2440_nand.c @@ -104,7 +104,7 @@ int s3c2440_nand_ready(struct nand_device_s *device, int timeout) u8 status; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } @@ -130,10 +130,10 @@ int s3c2440_read_block_data(struct nand_device_s *device, u8 *data, int data_siz u32 nfdata = s3c24xx_info->data; u32 tmp; - INFO("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size); + LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size); if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } @@ -167,7 +167,7 @@ int s3c2440_write_block_data(struct nand_device_s *device, u8 *data, int data_si u32 tmp; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } diff --git a/src/flash/s3c24xx_nand.c b/src/flash/s3c24xx_nand.c index 21633c94..380f320f 100644 --- a/src/flash/s3c24xx_nand.c +++ b/src/flash/s3c24xx_nand.c @@ -47,7 +47,7 @@ s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, s3c24xx_info = malloc(sizeof(s3c24xx_nand_controller_t)); if (s3c24xx_info == NULL) { - ERROR("no memory for nand controller\n"); + LOG_ERROR("no memory for nand controller\n"); return NULL; } @@ -55,7 +55,7 @@ s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, s3c24xx_info->target = get_target_by_num(strtoul(args[1], NULL, 0)); if (s3c24xx_info->target == NULL) { - ERROR("no target '%s' configured", args[1]); + LOG_ERROR("no target '%s' configured", args[1]); return NULL; } @@ -73,7 +73,7 @@ int s3c24xx_reset(struct nand_device_s *device) target_t *target = s3c24xx_info->target; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } @@ -88,7 +88,7 @@ int s3c24xx_command(struct nand_device_s *device, u8 command) target_t *target = s3c24xx_info->target; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } @@ -103,7 +103,7 @@ int s3c24xx_address(struct nand_device_s *device, u8 address) target_t *target = s3c24xx_info->target; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } @@ -117,7 +117,7 @@ int s3c24xx_write_data(struct nand_device_s *device, u16 data) target_t *target = s3c24xx_info->target; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } @@ -131,7 +131,7 @@ int s3c24xx_read_data(struct nand_device_s *device, void *data) target_t *target = s3c24xx_info->target; if (target->state != TARGET_HALTED) { - ERROR("target must be halted to use S3C24XX NAND flash controller"); + LOG_ERROR("target must be halted to use S3C24XX NAND flash controller"); return ERROR_NAND_OPERATION_FAILED; } diff --git a/src/flash/stellaris.c b/src/flash/stellaris.c index 1d93b178..727a5d30 100644 --- a/src/flash/stellaris.c +++ b/src/flash/stellaris.c @@ -219,7 +219,7 @@ int stellaris_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, c if (argc < 6) { - WARNING("incomplete flash_bank stellaris configuration"); + LOG_WARNING("incomplete flash_bank stellaris configuration"); return ERROR_FLASH_BANK_INVALID; } @@ -316,9 +316,9 @@ void stellaris_read_clock_info(flash_bank_t *bank) unsigned long mainfreq; target_read_u32(target, SCB_BASE|RCC, &rcc); - DEBUG("Stellaris RCC %x",rcc); + LOG_DEBUG("Stellaris RCC %x",rcc); target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg); - DEBUG("Stellaris PLLCFG %x",pllcfg); + LOG_DEBUG("Stellaris PLLCFG %x",pllcfg); stellaris_info->rcc = rcc; sysdiv = (rcc>>23)&0xF; @@ -338,7 +338,7 @@ void stellaris_read_clock_info(flash_bank_t *bank) mainfreq = 5625000; /* Internal osc. / 4 */ break; case 3: - WARNING("Invalid oscsrc (3) in rcc register"); + LOG_WARNING("Invalid oscsrc (3) in rcc register"); mainfreq = 6000000; break; @@ -366,7 +366,7 @@ void stellaris_set_flash_mode(flash_bank_t *bank,int mode) target_t *target = bank->target; u32 usecrl = (stellaris_info->mck_freq/1000000ul-1); - DEBUG("usecrl = %i",usecrl); + LOG_DEBUG("usecrl = %i",usecrl); target_write_u32(target, SCB_BASE|USECRL , usecrl); } @@ -378,7 +378,7 @@ u32 stellaris_wait_status_busy(flash_bank_t *bank, u32 waitbits, int timeout) /* Stellaris waits for cmdbit to clear */ while (((status = stellaris_get_flash_status(bank)) & waitbits) && (timeout-- > 0)) { - DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%x", status); usleep(1000); } @@ -396,7 +396,7 @@ int stellaris_flash_command(struct flash_bank_s *bank,u8 cmd,u16 pagen) fmc = FMC_WRKEY | cmd; target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc); - DEBUG("Flash command: 0x%x", fmc); + LOG_DEBUG("Flash command: 0x%x", fmc); if (stellaris_wait_status_busy(bank, cmd, 100)) { @@ -419,18 +419,18 @@ int stellaris_read_part_info(struct flash_bank_s *bank) target_read_u32(target, SCB_BASE|DID1, &did1); target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0); target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1); - DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0, did1, stellaris_info->dc0,stellaris_info->dc1); + LOG_DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0, did1, stellaris_info->dc0,stellaris_info->dc1); ver = did0 >> 28; if((ver != 0) && (ver != 1)) { - WARNING("Unknown did0 version, cannot identify target"); + LOG_WARNING("Unknown did0 version, cannot identify target"); return ERROR_FLASH_OPERATION_FAILED; } if (did1 == 0) { - WARNING("Cannot identify target as a Stellaris"); + LOG_WARNING("Cannot identify target as a Stellaris"); return ERROR_FLASH_OPERATION_FAILED; } @@ -438,7 +438,7 @@ int stellaris_read_part_info(struct flash_bank_s *bank) fam = (did1 >> 24) & 0xF; if(((ver != 0) && (ver != 1)) || (fam != 0)) { - WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris"); + LOG_WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris"); } for (i=0;StellarisParts[i].partno;i++) @@ -502,7 +502,7 @@ int stellaris_protect_check(struct flash_bank_s *bank) if (stellaris_info->did1 == 0) { - WARNING("Cannot identify target as an AT91SAM"); + LOG_WARNING("Cannot identify target as an AT91SAM"); return ERROR_FLASH_OPERATION_FAILED; } @@ -531,7 +531,7 @@ int stellaris_erase(struct flash_bank_s *bank, int first, int last) if (stellaris_info->did1 == 0) { - WARNING("Cannot identify target as Stellaris"); + LOG_WARNING("Cannot identify target as Stellaris"); return ERROR_FLASH_OPERATION_FAILED; } @@ -592,7 +592,7 @@ int stellaris_erase(struct flash_bank_s *bank, int first, int last) target_read_u32(target, FLASH_CRIS, &flash_cris); if(flash_cris & (AMASK)) { - WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris); + LOG_WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr, flash_cris); target_write_u32(target, FLASH_CRIS, 0); return ERROR_FLASH_OPERATION_FAILED; } @@ -626,7 +626,7 @@ int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last) if (stellaris_info->did1 == 0) { - WARNING("Cannot identify target as an Stellaris MCU"); + LOG_WARNING("Cannot identify target as an Stellaris MCU"); return ERROR_FLASH_OPERATION_FAILED; } @@ -647,13 +647,13 @@ int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last) target_write_u32(target, FLASH_CIM, 0); target_write_u32(target, FLASH_MISC, PMISC|AMISC); - DEBUG("fmppe 0x%x",fmppe); + LOG_DEBUG("fmppe 0x%x",fmppe); target_write_u32(target, SCB_BASE|FMPPE, fmppe); /* Commit FMPPE */ target_write_u32(target, FLASH_FMA, 1); /* Write commit command */ /* TODO safety check, sice this cannot be undone */ - WARNING("Flash protection cannot be removed once commited, commit is NOT executed !"); + LOG_WARNING("Flash protection cannot be removed once commited, commit is NOT executed !"); /* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */ /* Wait until erase complete */ do @@ -666,7 +666,7 @@ int stellaris_protect(struct flash_bank_s *bank, int set, int first, int last) target_read_u32(target, FLASH_CRIS, &flash_cris); if(flash_cris & (AMASK)) { - WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris); + LOG_WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris); target_write_u32(target, FLASH_CRIS, 0); return ERROR_FLASH_OPERATION_FAILED; } @@ -726,13 +726,13 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 armv7m_algorithm_t armv7m_info; int retval; - DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)", + LOG_DEBUG("(bank=%p buffer=%p offset=%08X wcount=%08X)", bank, buffer, offset, wcount); /* flash write code */ if (target_alloc_working_area(target, sizeof(stellaris_write_code), &write_algorithm) != ERROR_OK) { - WARNING("no working area available, can't do block memory writes"); + LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; @@ -741,7 +741,7 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 /* memory buffer */ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) { - DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)", + LOG_DEBUG("called target_alloc_working_area(target=%p buffer_size=%08X source=%p)", target, buffer_size, source); buffer_size /= 2; if (buffer_size <= 256) @@ -750,7 +750,7 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 if (write_algorithm) target_free_working_area(target, write_algorithm); - WARNING("no large enough working area available, can't do block memory writes"); + LOG_WARNING("no large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } }; @@ -777,11 +777,11 @@ int stellaris_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); buf_set_u32(reg_params[2].value, 0, 32, 4*thisrun_count); - WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount); - DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount); + LOG_WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount); + LOG_DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count,address, wcount); if ((retval = target->type->run_algorithm(target, 0, NULL, 3, reg_params, write_algorithm->address, write_algorithm->address + sizeof(stellaris_write_code)-10, 10000, &armv7m_info)) != ERROR_OK) { - ERROR("error executing stellaris flash write algorithm"); + LOG_ERROR("error executing stellaris flash write algorithm"); target_free_working_area(target, source); destroy_reg_param(®_params[0]); destroy_reg_param(®_params[1]); @@ -823,7 +823,7 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count return ERROR_TARGET_NOT_HALTED; } - DEBUG("(bank=%p buffer=%p offset=%08X count=%08X)", + LOG_DEBUG("(bank=%p buffer=%p offset=%08X count=%08X)", bank, buffer, offset, count); if (stellaris_info->did1 == 0) @@ -833,13 +833,13 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count if (stellaris_info->did1 == 0) { - WARNING("Cannot identify target as a Stellaris processor"); + LOG_WARNING("Cannot identify target as a Stellaris processor"); return ERROR_FLASH_OPERATION_FAILED; } if((offset & 3) || (count & 3)) { - WARNING("offset size must be word aligned"); + LOG_WARNING("offset size must be word aligned"); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -865,14 +865,14 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count { /* if block write failed (no sufficient working area), * we use normal (slow) single dword accesses */ - WARNING("couldn't use block writes, falling back to single memory accesses"); + LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); } else if (retval == ERROR_FLASH_OPERATION_FAILED) { /* if an error occured, we examine the reason, and quit */ target_read_u32(target, FLASH_CRIS, &flash_cris); - ERROR("flash writing failed with CRIS: 0x%x", flash_cris); + LOG_ERROR("flash writing failed with CRIS: 0x%x", flash_cris); return ERROR_FLASH_OPERATION_FAILED; } } @@ -888,12 +888,12 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count while(count>0) { - if (!(address&0xff)) DEBUG("0x%x",address); + if (!(address&0xff)) LOG_DEBUG("0x%x",address); /* Program one word */ target_write_u32(target, FLASH_FMA, address); target_write_buffer(target, FLASH_FMD, 4, buffer); target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE); - /* DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */ + /* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */ /* Wait until write complete */ do { @@ -908,7 +908,7 @@ int stellaris_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count target_read_u32(target, FLASH_CRIS, &flash_cris); if(flash_cris & (AMASK)) { - DEBUG("flash_cris 0x%x", flash_cris); + LOG_DEBUG("flash_cris 0x%x", flash_cris); return ERROR_FLASH_OPERATION_FAILED; } return ERROR_OK; diff --git a/src/flash/stm32x.c b/src/flash/stm32x.c index ebb55f83..7e26ece3 100644 --- a/src/flash/stm32x.c +++ b/src/flash/stm32x.c @@ -92,7 +92,7 @@ int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char if (argc < 6) { - WARNING("incomplete flash_bank stm32x configuration"); + LOG_WARNING("incomplete flash_bank stm32x configuration"); return ERROR_FLASH_BANK_INVALID; } @@ -122,7 +122,7 @@ u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout) /* wait for busy to clear */ while (((status = stm32x_get_flash_status(bank)) & FLASH_BSY) && (timeout-- > 0)) { - DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%x", status); usleep(1000); } @@ -144,7 +144,7 @@ int stm32x_read_options(struct flash_bank_s *bank) stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5; if (optiondata & (1 << OPT_READOUT)) - INFO("Device Security Bit Set"); + LOG_INFO("Device Security Bit Set"); /* each bit refers to a 4bank protection */ target_read_u32(target, STM32_FLASH_WRPR, &optiondata); @@ -403,7 +403,7 @@ int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last) if ((first && (first % 4)) || ((last + 1) && (last + 1) % 4)) { - WARNING("sector start/end incorrect - stm32 has 4K sector protection"); + LOG_WARNING("sector start/end incorrect - stm32 has 4K sector protection"); return ERROR_FLASH_SECTOR_INVALID; } @@ -473,7 +473,7 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co /* flash write code */ if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), &stm32x_info->write_algorithm) != ERROR_OK) { - WARNING("no working area available, can't do block memory writes"); + LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; @@ -489,7 +489,7 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co if (stm32x_info->write_algorithm) target_free_working_area(target, stm32x_info->write_algorithm); - WARNING("no large enough working area available, can't do block memory writes"); + LOG_WARNING("no large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } }; @@ -516,7 +516,7 @@ int stm32x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 co if ((retval = target->type->run_algorithm(target, 0, NULL, 4, reg_params, stm32x_info->write_algorithm->address, \ stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK) { - ERROR("error executing stm32x flash write algorithm"); + LOG_ERROR("error executing stm32x flash write algorithm"); break; } @@ -559,7 +559,7 @@ int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) if (offset & 0x1) { - WARNING("offset 0x%x breaks required 2-byte alignment", offset); + LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -577,11 +577,11 @@ int stm32x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { /* if block write failed (no sufficient working area), * we use normal (slow) single dword accesses */ - WARNING("couldn't use block writes, falling back to single memory accesses"); + LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); } else if (retval == ERROR_FLASH_OPERATION_FAILED) { - ERROR("flash writing failed with error code: 0x%x", retval); + LOG_ERROR("flash writing failed with error code: 0x%x", retval); return ERROR_FLASH_OPERATION_FAILED; } } @@ -655,11 +655,11 @@ int stm32x_probe(struct flash_bank_s *bank) /* read stm32 device id register */ target_read_u32(target, 0xE0042000, &device_id); - INFO( "device id = 0x%08x", device_id ); + LOG_INFO( "device id = 0x%08x", device_id ); if (!(device_id & 0x410)) { - WARNING( "Cannot identify target as a STM32 family." ); + LOG_WARNING( "Cannot identify target as a STM32 family." ); return ERROR_FLASH_OPERATION_FAILED; } @@ -670,11 +670,11 @@ int stm32x_probe(struct flash_bank_s *bank) if ((device_id >> 16) == 0 ) { /* number of sectors incorrect on revA */ - WARNING( "STM32 Rev A Silicon detected, probe inaccurate - assuming 128k flash" ); + LOG_WARNING( "STM32 Rev A Silicon detected, probe inaccurate - assuming 128k flash" ); num_sectors = 128; } - INFO( "flash size = %dkbytes", num_sectors ); + LOG_INFO( "flash size = %dkbytes", num_sectors ); bank->base = 0x08000000; bank->size = num_sectors * 1024; diff --git a/src/flash/str7x.c b/src/flash/str7x.c index 30b8c07f..c7a486e2 100644 --- a/src/flash/str7x.c +++ b/src/flash/str7x.c @@ -113,7 +113,7 @@ int str7x_build_block_list(struct flash_bank_s *bank) b0_sectors = 8; break; default: - ERROR("BUG: unknown bank->size encountered"); + LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); } @@ -165,7 +165,7 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char if (argc < 7) { - WARNING("incomplete flash_bank str7x configuration"); + LOG_WARNING("incomplete flash_bank str7x configuration"); return ERROR_FLASH_BANK_INVALID; } @@ -181,7 +181,7 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char { if (bank->base != 0x40000000) { - WARNING("overriding flash base address for STR71x device with 0x40000000"); + LOG_WARNING("overriding flash base address for STR71x device with 0x40000000"); bank->base = 0x40000000; } } @@ -192,7 +192,7 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char if (bank->base != 0x80000000) { - WARNING("overriding flash base address for STR73x device with 0x80000000"); + LOG_WARNING("overriding flash base address for STR73x device with 0x80000000"); bank->base = 0x80000000; } } @@ -202,13 +202,13 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char if (bank->base != 0x20000000) { - WARNING("overriding flash base address for STR75x device with 0x20000000"); + LOG_WARNING("overriding flash base address for STR75x device with 0x20000000"); bank->base = 0x20000000; } } else { - ERROR("unknown STR7x variant: '%s'", args[6]); + LOG_ERROR("unknown STR7x variant: '%s'", args[6]); free(str7x_info); return ERROR_FLASH_BANK_INVALID; } @@ -326,12 +326,12 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last) else if (str7x_info->sector_bank[i] == 1) b1_sectors |= str7x_info->sector_bits[i]; else - ERROR("BUG: str7x_info->sector_bank[i] neither 0 nor 1 (%i)", str7x_info->sector_bank[i]); + LOG_ERROR("BUG: str7x_info->sector_bank[i] neither 0 nor 1 (%i)", str7x_info->sector_bank[i]); } if (b0_sectors) { - DEBUG("b0_sectors: 0x%x", b0_sectors); + LOG_DEBUG("b0_sectors: 0x%x", b0_sectors); /* clear FLASH_ER register */ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); @@ -353,14 +353,14 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last) if (retval) { - ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); + LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); return ERROR_FLASH_OPERATION_FAILED; } } if (b1_sectors) { - DEBUG("b1_sectors: 0x%x", b1_sectors); + LOG_DEBUG("b1_sectors: 0x%x", b1_sectors); /* clear FLASH_ER register */ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0); @@ -382,7 +382,7 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last) if (retval) { - ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); + LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval); return ERROR_FLASH_OPERATION_FAILED; } } @@ -436,7 +436,7 @@ int str7x_protect(struct flash_bank_s *bank, int set, int first, int last) retval = str7x_result(bank); - DEBUG("retval: 0x%8.8x", retval); + LOG_DEBUG("retval: 0x%8.8x", retval); if (retval & FLASH_ERER) return ERROR_FLASH_SECTOR_NOT_ERASED; @@ -486,7 +486,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou /* flash write code */ if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK) { - WARNING("no working area available, can't do block memory writes"); + LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; @@ -502,7 +502,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou if (str7x_info->write_algorithm) target_free_working_area(target, str7x_info->write_algorithm); - WARNING("no large enough working area available, can't do block memory writes"); + LOG_WARNING("no large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } } @@ -532,7 +532,7 @@ int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou if ((retval = target->type->run_algorithm(target, 0, NULL, 6, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK) { - ERROR("error executing str7x flash write algorithm"); + LOG_ERROR("error executing str7x flash write algorithm"); break; } @@ -580,7 +580,7 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) if (offset & 0x7) { - WARNING("offset 0x%x breaks required 8-byte alignment", offset); + LOG_WARNING("offset 0x%x breaks required 8-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -616,14 +616,14 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { /* if block write failed (no sufficient working area), * we use normal (slow) single dword accesses */ - WARNING("couldn't use block writes, falling back to single memory accesses"); + LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); } else if (retval == ERROR_FLASH_OPERATION_FAILED) { /* if an error occured, we examine the reason, and quit */ retval = str7x_result(bank); - ERROR("flash writing failed with error code: 0x%x", retval); + LOG_ERROR("flash writing failed with error code: 0x%x", retval); return ERROR_FLASH_OPERATION_FAILED; } } diff --git a/src/flash/str9x.c b/src/flash/str9x.c index 00095a01..bd823820 100644 --- a/src/flash/str9x.c +++ b/src/flash/str9x.c @@ -115,7 +115,7 @@ int str9x_build_block_list(struct flash_bank_s *bank) bank1start = bank->base; break; default: - ERROR("BUG: unknown bank->size encountered"); + LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); } @@ -156,7 +156,7 @@ int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char if (argc < 6) { - WARNING("incomplete flash_bank str9x configuration"); + LOG_WARNING("incomplete flash_bank str9x configuration"); return ERROR_FLASH_BANK_INVALID; } @@ -279,7 +279,7 @@ int str9x_erase(struct flash_bank_s *bank, int first, int last) if( status & 0x22 ) { - ERROR("error erasing flash bank, status: 0x%x", status); + LOG_ERROR("error erasing flash bank, status: 0x%x", status); return ERROR_FLASH_OPERATION_FAILED; } } @@ -360,7 +360,7 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou /* flash write code */ if (target_alloc_working_area(target, 4 * 19, &str9x_info->write_algorithm) != ERROR_OK) { - WARNING("no working area available, can't do block memory writes"); + LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; @@ -376,7 +376,7 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou if (str9x_info->write_algorithm) target_free_working_area(target, str9x_info->write_algorithm); - WARNING("no large enough working area available, can't do block memory writes"); + LOG_WARNING("no large enough working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } } @@ -404,7 +404,7 @@ int str9x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 cou { target_free_working_area(target, source); target_free_working_area(target, str9x_info->write_algorithm); - ERROR("error executing str9x flash write algorithm"); + LOG_ERROR("error executing str9x flash write algorithm"); return ERROR_FLASH_OPERATION_FAILED; } @@ -449,7 +449,7 @@ int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) if (offset & 0x1) { - WARNING("offset 0x%x breaks required 2-byte alignment", offset); + LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -482,11 +482,11 @@ int str9x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { /* if block write failed (no sufficient working area), * we use normal (slow) single dword accesses */ - WARNING("couldn't use block writes, falling back to single memory accesses"); + LOG_WARNING("couldn't use block writes, falling back to single memory accesses"); } else if (retval == ERROR_FLASH_OPERATION_FAILED) { - ERROR("flash writing failed with error code: 0x%x", retval); + LOG_ERROR("flash writing failed with error code: 0x%x", retval); return ERROR_FLASH_OPERATION_FAILED; } } diff --git a/src/flash/str9xpec.c b/src/flash/str9xpec.c index 4a24d85d..b1bb3e93 100644 --- a/src/flash/str9xpec.c +++ b/src/flash/str9xpec.c @@ -129,7 +129,7 @@ int str9xpec_set_instr(int chain_pos, u32 new_instr, enum tap_state end_state) if (device == NULL) { - DEBUG("Invalid Target"); + LOG_DEBUG("Invalid Target"); return ERROR_TARGET_INVALID; } @@ -177,10 +177,10 @@ u8 str9xpec_isc_status(int chain_pos) jtag_add_dr_scan(1, &field, TAP_RTI); jtag_execute_queue(); - DEBUG("status: 0x%2.2x", status); + LOG_DEBUG("status: 0x%2.2x", status); if (status & ISC_STATUS_SECURITY) - INFO("Device Security Bit Set"); + LOG_INFO("Device Security Bit Set"); return status; } @@ -206,7 +206,7 @@ int str9xpec_isc_enable(struct flash_bank_s *bank) { /* we have entered isc mode */ str9xpec_info->isc_enable = 1; - DEBUG("ISC_MODE Enabled"); + LOG_DEBUG("ISC_MODE Enabled"); } return ERROR_OK; @@ -235,7 +235,7 @@ int str9xpec_isc_disable(struct flash_bank_s *bank) { /* we have left isc mode */ str9xpec_info->isc_enable = 0; - DEBUG("ISC_MODE Disabled"); + LOG_DEBUG("ISC_MODE Disabled"); } return ERROR_OK; @@ -251,7 +251,7 @@ int str9xpec_read_config(struct flash_bank_s *bank) chain_pos = str9xpec_info->chain_pos; - DEBUG("ISC_CONFIGURATION"); + LOG_DEBUG("ISC_CONFIGURATION"); /* execute ISC_CONFIGURATION command */ str9xpec_set_instr(chain_pos, ISC_CONFIGURATION, TAP_PI); @@ -290,7 +290,7 @@ int str9xpec_build_block_list(struct flash_bank_s *bank) b0_sectors = 8; break; default: - ERROR("BUG: unknown bank->size encountered"); + LOG_ERROR("BUG: unknown bank->size encountered"); exit(-1); } @@ -336,7 +336,7 @@ int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch if (argc < 6) { - WARNING("incomplete flash_bank str9x configuration"); + LOG_WARNING("incomplete flash_bank str9x configuration"); return ERROR_FLASH_BANK_INVALID; } @@ -345,7 +345,7 @@ int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch if (bank->base != 0x00000000) { - WARNING("overriding flash base address for STR91x device with 0x00000000"); + LOG_WARNING("overriding flash base address for STR91x device with 0x00000000"); bank->base = 0x00000000; } @@ -390,7 +390,7 @@ int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last) buffer = calloc(CEIL(64, 8), 1); - DEBUG("blank check: first_bank: %i, last_bank: %i", first, last); + LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first, last); for (i = first; i <= last; i++) { buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1); @@ -489,7 +489,7 @@ int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last) buffer = calloc(CEIL(64, 8), 1); - DEBUG("erase: first_bank: %i, last_bank: %i", first, last); + LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first, last); /* last bank: 0xFF signals a full erase (unlock complete device) */ /* last bank: 0xFE signals a option byte erase */ @@ -510,7 +510,7 @@ int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last) } } - DEBUG("ISC_ERASE"); + LOG_DEBUG("ISC_ERASE"); /* execute ISC_ERASE command */ str9xpec_set_instr(chain_pos, ISC_ERASE, TAP_PI); @@ -622,7 +622,7 @@ int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last) if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS) return ERROR_FLASH_OPERATION_FAILED; - DEBUG("protect: first_bank: %i, last_bank: %i", first, last); + LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first, last); /* last bank: 0xFF signals a full device protect */ if (last == 0xFF) @@ -709,7 +709,7 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) if (offset & 0x7) { - WARNING("offset 0x%x breaks required 8-byte alignment", offset); + LOG_WARNING("offset 0x%x breaks required 8-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -740,11 +740,11 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) if (check_address != offset + count) return ERROR_FLASH_DST_OUT_OF_BANK; - DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector); + LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector); scanbuf = calloc(CEIL(64, 8), 1); - DEBUG("ISC_PROGRAM"); + LOG_DEBUG("ISC_PROGRAM"); for (i = first_sector; i <= last_sector; i++) { diff --git a/src/flash/tms470.c b/src/flash/tms470.c index 00896113..f74f3ffc 100644 --- a/src/flash/tms470.c +++ b/src/flash/tms470.c @@ -116,11 +116,11 @@ int tms470_read_part_info(struct flash_bank_s *bank) /* read and parse the device identification register */ target_read_u32(target, 0xFFFFFFF0, &device_ident_reg); - INFO("device_ident_reg=0x%08x", device_ident_reg); + LOG_INFO("device_ident_reg=0x%08x", device_ident_reg); if ((device_ident_reg & 7) == 0) { - WARNING("Cannot identify target as a TMS470 family."); + LOG_WARNING("Cannot identify target as a TMS470 family."); return ERROR_FLASH_OPERATION_FAILED; } @@ -142,7 +142,7 @@ int tms470_read_part_info(struct flash_bank_s *bank) if (bank->base >= 0x00040000) { - ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base); + LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base); return ERROR_FLASH_OPERATION_FAILED; } tms470_info->ordinal = 0; @@ -188,13 +188,13 @@ int tms470_read_part_info(struct flash_bank_s *bank) } else { - ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base); + LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base); return ERROR_FLASH_OPERATION_FAILED; } break; default: - WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", part_number); + LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", part_number); return ERROR_FLASH_OPERATION_FAILED; } @@ -205,7 +205,7 @@ int tms470_read_part_info(struct flash_bank_s *bank) bank->chip_width = 32; bank->bus_width = 32; - INFO("Identified %s, ver=%d, core=%s, nvmem=%s.", part_name, silicon_version, (technology_family ? "1.8v" : "3.3v"), (rom_flash ? "rom" : "flash")); + LOG_INFO("Identified %s, ver=%d, core=%s, nvmem=%s.", part_name, silicon_version, (technology_family ? "1.8v" : "3.3v"), (rom_flash ? "rom" : "flash")); tms470_info->device_ident_reg = device_ident_reg; tms470_info->silicon_version = silicon_version; @@ -245,7 +245,7 @@ int tms470_handle_flash_keyset_command(struct command_context_s *cmd_ctx, char * if (1 != sscanf(&args[i][start], "%x", &flashKeys[i])) { command_print(cmd_ctx, "could not process flash key %s", args[i]); - ERROR("could not process flash key %s", args[i]); + LOG_ERROR("could not process flash key %s", args[i]); return ERROR_INVALID_ARGUMENTS; } } @@ -304,7 +304,7 @@ int tms470_handle_osc_megahertz_command(struct command_context_s *cmd_ctx, char if (oscMHz <= 0) { - ERROR("osc_megahertz must be positive and non-zero!"); + LOG_ERROR("osc_megahertz must be positive and non-zero!"); command_print(cmd_ctx, "osc_megahertz must be positive and non-zero!"); oscMHz = 12; return ERROR_INVALID_ARGUMENTS; @@ -344,7 +344,7 @@ int tms470_check_flash_unlocked(target_t * target) u32 fmbbusy; target_read_u32(target, 0xFFE89C08, &fmbbusy); - INFO("tms470 fmbbusy=0x%08x -> %s", fmbbusy, fmbbusy & 0x8000 ? "unlocked" : "LOCKED"); + LOG_INFO("tms470 fmbbusy=0x%08x -> %s", fmbbusy, fmbbusy & 0x8000 ? "unlocked" : "LOCKED"); return fmbbusy & 0x8000 ? ERROR_OK : ERROR_FLASH_OPERATION_FAILED; } @@ -394,7 +394,7 @@ int tms470_try_flash_keys(target_t * target, const u32 * key_set) */ target_read_u32(target, 0x00001FF0 + 4 * i, &tmp); - INFO("tms470 writing fmpkey=0x%08x", key_set[i]); + LOG_INFO("tms470 writing fmpkey=0x%08x", key_set[i]); target_write_u32(target, 0xFFE89C0C, key_set[i]); } @@ -456,12 +456,12 @@ int tms470_unlock_flash(struct flash_bank_s *bank) { if (tms470_try_flash_keys(target, p_key_sets[i]) == ERROR_OK) { - INFO("tms470 flash is unlocked"); + LOG_INFO("tms470 flash is unlocked"); return ERROR_OK; } } - WARNING("tms470 could not unlock flash memory protection level 2"); + LOG_WARNING("tms470 could not unlock flash memory protection level 2"); return ERROR_FLASH_OPERATION_FAILED; } @@ -482,7 +482,7 @@ int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank) fmmac2 &= ~0x0007; fmmac2 |= (tms470_info->ordinal & 7); target_write_u32(target, 0xFFE8BC04, fmmac2); - DEBUG("set fmmac2=0x%04x", fmmac2); + LOG_DEBUG("set fmmac2=0x%04x", fmmac2); /* * Disable level 1 sector protection by setting bit 15 of FMMAC1. @@ -490,25 +490,25 @@ int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank) target_read_u32(target, 0xFFE8BC00, &fmmac1); fmmac1 |= 0x8000; target_write_u32(target, 0xFFE8BC00, fmmac1); - DEBUG("set fmmac1=0x%04x", fmmac1); + LOG_DEBUG("set fmmac1=0x%04x", fmmac1); /* * FMTCREG=0x2fc0; */ target_write_u32(target, 0xFFE8BC10, 0x2fc0); - DEBUG("set fmtcreg=0x2fc0"); + LOG_DEBUG("set fmtcreg=0x2fc0"); /* * MAXPP=50 */ target_write_u32(target, 0xFFE8A07C, 50); - DEBUG("set fmmaxpp=50"); + LOG_DEBUG("set fmmaxpp=50"); /* * MAXCP=0xf000+2000 */ target_write_u32(target, 0xFFE8A084, 0xf000 + 2000); - DEBUG("set fmmaxcp=0x%04x", 0xf000 + 2000); + LOG_DEBUG("set fmmaxcp=0x%04x", 0xf000 + 2000); /* * configure VHV @@ -518,22 +518,22 @@ int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank) { fmmaxep = 0xf000 + 4095; target_write_u32(target, 0xFFE8A80C, 0x9964); - DEBUG("set fmptr3=0x9964"); + LOG_DEBUG("set fmptr3=0x9964"); } else { fmmaxep = 0xa000 + 4095; target_write_u32(target, 0xFFE8A80C, 0x9b64); - DEBUG("set fmptr3=0x9b64"); + LOG_DEBUG("set fmptr3=0x9b64"); } target_write_u32(target, 0xFFE8A080, fmmaxep); - DEBUG("set fmmaxep=0x%04x", fmmaxep); + LOG_DEBUG("set fmmaxep=0x%04x", fmmaxep); /* * FMPTR4=0xa000 */ target_write_u32(target, 0xFFE8A810, 0xa000); - DEBUG("set fmptr4=0xa000"); + LOG_DEBUG("set fmptr4=0xa000"); /* * FMPESETUP, delay parameter selected based on clock frequency. @@ -547,56 +547,56 @@ int tms470_flash_initialize_internal_state_machine(struct flash_bank_s *bank) sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * oscMHz / (1 + (glbctrl & 7)); delay = (sysclk > 10) ? (sysclk + 1) / 2 : 5; target_write_u32(target, 0xFFE8A018, (delay << 4) | (delay << 8)); - DEBUG("set fmpsetup=0x%04x", (delay << 4) | (delay << 8)); + LOG_DEBUG("set fmpsetup=0x%04x", (delay << 4) | (delay << 8)); /* * FMPVEVACCESS, based on delay. */ k = delay | (delay << 8); target_write_u32(target, 0xFFE8A05C, k); - DEBUG("set fmpvevaccess=0x%04x", k); + LOG_DEBUG("set fmpvevaccess=0x%04x", k); /* * FMPCHOLD, FMPVEVHOLD, FMPVEVSETUP, based on delay. */ k <<= 1; target_write_u32(target, 0xFFE8A034, k); - DEBUG("set fmpchold=0x%04x", k); + LOG_DEBUG("set fmpchold=0x%04x", k); target_write_u32(target, 0xFFE8A040, k); - DEBUG("set fmpvevhold=0x%04x", k); + LOG_DEBUG("set fmpvevhold=0x%04x", k); target_write_u32(target, 0xFFE8A024, k); - DEBUG("set fmpvevsetup=0x%04x", k); + LOG_DEBUG("set fmpvevsetup=0x%04x", k); /* * FMCVACCESS, based on delay. */ k = delay * 16; target_write_u32(target, 0xFFE8A060, k); - DEBUG("set fmcvaccess=0x%04x", k); + LOG_DEBUG("set fmcvaccess=0x%04x", k); /* * FMCSETUP, based on delay. */ k = 0x3000 | delay * 20; target_write_u32(target, 0xFFE8A020, k); - DEBUG("set fmcsetup=0x%04x", k); + LOG_DEBUG("set fmcsetup=0x%04x", k); /* * FMEHOLD, based on delay. */ k = (delay * 20) << 2; target_write_u32(target, 0xFFE8A038, k); - DEBUG("set fmehold=0x%04x", k); + LOG_DEBUG("set fmehold=0x%04x", k); /* * PWIDTH, CWIDTH, EWIDTH, based on delay. */ target_write_u32(target, 0xFFE8A050, delay * 8); - DEBUG("set fmpwidth=0x%04x", delay * 8); + LOG_DEBUG("set fmpwidth=0x%04x", delay * 8); target_write_u32(target, 0xFFE8A058, delay * 1000); - DEBUG("set fmcwidth=0x%04x", delay * 1000); + LOG_DEBUG("set fmcwidth=0x%04x", delay * 1000); target_write_u32(target, 0xFFE8A054, delay * 5400); - DEBUG("set fmewidth=0x%04x", delay * 5400); + LOG_DEBUG("set fmewidth=0x%04x", delay * 5400); return result; } @@ -610,47 +610,47 @@ int tms470_flash_status(struct flash_bank_s *bank) u32 fmmstat; target_read_u32(target, 0xFFE8BC0C, &fmmstat); - DEBUG("set fmmstat=0x%04x", fmmstat); + LOG_DEBUG("set fmmstat=0x%04x", fmmstat); if (fmmstat & 0x0080) { - WARNING("tms470 flash command: erase still active after busy clear."); + LOG_WARNING("tms470 flash command: erase still active after busy clear."); result = ERROR_FLASH_OPERATION_FAILED; } if (fmmstat & 0x0040) { - WARNING("tms470 flash command: program still active after busy clear."); + LOG_WARNING("tms470 flash command: program still active after busy clear."); result = ERROR_FLASH_OPERATION_FAILED; } if (fmmstat & 0x0020) { - WARNING("tms470 flash command: invalid data command."); + LOG_WARNING("tms470 flash command: invalid data command."); result = ERROR_FLASH_OPERATION_FAILED; } if (fmmstat & 0x0010) { - WARNING("tms470 flash command: program, erase or validate sector failed."); + LOG_WARNING("tms470 flash command: program, erase or validate sector failed."); result = ERROR_FLASH_OPERATION_FAILED; } if (fmmstat & 0x0008) { - WARNING("tms470 flash command: voltage instability detected."); + LOG_WARNING("tms470 flash command: voltage instability detected."); result = ERROR_FLASH_OPERATION_FAILED; } if (fmmstat & 0x0006) { - WARNING("tms470 flash command: command suspend detected."); + LOG_WARNING("tms470 flash command: command suspend detected."); result = ERROR_FLASH_OPERATION_FAILED; } if (fmmstat & 0x0001) { - WARNING("tms470 flash command: sector was locked."); + LOG_WARNING("tms470 flash command: sector was locked."); result = ERROR_FLASH_OPERATION_FAILED; } @@ -672,12 +672,12 @@ int tms470_erase_sector(struct flash_bank_s *bank, int sector) */ target_read_u32(target, 0xFFFFFFDC, &glbctrl); target_write_u32(target, 0xFFFFFFDC, glbctrl | 0x10); - DEBUG("set glbctrl=0x%08x", glbctrl | 0x10); + LOG_DEBUG("set glbctrl=0x%08x", glbctrl | 0x10); /* Force normal read mode. */ target_read_u32(target, 0xFFE89C00, &orig_fmregopt); target_write_u32(target, 0xFFE89C00, 0); - DEBUG("set fmregopt=0x%08x", 0); + LOG_DEBUG("set fmregopt=0x%08x", 0); (void)tms470_flash_initialize_internal_state_machine(bank); @@ -689,13 +689,13 @@ int tms470_erase_sector(struct flash_bank_s *bank, int sector) { target_read_u32(target, 0xFFE88008, &fmbsea); target_write_u32(target, 0xFFE88008, fmbsea | (1 << sector)); - DEBUG("set fmbsea=0x%04x", fmbsea | (1 << sector)); + LOG_DEBUG("set fmbsea=0x%04x", fmbsea | (1 << sector)); } else { target_read_u32(target, 0xFFE8800C, &fmbseb); target_write_u32(target, 0xFFE8800C, fmbseb | (1 << (sector - 16))); - DEBUG("set fmbseb=0x%04x", fmbseb | (1 << (sector - 16))); + LOG_DEBUG("set fmbseb=0x%04x", fmbseb | (1 << (sector - 16))); } bank->sectors[sector].is_protected = 0; @@ -703,11 +703,11 @@ int tms470_erase_sector(struct flash_bank_s *bank, int sector) * clear status regiser, sent erase command, kickoff erase */ target_write_u16(target, flashAddr, 0x0040); - DEBUG("write *(u16 *)0x%08x=0x0040", flashAddr); + LOG_DEBUG("write *(u16 *)0x%08x=0x0040", flashAddr); target_write_u16(target, flashAddr, 0x0020); - DEBUG("write *(u16 *)0x%08x=0x0020", flashAddr); + LOG_DEBUG("write *(u16 *)0x%08x=0x0020", flashAddr); target_write_u16(target, flashAddr, 0xffff); - DEBUG("write *(u16 *)0x%08x=0xffff", flashAddr); + LOG_DEBUG("write *(u16 *)0x%08x=0xffff", flashAddr); /* * Monitor FMMSTAT, busy until clear, then check and other flags for @@ -728,19 +728,19 @@ int tms470_erase_sector(struct flash_bank_s *bank, int sector) if (sector < 16) { target_write_u32(target, 0xFFE88008, fmbsea); - DEBUG("set fmbsea=0x%04x", fmbsea); + LOG_DEBUG("set fmbsea=0x%04x", fmbsea); bank->sectors[sector].is_protected = fmbsea & (1 << sector) ? 0 : 1; } else { target_write_u32(target, 0xFFE8800C, fmbseb); - DEBUG("set fmbseb=0x%04x", fmbseb); + LOG_DEBUG("set fmbseb=0x%04x", fmbseb); bank->sectors[sector].is_protected = fmbseb & (1 << (sector - 16)) ? 0 : 1; } target_write_u32(target, 0xFFE89C00, orig_fmregopt); - DEBUG("set fmregopt=0x%08x", orig_fmregopt); + LOG_DEBUG("set fmregopt=0x%08x", orig_fmregopt); target_write_u32(target, 0xFFFFFFDC, glbctrl); - DEBUG("set glbctrl=0x%08x", glbctrl); + LOG_DEBUG("set glbctrl=0x%08x", glbctrl); if (result == ERROR_OK) { @@ -781,7 +781,7 @@ int tms470_erase(struct flash_bank_s *bank, int first, int last) if ((first < 0) || (first >= bank->num_sectors) || (last < 0) || (last >= bank->num_sectors) || (first > last)) { - ERROR("Sector range %d to %d invalid.", first, last); + LOG_ERROR("Sector range %d to %d invalid.", first, last); return ERROR_FLASH_SECTOR_INVALID; } @@ -793,18 +793,18 @@ int tms470_erase(struct flash_bank_s *bank, int first, int last) for (sector = first; sector <= last; sector++) { - INFO("Erasing tms470 bank %d sector %d...", tms470_info->ordinal, sector); + LOG_INFO("Erasing tms470 bank %d sector %d...", tms470_info->ordinal, sector); result = tms470_erase_sector(bank, sector); if (result != ERROR_OK) { - ERROR("tms470 could not erase flash sector."); + LOG_ERROR("tms470 could not erase flash sector."); break; } else { - INFO("sector erased successfully."); + LOG_INFO("sector erased successfully."); } } @@ -829,7 +829,7 @@ int tms470_protect(struct flash_bank_s *bank, int set, int first, int last) if ((first < 0) || (first >= bank->num_sectors) || (last < 0) || (last >= bank->num_sectors) || (first > last)) { - ERROR("Sector range %d to %d invalid.", first, last); + LOG_ERROR("Sector range %d to %d invalid.", first, last); return ERROR_FLASH_SECTOR_INVALID; } @@ -877,7 +877,7 @@ int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count) tms470_read_part_info(bank); - INFO("Writing %d bytes starting at 0x%08x", count, bank->base + offset); + LOG_INFO("Writing %d bytes starting at 0x%08x", count, bank->base + offset); /* set GLBCTRL.4 */ target_read_u32(target, 0xFFFFFFDC, &glbctrl); @@ -911,7 +911,7 @@ int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count) if (word != 0xffff) { - INFO("writing 0x%04x at 0x%08x", word, addr); + LOG_INFO("writing 0x%04x at 0x%08x", word, addr); /* clear status register */ target_write_u16(target, addr, 0x0040); @@ -936,15 +936,15 @@ int tms470_write(struct flash_bank_s *bank, u8 * buffer, u32 offset, u32 count) if (fmmstat & 0x3ff) { - ERROR("fmstat=0x%04x", fmmstat); - ERROR("Could not program word 0x%04x at address 0x%08x.", word, addr); + LOG_ERROR("fmstat=0x%04x", fmmstat); + LOG_ERROR("Could not program word 0x%04x at address 0x%08x.", word, addr); result = ERROR_FLASH_OPERATION_FAILED; break; } } else { - INFO("skipping 0xffff at 0x%08x", addr); + LOG_INFO("skipping 0xffff at 0x%08x", addr); } } @@ -964,7 +964,7 @@ int tms470_probe(struct flash_bank_s *bank) { if (bank->target->state != TARGET_HALTED) { - WARNING("Cannot communicate... target not halted."); + LOG_WARNING("Cannot communicate... target not halted."); return ERROR_TARGET_NOT_HALTED; } @@ -1033,7 +1033,7 @@ int tms470_erase_check(struct flash_bank_s *bank) { u32 i, addr = bank->base + bank->sectors[sector].offset; - INFO("checking flash bank %d sector %d", tms470_info->ordinal, sector); + LOG_INFO("checking flash bank %d sector %d", tms470_info->ordinal, sector); target_read_buffer(target, addr, bank->sectors[sector].size, buffer); @@ -1042,8 +1042,8 @@ int tms470_erase_check(struct flash_bank_s *bank) { if (buffer[i] != 0xff) { - WARNING("tms470 bank %d, sector %d, not erased.", tms470_info->ordinal, sector); - WARNING("at location 0x%08x: flash data is 0x%02x.", addr + i, buffer[i]); + LOG_WARNING("tms470 bank %d, sector %d, not erased.", tms470_info->ordinal, sector); + LOG_WARNING("at location 0x%08x: flash data is 0x%02x.", addr + i, buffer[i]); bank->sectors[sector].is_erased = 0; break; @@ -1057,7 +1057,7 @@ int tms470_erase_check(struct flash_bank_s *bank) } else { - INFO("sector erased"); + LOG_INFO("sector erased"); } } @@ -1111,7 +1111,7 @@ int tms470_protect_check(struct flash_bank_s *bank) bank->sectors[sector].is_protected = protected; } - DEBUG("bank %d sector %d is %s", tms470_info->ordinal, sector, protected ? "protected" : "not protected"); + LOG_DEBUG("bank %d sector %d is %s", tms470_info->ordinal, sector, protected ? "protected" : "not protected"); } return result; |