3 files changed, 44 insertions, 44 deletions
diff --git a/src/target/target/aduc702x.cfg b/src/target/target/aduc702x.cfg
index 4269f38a..fdffbfea 100644
--- a/src/target/target/aduc702x.cfg
+++ b/src/target/target/aduc702x.cfg
@@ -1,38 +1,38 @@
-## -*- tcl -*-
-##
-
-# This is for the case that TRST/SRST is not wired on your JTAG adaptor.
-# Don't really need them anyways.  
-reset_config none
-
-## JTAG scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-##
-## Target configuration
-##
-target arm7tdmi little 0
-
-## software initiated reset (if your SRST isn't wired)
-#proc target_0_reset {} { mwb 0x0ffff0230 04 }
-
-# use top 1k of SRAM for as temporary JTAG memory 
-#working_area 0 0x11C00 0x400 backup
-
-## flash configuration
-## AdUC702x not yet spported  :(
-
-## If you use the watchdog, the following code makes sure that the board
-## doesn't reboot when halted via JTAG.  Yes, on the older generation
-## AdUC702x, timer3 continues running even when the CPU is halted.
-
-proc watchdog_service {} {
-    global watchdog_hdl
-    mww 0xffff036c 0
-#    puts "watchdog!!"
-    set watchdog_hdl [after 500 watchdog_service]
-}
-
-proc target_0_post_halt {} { watchdog_service }
-proc arget_0_pre_resume {} { global watchdog_hdl; after cancel $watchdog_hdl }
+## -*- tcl -*-
+##
+
+# This is for the case that TRST/SRST is not wired on your JTAG adaptor.
+# Don't really need them anyways.  
+reset_config none
+
+## JTAG scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+
+##
+## Target configuration
+##
+target arm7tdmi little 0
+
+## software initiated reset (if your SRST isn't wired)
+#proc target_0_reset {} { mwb 0x0ffff0230 04 }
+
+# use top 1k of SRAM for as temporary JTAG memory 
+#working_area 0 0x11C00 0x400 backup
+
+## flash configuration
+## AdUC702x not yet spported  :(
+
+## If you use the watchdog, the following code makes sure that the board
+## doesn't reboot when halted via JTAG.  Yes, on the older generation
+## AdUC702x, timer3 continues running even when the CPU is halted.
+
+proc watchdog_service {} {
+    global watchdog_hdl
+    mww 0xffff036c 0
+#    puts "watchdog!!"
+    set watchdog_hdl [after 500 watchdog_service]
+}
+
+proc target_0_post_halt {} { watchdog_service }
+proc arget_0_pre_resume {} { global watchdog_hdl; after cancel $watchdog_hdl }
diff --git a/src/target/target/lpc2148_2mhz.cfg b/src/target/target/lpc2148_2mhz.cfg
index d709e13b..7e43f33d 100644
--- a/src/target/target/lpc2148_2mhz.cfg
+++ b/src/target/target/lpc2148_2mhz.cfg
@@ -1,3 +1,3 @@
-# 2MHz
-jtag_khz 2000
-script target/lpc2148.cfg
+# 2MHz
+jtag_khz 2000
+script target/lpc2148.cfg
diff --git a/src/target/target/lpc2148_rclk.cfg b/src/target/target/lpc2148_rclk.cfg
index 1afafaa8..4a3fb3ef 100644
--- a/src/target/target/lpc2148_rclk.cfg
+++ b/src/target/target/lpc2148_rclk.cfg
@@ -1,3 +1,3 @@
-# RCLK
-jtag_khz 0
-script target/lpc2148.cfg
+# RCLK
+jtag_khz 0
+script target/lpc2148.cfg