diff options
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/arm_simulator.c | 9 | ||||
| -rw-r--r-- | src/target/xscale.c | 2 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c index 561b14f8..4ed05586 100644 --- a/src/target/arm_simulator.c +++ b/src/target/arm_simulator.c @@ -269,13 +269,14 @@ int thumb_pass_branch_condition(u32 cpsr, u16 opcode) int arm_simulate_step(target_t *target, u32 *dry_run_pc) { armv4_5_common_t *armv4_5 = target->arch_info; - u32 opcode; u32 current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32); arm_instruction_t instruction; int instruction_size; if (armv4_5->core_state == ARMV4_5_STATE_ARM) { + u32 opcode; + /* get current instruction, and identify it */ target_read_u32(target, current_pc, &opcode); arm_evaluate_opcode(opcode, current_pc, &instruction); @@ -298,8 +299,10 @@ int arm_simulate_step(target_t *target, u32 *dry_run_pc) } else { - target_read_u32(target, current_pc, &opcode); - arm_evaluate_opcode(opcode, current_pc, &instruction); + u16 opcode; + + target_read_u16(target, current_pc, &opcode); + thumb_evaluate_opcode(opcode, current_pc, &instruction); instruction_size = 2; /* check condition code (only for branch instructions) */ diff --git a/src/target/xscale.c b/src/target/xscale.c index cb673df6..92cc1422 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -1680,6 +1680,8 @@ int xscale_deassert_reset(target_t *target) /* resume the target */ xscale_resume(target, 1, 0x0, 1, 0); } + + fileio_close(&debug_handler); } else { |