diff options
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/armv4_5.c | 13 | ||||
| -rw-r--r-- | src/target/armv7m.c | 13 | ||||
| -rw-r--r-- | src/target/cortex_swjdp.c | 2 |
3 files changed, 20 insertions, 8 deletions
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index cf0632f1..99f93bde 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -661,10 +661,15 @@ int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem for (i = 0; i <= 16; i++) { - LOG_DEBUG("restoring register %s with value 0x%8.8x", ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).name, context[i]); - buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).value, 0, 32, context[i]); - ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).valid = 1; - ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).dirty = 1; + u32 regvalue; + regvalue = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).value, 0, 32); + if (regvalue != context[i]) + { + LOG_DEBUG("restoring register %s with value 0x%8.8x", ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).name, context[i]); + buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).value, 0, 32, context[i]); + ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).valid = 1; + ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5_algorithm_info->core_mode, i).dirty = 1; + } } buf_set_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32, cpsr); armv4_5->core_cache->reg_list[ARMV4_5_CPSR].valid = 1; diff --git a/src/target/armv7m.c b/src/target/armv7m.c index d4c6d357..f69f9096 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -449,10 +449,15 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_ for (i = ARMV7NUMCOREREGS-1; i >= 0; i--) { - LOG_DEBUG("restoring register %s with value 0x%8.8x", armv7m->core_cache->reg_list[i].name, context[i]); - buf_set_u32(armv7m->core_cache->reg_list[i].value, 0, 32, context[i]); - armv7m->core_cache->reg_list[i].valid = 1; - armv7m->core_cache->reg_list[i].dirty = 1; + u32 regvalue; + regvalue = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32); + if (regvalue != context[i]) + { + LOG_DEBUG("restoring register %s with value 0x%8.8x", armv7m->core_cache->reg_list[i].name, context[i]); + buf_set_u32(armv7m->core_cache->reg_list[i].value, 0, 32, context[i]); + armv7m->core_cache->reg_list[i].valid = 1; + armv7m->core_cache->reg_list[i].dirty = 1; + } } armv7m->core_mode = core_mode; diff --git a/src/target/cortex_swjdp.c b/src/target/cortex_swjdp.c index 0f737ce0..84be9171 100644 --- a/src/target/cortex_swjdp.c +++ b/src/target/cortex_swjdp.c @@ -247,6 +247,8 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp) { u32 dcb_dhcsr,nvic_shcsr, nvic_bfar, nvic_cfsr; + /* Print information about last AHBAP access */ + LOG_ERROR("AHBAP: dp_select 0x%x, ap_csw 0x%x, ap_tar 0x%x", swjdp->dp_select_value, swjdp->ap_csw_value, swjdp->ap_tar_value); if (ctrlstat & SSTICKYORUN) LOG_ERROR("SWJ-DP OVERRUN - check clock or reduce jtag speed"); |