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-rw-r--r--src/target/algorithm.h11
-rw-r--r--src/target/arm926ejs.h12
-rw-r--r--src/target/arm966e.h7
-rw-r--r--src/target/arm9tdmi.h48
-rw-r--r--src/target/arm_adi_v5.h55
-rw-r--r--src/target/arm_disassembler.h10
-rw-r--r--src/target/arm_jtag.h7
-rw-r--r--src/target/arm_simulator.h7
-rw-r--r--src/target/armv4_5.h20
-rw-r--r--src/target/armv4_5_cache.h9
-rw-r--r--src/target/armv4_5_mmu.h14
-rw-r--r--src/target/armv7m.h33
-rw-r--r--src/target/breakpoints.h19
-rw-r--r--src/target/cortex_a8.h11
-rw-r--r--src/target/embeddedice.h30
-rw-r--r--src/target/etb.h2
-rw-r--r--src/target/etm.h6
-rw-r--r--src/target/image.h14
-rw-r--r--src/target/mips32.h40
-rw-r--r--src/target/mips32_dmaacc.h24
-rw-r--r--src/target/mips32_pracc.h38
-rw-r--r--src/target/mips_ejtag.h19
-rw-r--r--src/target/mips_m4k.h26
-rw-r--r--src/target/register.h13
-rw-r--r--src/target/target_request.h7
-rw-r--r--src/target/trace.h4
26 files changed, 296 insertions, 190 deletions
diff --git a/src/target/algorithm.h b/src/target/algorithm.h
index 15e3cf22..600580cb 100644
--- a/src/target/algorithm.h
+++ b/src/target/algorithm.h
@@ -45,9 +45,12 @@ typedef struct reg_param_s
enum param_direction direction;
} reg_param_t;
-extern void init_mem_param(mem_param_t *param, uint32_t address, uint32_t size, enum param_direction direction);
-extern void destroy_mem_param(mem_param_t *param);
-extern void init_reg_param(reg_param_t *param, char *reg_name, uint32_t size, enum param_direction direction);
-extern void destroy_reg_param(reg_param_t *param);
+void init_mem_param(mem_param_t *param,
+ uint32_t address, uint32_t size, enum param_direction dir);
+void destroy_mem_param(mem_param_t *param);
+
+void init_reg_param(reg_param_t *param,
+ char *reg_name, uint32_t size, enum param_direction dir);
+void destroy_reg_param(reg_param_t *param);
#endif /* ALGORITHM_H */
diff --git a/src/target/arm926ejs.h b/src/target/arm926ejs.h
index 01e3c090..0712c535 100644
--- a/src/target/arm926ejs.h
+++ b/src/target/arm926ejs.h
@@ -46,10 +46,12 @@ target_to_arm926(struct target_s *target)
}
-extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap);
-extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx);
-extern int arm926ejs_arch_state(struct target_s *target);
-extern int arm926ejs_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-extern int arm926ejs_soft_reset_halt(struct target_s *target);
+int arm926ejs_init_arch_info(target_t *target,
+ arm926ejs_common_t *arm926ejs, jtag_tap_t *tap);
+int arm926ejs_register_commands(struct command_context_s *cmd_ctx);
+int arm926ejs_arch_state(struct target_s *target);
+int arm926ejs_write_memory(struct target_s *target,
+ uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm926ejs_soft_reset_halt(struct target_s *target);
#endif /* ARM926EJS_H */
diff --git a/src/target/arm966e.h b/src/target/arm966e.h
index e8346f9d..8d0ee501 100644
--- a/src/target/arm966e.h
+++ b/src/target/arm966e.h
@@ -41,8 +41,9 @@ target_to_arm966(struct target_s *target)
arm9tdmi_common.arm7_9_common.armv4_5_common);
}
-extern int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap);
-extern int arm966e_register_commands(struct command_context_s *cmd_ctx);
-extern int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value);
+int arm966e_init_arch_info(target_t *target,
+ arm966e_common_t *arm966e, jtag_tap_t *tap);
+int arm966e_register_commands(struct command_context_s *cmd_ctx);
+int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value);
#endif /* ARM966E_H */
diff --git a/src/target/arm9tdmi.h b/src/target/arm9tdmi.h
index 8bf2713e..c098d822 100644
--- a/src/target/arm9tdmi.h
+++ b/src/target/arm9tdmi.h
@@ -51,34 +51,34 @@ enum arm9tdmi_vector
ARM9TDMI_FIQ_VECTOR = 0x80,
};
-extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx,
- struct target_s *target);
+int arm9tdmi_init_target(struct command_context_s *cmd_ctx,
+ struct target_s *target);
int arm9tdmi_examine(struct target_s *target);
-extern int arm9tdmi_init_arch_info(target_t *target,
- arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap);
-extern int arm9tdmi_register_commands(struct command_context_s *cmd_ctx);
+int arm9tdmi_init_arch_info(target_t *target,
+ arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap);
+int arm9tdmi_register_commands(struct command_context_s *cmd_ctx);
-extern int arm9tdmi_clock_out(arm_jtag_t *jtag_info,
- uint32_t instr, uint32_t out, uint32_t *in, int sysspeed);
-extern int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in);
-extern int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
- void *in, int size, int be);
-extern void arm9tdmi_read_core_regs(target_t *target,
- uint32_t mask, uint32_t* core_regs[16]);
-extern void arm9tdmi_write_core_regs(target_t *target,
- uint32_t mask, uint32_t core_regs[16]);
+int arm9tdmi_clock_out(arm_jtag_t *jtag_info,
+ uint32_t instr, uint32_t out, uint32_t *in, int sysspeed);
+int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in);
+int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info,
+ void *in, int size, int be);
+void arm9tdmi_read_core_regs(target_t *target,
+ uint32_t mask, uint32_t* core_regs[16]);
+void arm9tdmi_write_core_regs(target_t *target,
+ uint32_t mask, uint32_t core_regs[16]);
-extern int arm9tdmi_examine_debug_reason(target_t *target);
+int arm9tdmi_examine_debug_reason(target_t *target);
-extern void arm9tdmi_load_word_regs(target_t *target, uint32_t mask);
-extern void arm9tdmi_load_hword_reg(target_t *target, int num);
-extern void arm9tdmi_load_byte_reg(target_t *target, int num);
-extern void arm9tdmi_store_word_regs(target_t *target, uint32_t mask);
-extern void arm9tdmi_store_hword_reg(target_t *target, int num);
-extern void arm9tdmi_store_byte_reg(target_t *target, int num);
+void arm9tdmi_load_word_regs(target_t *target, uint32_t mask);
+void arm9tdmi_load_hword_reg(target_t *target, int num);
+void arm9tdmi_load_byte_reg(target_t *target, int num);
+void arm9tdmi_store_word_regs(target_t *target, uint32_t mask);
+void arm9tdmi_store_hword_reg(target_t *target, int num);
+void arm9tdmi_store_byte_reg(target_t *target, int num);
-extern void arm9tdmi_branch_resume(target_t *target);
-extern void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc);
-extern void arm9tdmi_disable_single_step(target_t *target);
+void arm9tdmi_branch_resume(target_t *target);
+void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc);
+void arm9tdmi_disable_single_step(target_t *target);
#endif /* ARM9TDMI_H */
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index 3ff883af..442b45ca 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -111,39 +111,48 @@ static inline uint8_t dap_ap_get_select(swjdp_common_t *swjdp)
}
/* Internal functions used in the module, partial transactions, use with caution */
-extern int dap_dp_write_reg(swjdp_common_t *swjdp, uint32_t value, uint8_t reg_addr);
-/* extern int swjdp_write_apacc(swjdp_common_t *swjdp, uint32_t value, uint8_t reg_addr); */
-extern int dap_dp_read_reg(swjdp_common_t *swjdp, uint32_t *value, uint8_t reg_addr);
-/* extern int swjdp_read_apacc(swjdp_common_t *swjdp, uint32_t *value, uint8_t reg_addr); */
-extern int dap_setup_accessport(swjdp_common_t *swjdp, uint32_t csw, uint32_t tar);
-extern int dap_ap_select(swjdp_common_t *swjdp,uint8_t apsel);
-
-extern int dap_ap_write_reg(swjdp_common_t *swjdp, uint32_t reg_addr, uint8_t* out_value_buf);
-extern int dap_ap_write_reg_u32(swjdp_common_t *swjdp, uint32_t reg_addr, uint32_t value);
-extern int dap_ap_read_reg(swjdp_common_t *swjdp, uint32_t reg_addr, uint8_t *in_value_buf);
-extern int dap_ap_read_reg_u32(swjdp_common_t *swjdp, uint32_t reg_addr, uint32_t *value);
+int dap_dp_write_reg(swjdp_common_t *swjdp, uint32_t value, uint8_t reg_addr);
+/* int swjdp_write_apacc(swjdp_common_t *swjdp, uint32_t value, uint8_t reg_addr); */
+int dap_dp_read_reg(swjdp_common_t *swjdp, uint32_t *value, uint8_t reg_addr);
+/* int swjdp_read_apacc(swjdp_common_t *swjdp, uint32_t *value, uint8_t reg_addr); */
+int dap_setup_accessport(swjdp_common_t *swjdp, uint32_t csw, uint32_t tar);
+int dap_ap_select(swjdp_common_t *swjdp,uint8_t apsel);
+
+int dap_ap_write_reg(swjdp_common_t *swjdp, uint32_t addr, uint8_t* out_buf);
+int dap_ap_write_reg_u32(swjdp_common_t *swjdp, uint32_t addr, uint32_t value);
+int dap_ap_read_reg(swjdp_common_t *swjdp, uint32_t addr, uint8_t *in_buf);
+int dap_ap_read_reg_u32(swjdp_common_t *swjdp, uint32_t addr, uint32_t *value);
/* External interface, partial operations must be completed with swjdp_transaction_endcheck() */
-extern int swjdp_transaction_endcheck(swjdp_common_t *swjdp);
+int swjdp_transaction_endcheck(swjdp_common_t *swjdp);
/* MEM-AP memory mapped bus single uint32_t register transfers, without endcheck */
-extern int mem_ap_read_u32(swjdp_common_t *swjdp, uint32_t address, uint32_t *value);
-extern int mem_ap_write_u32(swjdp_common_t *swjdp, uint32_t address, uint32_t value);
+int mem_ap_read_u32(swjdp_common_t *swjdp, uint32_t address, uint32_t *value);
+int mem_ap_write_u32(swjdp_common_t *swjdp, uint32_t address, uint32_t value);
/* MEM-AP memory mapped bus transfers, single registers, complete transactions */
-extern int mem_ap_read_atomic_u32(swjdp_common_t *swjdp, uint32_t address, uint32_t *value);
-extern int mem_ap_write_atomic_u32(swjdp_common_t *swjdp, uint32_t address, uint32_t value);
+int mem_ap_read_atomic_u32(swjdp_common_t *swjdp,
+ uint32_t address, uint32_t *value);
+int mem_ap_write_atomic_u32(swjdp_common_t *swjdp,
+ uint32_t address, uint32_t value);
/* MEM-AP memory mapped bus block transfers */
-extern int mem_ap_read_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, uint32_t address);
-extern int mem_ap_read_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, uint32_t address);
-extern int mem_ap_read_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, uint32_t address);
-extern int mem_ap_write_buf_u8(swjdp_common_t *swjdp, uint8_t *buffer, int count, uint32_t address);
-extern int mem_ap_write_buf_u16(swjdp_common_t *swjdp, uint8_t *buffer, int count, uint32_t address);
-extern int mem_ap_write_buf_u32(swjdp_common_t *swjdp, uint8_t *buffer, int count, uint32_t address);
+int mem_ap_read_buf_u8(swjdp_common_t *swjdp,
+ uint8_t *buffer, int count, uint32_t address);
+int mem_ap_read_buf_u16(swjdp_common_t *swjdp,
+ uint8_t *buffer, int count, uint32_t address);
+int mem_ap_read_buf_u32(swjdp_common_t *swjdp,
+ uint8_t *buffer, int count, uint32_t address);
+
+int mem_ap_write_buf_u8(swjdp_common_t *swjdp,
+ uint8_t *buffer, int count, uint32_t address);
+int mem_ap_write_buf_u16(swjdp_common_t *swjdp,
+ uint8_t *buffer, int count, uint32_t address);
+int mem_ap_write_buf_u32(swjdp_common_t *swjdp,
+ uint8_t *buffer, int count, uint32_t address);
/* Initialisation of the debug system, power domains and registers */
-extern int ahbap_debugport_init(swjdp_common_t *swjdp);
+int ahbap_debugport_init(swjdp_common_t *swjdp);
/* Commands for user dap access */
diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h
index b841d6cd..8021e7c3 100644
--- a/src/target/arm_disassembler.h
+++ b/src/target/arm_disassembler.h
@@ -197,11 +197,13 @@ typedef struct arm_instruction_s
} arm_instruction_t;
-extern int arm_evaluate_opcode(uint32_t opcode, uint32_t address, arm_instruction_t *instruction);
-extern int thumb_evaluate_opcode(uint16_t opcode, uint32_t address, arm_instruction_t *instruction);
-extern int thumb2_opcode(target_t *target, uint32_t address,
+int arm_evaluate_opcode(uint32_t opcode, uint32_t address,
arm_instruction_t *instruction);
-extern int arm_access_size(arm_instruction_t *instruction);
+int thumb_evaluate_opcode(uint16_t opcode, uint32_t address,
+ arm_instruction_t *instruction);
+int thumb2_opcode(target_t *target, uint32_t address,
+ arm_instruction_t *instruction);
+int arm_access_size(arm_instruction_t *instruction);
#define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28])
diff --git a/src/target/arm_jtag.h b/src/target/arm_jtag.h
index f4b04e88..c7d12cba 100644
--- a/src/target/arm_jtag.h
+++ b/src/target/arm_jtag.h
@@ -36,9 +36,10 @@ typedef struct arm_jtag_s
uint32_t intest_instr;
} arm_jtag_t;
-extern int arm_jtag_set_instr(arm_jtag_t *jtag_info, uint32_t new_instr, void *verify_capture);
-extern int arm_jtag_scann(arm_jtag_t *jtag_info, uint32_t new_scan_chain);
-extern int arm_jtag_setup_connection(arm_jtag_t *jtag_info);
+int arm_jtag_set_instr(arm_jtag_t *jtag_info,
+ uint32_t new_instr, void *verify_capture);
+int arm_jtag_scann(arm_jtag_t *jtag_info, uint32_t new_scan_chain);
+int arm_jtag_setup_connection(arm_jtag_t *jtag_info);
/* JTAG buffers to host, be and le buffers, flipping variants */
int arm_jtag_buf_to_u32_flip(uint8_t *in_buf, void *priv, struct scan_field_s *field);
diff --git a/src/target/arm_simulator.h b/src/target/arm_simulator.h
index bad904ba..9e7b0400 100644
--- a/src/target/arm_simulator.h
+++ b/src/target/arm_simulator.h
@@ -37,12 +37,11 @@ struct arm_sim_interface
enum armv4_5_mode (*get_mode)(struct arm_sim_interface *sim);
};
-
/* armv4_5 version */
-extern int arm_simulate_step(struct target_s *target, uint32_t *dry_run_pc);
+int arm_simulate_step(struct target_s *target, uint32_t *dry_run_pc);
/* a generic arm simulator. Caller must implement the sim interface */
-extern int arm_simulate_step_core(target_t *target, uint32_t *dry_run_pc, struct arm_sim_interface *sim);
-
+int arm_simulate_step_core(target_t *target,
+ uint32_t *dry_run_pc, struct arm_sim_interface *sim);
#endif /* ARM_SIMULATOR_H */
diff --git a/src/target/armv4_5.h b/src/target/armv4_5.h
index fb7926b6..d76ce759 100644
--- a/src/target/armv4_5.h
+++ b/src/target/armv4_5.h
@@ -108,7 +108,8 @@ typedef struct armv4_5_core_reg_s
armv4_5_common_t *armv4_5_common;
} armv4_5_core_reg_t;
-extern reg_cache_t* armv4_5_build_reg_cache(target_t *target, armv4_5_common_t *armv4_5_common);
+reg_cache_t* armv4_5_build_reg_cache(target_t *target,
+ armv4_5_common_t *armv4_5_common);
/* map psr mode bits to linear number */
static __inline int armv4_5_mode_to_number(enum armv4_5_mode mode)
@@ -147,15 +148,20 @@ static __inline enum armv4_5_mode armv4_5_number_to_mode(int number)
}
};
-extern int armv4_5_arch_state(struct target_s *target);
-extern int armv4_5_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size);
+int armv4_5_arch_state(struct target_s *target);
+int armv4_5_get_gdb_reg_list(target_t *target,
+ reg_t **reg_list[], int *reg_list_size);
-extern int armv4_5_register_commands(struct command_context_s *cmd_ctx);
-extern int armv4_5_init_arch_info(target_t *target, armv4_5_common_t *armv4_5);
+int armv4_5_register_commands(struct command_context_s *cmd_ctx);
+int armv4_5_init_arch_info(target_t *target, armv4_5_common_t *armv4_5);
-extern int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
+int armv4_5_run_algorithm(struct target_s *target,
+ int num_mem_params, mem_param_t *mem_params,
+ int num_reg_params, reg_param_t *reg_params,
+ uint32_t entry_point, uint32_t exit_point,
+ int timeout_ms, void *arch_info);
-extern int armv4_5_invalidate_core_regs(target_t *target);
+int armv4_5_invalidate_core_regs(target_t *target);
/* ARM mode instructions
*/
diff --git a/src/target/armv4_5_cache.h b/src/target/armv4_5_cache.h
index 44bc212e..71e3203c 100644
--- a/src/target/armv4_5_cache.h
+++ b/src/target/armv4_5_cache.h
@@ -42,10 +42,13 @@ typedef struct armv4_5_cache_common_s
int d_u_cache_enabled;
} armv4_5_cache_common_t;
-extern int armv4_5_identify_cache(uint32_t cache_type_reg, armv4_5_cache_common_t *cache);
-extern int armv4_5_cache_state(uint32_t cp15_control_reg, armv4_5_cache_common_t *cache);
+int armv4_5_identify_cache(uint32_t cache_type_reg,
+ armv4_5_cache_common_t *cache);
+int armv4_5_cache_state(uint32_t cp15_control_reg,
+ armv4_5_cache_common_t *cache);
-extern int armv4_5_handle_cache_info_command(struct command_context_s *cmd_ctx, armv4_5_cache_common_t *armv4_5_cache);
+int armv4_5_handle_cache_info_command(struct command_context_s *cmd_ctx,
+ armv4_5_cache_common_t *armv4_5_cache);
enum
{
diff --git a/src/target/armv4_5_mmu.h b/src/target/armv4_5_mmu.h
index 0c9b5501..b0c39a7a 100644
--- a/src/target/armv4_5_mmu.h
+++ b/src/target/armv4_5_mmu.h
@@ -42,9 +42,17 @@ enum
extern char* armv4_5_page_type_names[];
-extern uint32_t armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, uint32_t va, int *type, uint32_t *cb, int *domain, uint32_t *ap);
-extern int armv4_5_mmu_read_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-extern int armv4_5_mmu_write_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+uint32_t armv4_5_mmu_translate_va(target_t *target,
+ armv4_5_mmu_common_t *armv4_5_mmu, uint32_t va, int *type,
+ uint32_t *cb, int *domain, uint32_t *ap);
+
+int armv4_5_mmu_read_physical(target_t *target,
+ armv4_5_mmu_common_t *armv4_5_mmu,
+ uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+
+int armv4_5_mmu_write_physical(target_t *target,
+ armv4_5_mmu_common_t *armv4_5_mmu,
+ uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
enum
{
diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index 217f0e38..76016856 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -50,7 +50,7 @@ enum armv7m_regtype
ARMV7M_REGISTER_MEMMAP
};
-extern char *armv7m_exception_string(int number);
+char *armv7m_exception_string(int number);
/* offsets into armv7m core register cache */
enum
@@ -134,24 +134,31 @@ typedef struct armv7m_core_reg_s
armv7m_common_t *armv7m_common;
} armv7m_core_reg_t;
-extern reg_cache_t *armv7m_build_reg_cache(target_t *target);
-extern enum armv7m_mode armv7m_number_to_mode(int number);
-extern int armv7m_mode_to_number(enum armv7m_mode mode);
+reg_cache_t *armv7m_build_reg_cache(target_t *target);
+enum armv7m_mode armv7m_number_to_mode(int number);
+int armv7m_mode_to_number(enum armv7m_mode mode);
-extern int armv7m_arch_state(struct target_s *target);
-extern int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size);
+int armv7m_arch_state(struct target_s *target);
+int armv7m_get_gdb_reg_list(target_t *target,
+ reg_t **reg_list[], int *reg_list_size);
-extern int armv7m_register_commands(struct command_context_s *cmd_ctx);
-extern int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m);
+int armv7m_register_commands(struct command_context_s *cmd_ctx);
+int armv7m_init_arch_info(target_t *target, armv7m_common_t *armv7m);
-extern int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
+int armv7m_run_algorithm(struct target_s *target,
+ int num_mem_params, mem_param_t *mem_params,
+ int num_reg_params, reg_param_t *reg_params,
+ uint32_t entry_point, uint32_t exit_point,
+ int timeout_ms, void *arch_info);
-extern int armv7m_invalidate_core_regs(target_t *target);
+int armv7m_invalidate_core_regs(target_t *target);
-extern int armv7m_restore_context(target_t *target);
+int armv7m_restore_context(target_t *target);
-extern int armv7m_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum);
-extern int armv7m_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank);
+int armv7m_checksum_memory(struct target_s *target,
+ uint32_t address, uint32_t count, uint32_t* checksum);
+int armv7m_blank_check_memory(struct target_s *target,
+ uint32_t address, uint32_t count, uint32_t* blank);
/* Thumb mode instructions
*/
diff --git a/src/target/breakpoints.h b/src/target/breakpoints.h
index 91459669..781c91b6 100644
--- a/src/target/breakpoints.h
+++ b/src/target/breakpoints.h
@@ -58,12 +58,17 @@ typedef struct watchpoint_s
int unique_id;
} watchpoint_t;
-extern void breakpoint_clear_target(struct target_s *target);
-extern int breakpoint_add(struct target_s *target, uint32_t address, uint32_t length, enum breakpoint_type type);
-extern void breakpoint_remove(struct target_s *target, uint32_t address);
-extern breakpoint_t* breakpoint_find(struct target_s *target, uint32_t address);
-extern int watchpoint_add(struct target_s *target, uint32_t address, uint32_t length, enum watchpoint_rw rw, uint32_t value, uint32_t mask);
-extern void watchpoint_remove(struct target_s *target, uint32_t address);
-extern void watchpoint_clear_target(struct target_s *target);
+void breakpoint_clear_target(struct target_s *target);
+int breakpoint_add(struct target_s *target,
+ uint32_t address, uint32_t length, enum breakpoint_type type);
+void breakpoint_remove(struct target_s *target, uint32_t address);
+
+breakpoint_t* breakpoint_find(struct target_s *target, uint32_t address);
+
+void watchpoint_clear_target(struct target_s *target);
+int watchpoint_add(struct target_s *target,
+ uint32_t address, uint32_t length,
+ enum watchpoint_rw rw, uint32_t value, uint32_t mask);
+void watchpoint_remove(struct target_s *target, uint32_t address);
#endif /* BREAKPOINTS_H */
diff --git a/src/target/cortex_a8.h b/src/target/cortex_a8.h
index b4cb3275..42cb0624 100644
--- a/src/target/cortex_a8.h
+++ b/src/target/cortex_a8.h
@@ -143,8 +143,13 @@ target_to_cortex_a8(struct target_s *target)
armv7a_common.armv4_5_common);
}
-extern int cortex_a8_init_arch_info(target_t *target, cortex_a8_common_t *cortex_a8, jtag_tap_t *tap);
-int cortex_a8_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
-int cortex_a8_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int cortex_a8_init_arch_info(target_t *target,
+ cortex_a8_common_t *cortex_a8, jtag_tap_t *tap);
+int cortex_a8_read_memory(struct target_s *target,
+ uint32_t address, uint32_t size,
+ uint32_t count, uint8_t *buffer);
+int cortex_a8_write_memory(struct target_s *target,
+ uint32_t address, uint32_t size,
+ uint32_t count, uint8_t *buffer);
#endif /* CORTEX_A8_H */
diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 08e42c92..b1ba9895 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -93,17 +93,25 @@ typedef struct embeddedice_reg_s
arm_jtag_t *jtag_info;
} embeddedice_reg_t;
-extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
-extern int embeddedice_setup(target_t *target);
-extern int embeddedice_read_reg(reg_t *reg);
-extern void embeddedice_write_reg(reg_t *reg, uint32_t value);
-extern int embeddedice_read_reg_w_check(reg_t *reg, uint8_t* check_value, uint8_t* check_mask);
-extern void embeddedice_store_reg(reg_t *reg);
-extern void embeddedice_set_reg(reg_t *reg, uint32_t value);
-extern int embeddedice_set_reg_w_exec(reg_t *reg, uint8_t *buf);
-extern int embeddedice_receive(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size);
-extern int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size);
-extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, uint32_t timeout);
+reg_cache_t* embeddedice_build_reg_cache(target_t *target,
+ arm7_9_common_t *arm7_9);
+
+int embeddedice_setup(target_t *target);
+
+int embeddedice_read_reg(reg_t *reg);
+int embeddedice_read_reg_w_check(reg_t *reg,
+ uint8_t* check_value, uint8_t* check_mask);
+
+void embeddedice_write_reg(reg_t *reg, uint32_t value);
+void embeddedice_store_reg(reg_t *reg);
+
+void embeddedice_set_reg(reg_t *reg, uint32_t value);
+int embeddedice_set_reg_w_exec(reg_t *reg, uint8_t *buf);
+
+int embeddedice_receive(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size);
+int embeddedice_send(arm_jtag_t *jtag_info, uint32_t *data, uint32_t size);
+
+int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, uint32_t timeout);
/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
* embeddedice_write_reg
diff --git a/src/target/etb.h b/src/target/etb.h
index 0eeb02bd..cc58b659 100644
--- a/src/target/etb.h
+++ b/src/target/etb.h
@@ -56,6 +56,6 @@ typedef struct etb_reg_s
extern etm_capture_driver_t etb_capture_driver;
-extern reg_cache_t* etb_build_reg_cache(etb_t *etb);
+reg_cache_t* etb_build_reg_cache(etb_t *etb);
#endif /* ETB_H */
diff --git a/src/target/etm.h b/src/target/etm.h
index b2426c74..c751aac4 100644
--- a/src/target/etm.h
+++ b/src/target/etm.h
@@ -200,8 +200,10 @@ typedef enum
BR_RSVD7 = 0x7, /* reserved */
} etmv1_branch_reason_t;
-extern reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_context_t *etm_ctx);
-extern int etm_setup(target_t *target);
+reg_cache_t* etm_build_reg_cache(target_t *target,
+ arm_jtag_t *jtag_info, etm_context_t *etm_ctx);
+
+int etm_setup(target_t *target);
int etm_register_commands(struct command_context_s *cmd_ctx);
diff --git a/src/target/image.h b/src/target/image.h
index 551524e3..8b70b3b1 100644
--- a/src/target/image.h
+++ b/src/target/image.h
@@ -100,12 +100,16 @@ typedef struct image_mot_s
uint8_t *buffer;
} image_mot_t;
-extern int image_open(image_t *image, char *url, char *type_string);
-extern int image_read_section(image_t *image, int section, uint32_t offset, uint32_t size, uint8_t *buffer, uint32_t *size_read);
-extern void image_close(image_t *image);
-extern int image_add_section(image_t *image, uint32_t base, uint32_t size, int flags, uint8_t *data);
+int image_open(image_t *image, char *url, char *type_string);
+int image_read_section(image_t *image, int section, uint32_t offset,
+ uint32_t size, uint8_t *buffer, uint32_t *size_read);
+void image_close(image_t *image);
-extern int image_calculate_checksum(uint8_t* buffer, uint32_t nbytes, uint32_t* checksum);
+int image_add_section(image_t *image, uint32_t base, uint32_t size,
+ int flags, uint8_t *data);
+
+int image_calculate_checksum(uint8_t* buffer, uint32_t nbytes,
+ uint32_t* checksum);
#define ERROR_IMAGE_FORMAT_ERROR (-1400)
#define ERROR_IMAGE_TYPE_UNKNOWN (-1401)
diff --git a/src/target/mips32.h b/src/target/mips32.h
index bc88bc37..005798d5 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -124,18 +124,32 @@ typedef struct mips32_core_reg_s
#define MIPS32_SDBBP 0x7000003F
#define MIPS16_SDBBP 0xE801
-extern int mips32_arch_state(struct target_s *target);
-extern int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, jtag_tap_t *tap);
-extern int mips32_restore_context(target_t *target);
-extern int mips32_save_context(target_t *target);
-extern reg_cache_t *mips32_build_reg_cache(target_t *target);
-extern int mips32_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
-extern int mips32_configure_break_unit(struct target_s *target);
-extern int mips32_enable_interrupts(struct target_s *target, int enable);
-extern int mips32_examine(struct target_s *target);
-
-extern int mips32_register_commands(struct command_context_s *cmd_ctx);
-extern int mips32_invalidate_core_regs(target_t *target);
-extern int mips32_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size);
+int mips32_arch_state(struct target_s *target);
+
+int mips32_init_arch_info(target_t *target,
+ mips32_common_t *mips32, jtag_tap_t *tap);
+
+int mips32_restore_context(target_t *target);
+int mips32_save_context(target_t *target);
+
+reg_cache_t *mips32_build_reg_cache(target_t *target);
+
+int mips32_run_algorithm(struct target_s *target,
+ int num_mem_params, mem_param_t *mem_params,
+ int num_reg_params, reg_param_t *reg_params,
+ uint32_t entry_point, uint32_t exit_point,
+ int timeout_ms, void *arch_info);
+
+int mips32_configure_break_unit(struct target_s *target);
+
+int mips32_enable_interrupts(struct target_s *target, int enable);
+
+int mips32_examine(struct target_s *target);
+
+int mips32_register_commands(struct command_context_s *cmd_ctx);
+
+int mips32_invalidate_core_regs(target_t *target);
+int mips32_get_gdb_reg_list(target_t *target,
+ reg_t **reg_list[], int *reg_list_size);
#endif /*MIPS32_H*/
diff --git a/src/target/mips32_dmaacc.h b/src/target/mips32_dmaacc.h
index e44ddad2..c8a64fb9 100644
--- a/src/target/mips32_dmaacc.h
+++ b/src/target/mips32_dmaacc.h
@@ -34,15 +34,23 @@
#define RETRY_ATTEMPTS 0
-extern int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf);
-extern int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf);
+int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int size, int count, void *buf);
+int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int size, int count, void *buf);
-extern int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf);
-extern int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf);
-extern int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf);
+int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint8_t *buf);
+int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint16_t *buf);
+int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint32_t *buf);
-extern int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf);
-extern int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf);
-extern int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf);
+int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint8_t *buf);
+int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint16_t *buf);
+int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint32_t *buf);
#endif
diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index 8443f870..866f6f50 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -37,22 +37,34 @@
#define NEG16(v) (((~(v)) + 1) & 0xFFFF)
/*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
-extern int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf);
-extern int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf);
+int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int size, int count, void *buf);
+int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int size, int count, void *buf);
-extern int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf);
-extern int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf);
-extern int mips32_pracc_read_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf);
-extern int mips32_pracc_read_u32(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t *buf);
+int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint8_t *buf);
+int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint16_t *buf);
+int mips32_pracc_read_mem32(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint32_t *buf);
+int mips32_pracc_read_u32(mips_ejtag_t *ejtag_info,
+ uint32_t addr, uint32_t *buf);
-extern int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf);
-extern int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf);
-extern int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf);
-extern int mips32_pracc_write_u32(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t *buf);
+int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint8_t *buf);
+int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint16_t *buf);
+int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info,
+ uint32_t addr, int count, uint32_t *buf);
+int mips32_pracc_write_u32(mips_ejtag_t *ejtag_info,
+ uint32_t addr, uint32_t *buf);
-extern int mips32_pracc_read_regs(mips_ejtag_t *ejtag_info, uint32_t *regs);
-extern int mips32_pracc_write_regs(mips_ejtag_t *ejtag_info, uint32_t *regs);
+int mips32_pracc_read_regs(mips_ejtag_t *ejtag_info, uint32_t *regs);
+int mips32_pracc_write_regs(mips_ejtag_t *ejtag_info, uint32_t *regs);
-extern int mips32_pracc_exec(mips_ejtag_t *ejtag_info, int code_len, uint32_t *code, int num_param_in, uint32_t *param_in, int num_param_out, uint32_t *param_out, int cycle);
+int mips32_pracc_exec(mips_ejtag_t *ejtag_info, int code_len, uint32_t *code,
+ int num_param_in, uint32_t *param_in,
+ int num_param_out, uint32_t *param_out, int cycle);
#endif
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index 274392a8..69ede527 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -111,15 +111,16 @@ typedef struct mips_ejtag_s
uint32_t ejtag_ctrl;
} mips_ejtag_t;
-extern int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_me_and_submit_patch);
-extern int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info);
-extern int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info);
-extern int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, uint32_t *impcode);
-extern int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, uint32_t *idcode);
-extern int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, uint32_t *data);
+int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info,
+ int new_instr, void *delete_me_and_submit_patch);
+int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info);
+int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info);
+int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, uint32_t *impcode);
+int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, uint32_t *idcode);
+int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, uint32_t *data);
-extern int mips_ejtag_init(mips_ejtag_t *ejtag_info);
-extern int mips_ejtag_config_step(mips_ejtag_t *ejtag_info, int enable_step);
-extern int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, uint32_t* debug_reg);
+int mips_ejtag_init(mips_ejtag_t *ejtag_info);
+int mips_ejtag_config_step(mips_ejtag_t *ejtag_info, int enable_step);
+int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, uint32_t* debug_reg);
#endif /* MIPS_EJTAG */
diff --git a/src/target/mips_m4k.h b/src/target/mips_m4k.h
index 8e81d8ff..e11f06a1 100644
--- a/src/target/mips_m4k.h
+++ b/src/target/mips_m4k.h
@@ -35,17 +35,19 @@ typedef struct mips_m4k_common_s
mips32_common_t mips32_common;
} mips_m4k_common_t;
-extern int mips_m4k_bulk_write_memory(struct target_s *target, uint32_t address, uint32_t count, uint8_t *buffer);
-
-extern void mips_m4k_enable_breakpoints(struct target_s *target);
-extern int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
-extern int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
-extern int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
-extern int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
-extern int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
-extern int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
-extern int mips_m4k_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
-extern int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
-extern void mips_m4k_enable_watchpoints(struct target_s *target);
+int mips_m4k_bulk_write_memory(struct target_s *target,
+ uint32_t address, uint32_t count, uint8_t *buffer);
+
+void mips_m4k_enable_breakpoints(struct target_s *target);
+int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *bp);
+int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *bp);
+int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *bp);
+int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *bp);
+
+void mips_m4k_enable_watchpoints(struct target_s *target);
+int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *wp);
+int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *wp);
+int mips_m4k_add_watchpoint(struct target_s *target, watchpoint_t *wp);
+int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *wp);
#endif /*MIPS_M4K_H*/
diff --git a/src/target/register.h b/src/target/register.h
index d139379b..e7904e58 100644
--- a/src/target/register.h
+++ b/src/target/register.h
@@ -62,10 +62,13 @@ typedef struct reg_arch_type_s
struct reg_arch_type_s *next;
} reg_arch_type_t;
-extern reg_t* register_get_by_name(reg_cache_t *first, char *name, int search_all);
-extern reg_cache_t** register_get_last_cache_p(reg_cache_t **first);
-extern int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, uint8_t *buf));
-extern reg_arch_type_t* register_get_arch_type(int id);
-extern void register_init_dummy(reg_t *reg);
+reg_t* register_get_by_name(reg_cache_t *first, char *name, int search_all);
+reg_cache_t** register_get_last_cache_p(reg_cache_t **first);
+
+int register_reg_arch_type(int (*get)(reg_t *reg),
+ int (*set)(reg_t *reg, uint8_t *buf));
+reg_arch_type_t* register_get_arch_type(int id);
+
+void register_init_dummy(reg_t *reg);
#endif /* REGISTER_H */
diff --git a/src/target/target_request.h b/src/target/target_request.h
index b457bd9d..433c5923 100644
--- a/src/target/target_request.h
+++ b/src/target/target_request.h
@@ -42,8 +42,9 @@ typedef struct debug_msg_receiver_s
struct debug_msg_receiver_s *next;
} debug_msg_receiver_t;
-extern int target_request(target_t *target, uint32_t request);
-extern int delete_debug_msg_receiver(struct command_context_s *cmd_ctx, target_t *target);
-extern int target_request_register_commands(struct command_context_s *cmd_ctx);
+int target_request(target_t *target, uint32_t request);
+int delete_debug_msg_receiver(struct command_context_s *cmd_ctx,
+ target_t *target);
+int target_request_register_commands(struct command_context_s *cmd_ctx);
#endif /* TARGET_REQUEST_H */
diff --git a/src/target/trace.h b/src/target/trace.h
index 0a9ccc55..f6615f59 100644
--- a/src/target/trace.h
+++ b/src/target/trace.h
@@ -51,8 +51,8 @@ typedef enum trace_status
TRACE_OVERFLOWED = 0x8,
} trace_status_t;
-extern int trace_point(struct target_s *target, uint32_t number);
-extern int trace_register_commands(struct command_context_s *cmd_ctx);
+int trace_point(struct target_s *target, uint32_t number);
+int trace_register_commands(struct command_context_s *cmd_ctx);
#define ERROR_TRACE_IMAGE_UNAVAILABLE -(1500)
#define ERROR_TRACE_INSTRUCTION_UNAVAILABLE -(1501)
generated by cgit v1.2.3 (git 2.46.0) at 2024-12-23 14:01:23 +0000