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-rw-r--r--src/Makefile.am6
-rw-r--r--src/ecosboard.c4
-rw-r--r--src/jtag/core.c29
-rw-r--r--src/jtag/jtag.h2
-rw-r--r--src/jtag/tcl.c107
-rw-r--r--src/jtag/zy1000/zy1000.c2
-rw-r--r--src/openocd.c2
-rw-r--r--src/target/arm11.c80
-rw-r--r--src/target/arm7_9_common.c15
9 files changed, 191 insertions, 56 deletions
diff --git a/src/Makefile.am b/src/Makefile.am
index 9198d0ca..a223f951 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -28,10 +28,12 @@ AM_CPPFLAGS = \
libopenocd_la_CPPFLAGS = -DPKGBLDDATE=\"`date +%F-%R`\"
+# banner output includes RELSTR appended to $VERSION from the configure script
+# guess-rev.sh returns either a repository version ID or "-snapshot"
if RELEASE
-libopenocd_la_CPPFLAGS += -DRELSTR=\"Release\" -DPKGBLDREV=\"\"
+libopenocd_la_CPPFLAGS += -DRELSTR=\"\"
else
-libopenocd_la_CPPFLAGS += -DRELSTR=\"svn:\" -DPKGBLDREV=\"`$(top_srcdir)/guess-rev.sh $(top_srcdir)`\"
+libopenocd_la_CPPFLAGS += -DRELSTR=\"`$(top_srcdir)/guess-rev.sh $(top_srcdir)`\"
endif
# add default CPPFLAGS
diff --git a/src/ecosboard.c b/src/ecosboard.c
index bd106b4d..b537e5bc 100644
--- a/src/ecosboard.c
+++ b/src/ecosboard.c
@@ -155,8 +155,8 @@ static char reboot_stack[2048];
static void zylinjtag_reboot(cyg_addrword_t data)
{
serialLog = true;
- diag_printf("Rebooting in 100 ticks..\n");
- cyg_thread_delay(100);
+ diag_printf("Rebooting in 500 ticks..\n");
+ cyg_thread_delay(500);
diag_printf("Unmounting /config..\n");
umount("/config");
diag_printf("Rebooting..\n");
diff --git a/src/jtag/core.c b/src/jtag/core.c
index 854236f3..0b752ea4 100644
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1108,19 +1108,22 @@ static int jtag_validate_ircapture(void)
break;
}
- /* Validate the two LSBs, which must be 01 per JTAG spec.
- * REVISIT we might be able to verify some MSBs too, using
- * ircapture/irmask attributes.
- */
- val = buf_get_u32(ir_test, chain_pos, tap->ir_length);
- if ((val & 0x3) != 1) {
- LOG_ERROR("%s: IR capture error; saw 0x%0*x not 0x..1",
- jtag_tap_name(tap),
- (tap->ir_length + 7) / tap->ir_length,
- val);
-
- retval = ERROR_JTAG_INIT_FAILED;
- goto done;
+ if (tap->hasidcode)
+ {
+ /* Validate the two LSBs, which must be 01 per JTAG spec.
+ * REVISIT we might be able to verify some MSBs too, using
+ * ircapture/irmask attributes.
+ */
+ val = buf_get_u32(ir_test, chain_pos, tap->ir_length);
+ if ((val & 0x3) != 1) {
+ LOG_ERROR("%s: IR capture error; saw 0x%0*x not 0x..1",
+ jtag_tap_name(tap),
+ (tap->ir_length + 7) / tap->ir_length,
+ val);
+
+ retval = ERROR_JTAG_INIT_FAILED;
+ goto done;
+ }
}
LOG_DEBUG("%s: IR capture 0x%0*x", jtag_tap_name(tap),
(tap->ir_length + 7) / tap->ir_length, val);
diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h
index 786b2b83..60774589 100644
--- a/src/jtag/jtag.h
+++ b/src/jtag/jtag.h
@@ -286,7 +286,7 @@ enum reset_types {
RESET_TRST_PULLS_SRST = 0x8,
RESET_TRST_OPEN_DRAIN = 0x10,
RESET_SRST_PUSH_PULL = 0x20,
- RESET_SRST_GATES_JTAG = 0x40,
+ RESET_SRST_NO_GATING = 0x40,
};
enum reset_types jtag_get_reset_config(void);
diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 9101d31e..e080279a 100644
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -631,7 +631,12 @@ int jtag_register_commands(struct command_context_s *cmd_ctx)
COMMAND_CONFIG, "(DEPRECATED) jtag_device <ir_length> <ir_expected> <ir_mask>");
register_command(cmd_ctx, NULL, "reset_config", handle_reset_config_command,
COMMAND_ANY,
- "[none/trst_only/srst_only/trst_and_srst] [srst_pulls_trst/trst_pulls_srst] [combined/separate] [trst_push_pull/trst_open_drain] [srst_push_pull/srst_open_drain]");
+ "reset_config "
+ "[none|trst_only|srst_only|trst_and_srst] "
+ "[srst_pulls_trst|trst_pulls_srst|combined|separate] "
+ "[srst_gates_jtag|srst_nogate] "
+ "[trst_push_pull|trst_open_drain] "
+ "[srst_push_pull|srst_open_drain]");
register_command(cmd_ctx, NULL, "jtag_nsrst_delay", handle_jtag_nsrst_delay_command,
COMMAND_ANY, "jtag_nsrst_delay <ms> - delay after deasserting srst in ms");
register_command(cmd_ctx, NULL, "jtag_ntrst_delay", handle_jtag_ntrst_delay_command,
@@ -851,9 +856,6 @@ static int handle_reset_config_command(struct command_context_s *cmd_ctx, char *
int new_cfg = 0;
int mask = 0;
- if (argc < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
/* Original versions cared about the order of these tokens:
* reset_config signals [combination [trst_type [srst_type]]]
* They also clobbered the previous configuration even on error.
@@ -865,13 +867,21 @@ static int handle_reset_config_command(struct command_context_s *cmd_ctx, char *
int tmp = 0;
int m;
- m = RESET_SRST_GATES_JTAG;
- tmp = 0;
+ /* gating */
+ m = RESET_SRST_NO_GATING;
if (strcmp(*args, "srst_gates_jtag") == 0)
- {
- tmp = RESET_SRST_GATES_JTAG;
- goto next;
+ /* default: don't use JTAG while SRST asserted */;
+ else if (strcmp(*args, "srst_nogate") == 0)
+ tmp = RESET_SRST_NO_GATING;
+ else
+ m = 0;
+ if (mask & m) {
+ LOG_ERROR("extra reset_config %s spec (%s)",
+ "gating", *args);
+ return ERROR_INVALID_ARGUMENTS;
}
+ if (m)
+ goto next;
/* signals */
m = RESET_HAS_TRST | RESET_HAS_SRST;
@@ -958,10 +968,81 @@ next:
}
/* clear previous values of those bits, save new values */
- enum reset_types old_cfg = jtag_get_reset_config();
- old_cfg &= ~mask;
- new_cfg |= old_cfg;
- jtag_set_reset_config(new_cfg);
+ if (mask) {
+ int old_cfg = jtag_get_reset_config();
+
+ old_cfg &= ~mask;
+ new_cfg |= old_cfg;
+ jtag_set_reset_config(new_cfg);
+ } else
+ new_cfg = jtag_get_reset_config();
+
+
+ /*
+ * Display the (now-)current reset mode
+ */
+ char *modes[5];
+
+ /* minimal JTAG has neither SRST nor TRST (so that's the default) */
+ switch (new_cfg & (RESET_HAS_TRST | RESET_HAS_SRST)) {
+ case RESET_HAS_SRST:
+ modes[0] = "srst_only";
+ break;
+ case RESET_HAS_TRST:
+ modes[0] = "trst_only";
+ break;
+ case RESET_TRST_AND_SRST:
+ modes[0] = "trst_and_srst";
+ break;
+ default:
+ modes[0] = "none";
+ break;
+ }
+
+ /* normally SRST and TRST are decoupled; but bugs happen ... */
+ switch (new_cfg & (RESET_SRST_PULLS_TRST | RESET_TRST_PULLS_SRST)) {
+ case RESET_SRST_PULLS_TRST:
+ modes[1] = "srst_pulls_trst";
+ break;
+ case RESET_TRST_PULLS_SRST:
+ modes[1] = "trst_pulls_srst";
+ break;
+ case RESET_SRST_PULLS_TRST | RESET_TRST_PULLS_SRST:
+ modes[1] = "combined";
+ break;
+ default:
+ modes[1] = "separate";
+ break;
+ }
+
+ /* TRST-less connectors include Altera, Xilinx, and minimal JTAG */
+ if (new_cfg & RESET_HAS_TRST) {
+ if (new_cfg & RESET_TRST_OPEN_DRAIN)
+ modes[3] = " trst_open_drain";
+ else
+ modes[3] = " trst_push_pull";
+ } else
+ modes[3] = "";
+
+ /* SRST-less connectors include TI-14, Xilinx, and minimal JTAG */
+ if (new_cfg & RESET_HAS_SRST) {
+ if (new_cfg & RESET_SRST_NO_GATING)
+ modes[2] = " srst_nogate";
+ else
+ modes[2] = " srst_gates_jtag";
+
+ if (new_cfg & RESET_SRST_PUSH_PULL)
+ modes[4] = " srst_push_pull";
+ else
+ modes[4] = " srst_open_drain";
+ } else {
+ modes[2] = "";
+ modes[4] = "";
+ }
+
+ command_print(cmd_ctx, "%s %s%s%s%s",
+ modes[0], modes[1],
+ modes[2], modes[3], modes[4]);
return ERROR_OK;
}
diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c
index 69e21ff1..cb008a7d 100644
--- a/src/jtag/zy1000/zy1000.c
+++ b/src/jtag/zy1000/zy1000.c
@@ -28,7 +28,7 @@
#include <cyg/hal/hal_diag.h>
-#define ZYLIN_VERSION "1.54"
+#define ZYLIN_VERSION "1.55"
#define ZYLIN_DATE __DATE__
#define ZYLIN_TIME __TIME__
#define ZYLIN_OPENOCD "$Revision$"
diff --git a/src/openocd.c b/src/openocd.c
index 95c2f237..86b8aaf2 100644
--- a/src/openocd.c
+++ b/src/openocd.c
@@ -49,7 +49,7 @@
#define OPENOCD_VERSION \
- "Open On-Chip Debugger " VERSION " (" PKGBLDDATE ") " RELSTR PKGBLDREV
+ "Open On-Chip Debugger " VERSION RELSTR " (" PKGBLDDATE ")"
static void print_version(void)
{
diff --git a/src/target/arm11.c b/src/target/arm11.c
index f060da96..9f85bd78 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -768,12 +768,29 @@ int arm11_halt(struct target_s *target)
uint32_t dscr;
+ int i = 0;
while (1)
{
CHECK_RETVAL(arm11_read_DSCR(arm11, &dscr));
if (dscr & ARM11_DSCR_CORE_HALTED)
break;
+
+
+ long long then = 0;
+ if (i == 1000)
+ {
+ then = timeval_ms();
+ }
+ if (i >= 1000)
+ {
+ if ((timeval_ms()-then) > 1000)
+ {
+ LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
+ return ERROR_FAIL;
+ }
+ }
+ i++;
}
arm11_on_enter_debug_state(arm11);
@@ -865,6 +882,7 @@ int arm11_resume(struct target_s *target, int current, uint32_t address, int han
CHECK_RETVAL(jtag_execute_queue());
+ int i = 0;
while (1)
{
uint32_t dscr;
@@ -875,6 +893,22 @@ int arm11_resume(struct target_s *target, int current, uint32_t address, int han
if (dscr & ARM11_DSCR_CORE_RESTARTED)
break;
+
+
+ long long then = 0;
+ if (i == 1000)
+ {
+ then = timeval_ms();
+ }
+ if (i >= 1000)
+ {
+ if ((timeval_ms()-then) > 1000)
+ {
+ LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
+ return ERROR_FAIL;
+ }
+ }
+ i++;
}
if (!debug_execution)
@@ -1088,10 +1122,8 @@ int arm11_step(struct target_s *target, int current, uint32_t address, int handl
CHECK_RETVAL(jtag_execute_queue());
- /** \todo TODO: add a timeout */
-
/* wait for halt */
-
+ int i = 0;
while (1)
{
uint32_t dscr;
@@ -1103,6 +1135,21 @@ int arm11_step(struct target_s *target, int current, uint32_t address, int handl
if ((dscr & (ARM11_DSCR_CORE_RESTARTED | ARM11_DSCR_CORE_HALTED)) ==
(ARM11_DSCR_CORE_RESTARTED | ARM11_DSCR_CORE_HALTED))
break;
+
+ long long then = 0;
+ if (i == 1000)
+ {
+ then = timeval_ms();
+ }
+ if (i >= 1000)
+ {
+ if ((timeval_ms()-then) > 1000)
+ {
+ LOG_WARNING("Timeout (1000ms) waiting for instructions to complete");
+ return ERROR_FAIL;
+ }
+ }
+ i++;
}
/* clear breakpoint */
@@ -1386,7 +1433,8 @@ int arm11_write_memory(struct target_s *target, uint32_t address, uint32_t size,
if (address + size * count != r0)
{
- LOG_ERROR("Data transfer failed. (%d)", (int)((r0 - address) - size * count));
+ LOG_ERROR("Data transfer failed. Expected end address 0x%08x, got 0x%08x",
+ address + size * count, r0);
if (arm11_config_memwrite_burst)
LOG_ERROR("use 'arm11 memwrite burst disable' to disable fast burst mode");
@@ -1936,9 +1984,6 @@ const uint32_t arm11_coproc_instruction_limits[] =
0xFFFFFFFF, /* value */
};
-const char arm11_mrc_syntax[] = "Syntax: mrc <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2>. All parameters are numbers only.";
-const char arm11_mcr_syntax[] = "Syntax: mcr <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2> <32bit value to write>. All parameters are numbers only.";
-
arm11_common_t * arm11_find_target(const char * arg)
{
jtag_tap_t * tap;
@@ -1966,18 +2011,16 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
{
if (argc != (read ? 6 : 7))
{
- LOG_ERROR("Invalid number of arguments. %s", read ? arm11_mrc_syntax : arm11_mcr_syntax);
- return -1;
+ LOG_ERROR("Invalid number of arguments.");
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
arm11_common_t * arm11 = arm11_find_target(args[0]);
if (!arm11)
{
- LOG_ERROR("Parameter 1 is not a the JTAG chain position of an ARM11 device. %s",
- read ? arm11_mrc_syntax : arm11_mcr_syntax);
-
- return -1;
+ LOG_ERROR("Parameter 1 is not a the JTAG chain position of an ARM11 device.");
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
if (arm11->target->state != TARGET_HALTED)
@@ -1994,11 +2037,10 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
if (values[i] > arm11_coproc_instruction_limits[i])
{
- LOG_ERROR("Parameter %ld out of bounds (%" PRId32 " max). %s",
+ LOG_ERROR("Parameter %ld out of bounds (%" PRId32 " max).",
(long)(i + 2),
- arm11_coproc_instruction_limits[i],
- read ? arm11_mrc_syntax : arm11_mcr_syntax);
- return -1;
+ arm11_coproc_instruction_limits[i]);
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
}
@@ -2072,7 +2114,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
register_command(cmd_ctx, top_cmd, "mcr",
arm11_handle_mcr, COMMAND_ANY,
- "Write Coprocessor register");
+ "Write Coprocessor register. mcr <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2> <32bit value to write>. All parameters are numbers only.");
mw_cmd = register_command(cmd_ctx, top_cmd, "memwrite",
NULL, COMMAND_ANY, NULL);
@@ -2087,7 +2129,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
register_command(cmd_ctx, top_cmd, "mrc",
arm11_handle_mrc, COMMAND_ANY,
- "Read Coprocessor register");
+ "Read Coprocessor register. mrc <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2>. All parameters are numbers only.");
register_command(cmd_ctx, top_cmd, "no_increment",
arm11_handle_bool_memrw_no_increment, COMMAND_ANY,
"Don't increment address on multi-read/-write"
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 40dddda6..2b064f23 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1021,12 +1021,19 @@ int arm7_9_assert_reset(target_t *target)
return ERROR_FAIL;
}
- /* at this point trst has been asserted/deasserted once. We want to
- * program embedded ice while SRST is asserted, but some CPUs gate
- * the JTAG clock while SRST is asserted
+ /* At this point trst has been asserted/deasserted once. We would
+ * like to program EmbeddedICE while SRST is asserted, instead of
+ * depending on SRST to leave that module alone. However, many CPUs
+ * gate the JTAG clock while SRST is asserted; or JTAG may need
+ * clock stability guarantees (adaptive clocking might help).
+ *
+ * So we assume JTAG access during SRST is off the menu unless it's
+ * been specifically enabled.
*/
bool srst_asserted = false;
- if (((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0) && ((jtag_reset_config & RESET_SRST_GATES_JTAG) == 0))
+
+ if (((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0)
+ && (jtag_reset_config & RESET_SRST_NO_GATING))
{
jtag_add_reset(0, 1);
srst_asserted = true;
generated by cgit v1.2.3 (git 2.46.0) at 2025-01-10 23:39:20 +0000