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-rw-r--r--tcl/chip/atmel/at91/aic.tcl6
-rw-r--r--tcl/chip/atmel/at91/rtt.tcl4
-rw-r--r--tcl/chip/atmel/at91/usarts.tcl10
-rw-r--r--tcl/chip/st/stm32/stm32_rcc.tcl18
4 files changed, 19 insertions, 19 deletions
diff --git a/tcl/chip/atmel/at91/aic.tcl b/tcl/chip/atmel/at91/aic.tcl
index 1fe4514b..8c276aa5 100644
--- a/tcl/chip/atmel/at91/aic.tcl
+++ b/tcl/chip/atmel/at91/aic.tcl
@@ -85,12 +85,12 @@ proc show_AIC { } {
incr x
puts [format "%2d: %5s 0x%08x" $x $AT91C_ID($x) $aaa($x)]
incr x
- }
+ }
foreach REG {
- AIC_IVR AIC_FVR AIC_ISR
+ AIC_IVR AIC_FVR AIC_ISR
AIC_IPR AIC_IMR AIC_CISR AIC_IECR AIC_IDCR
- AIC_ICCR AIC_ISCR AIC_EOICR AIC_SPU AIC_DCR
+ AIC_ICCR AIC_ISCR AIC_EOICR AIC_SPU AIC_DCR
AIC_FFER AIC_FFDR AIC_FFSR } {
if [catch { show_mmr32_reg $REG } msg ] {
error $msg
diff --git a/tcl/chip/atmel/at91/rtt.tcl b/tcl/chip/atmel/at91/rtt.tcl
index 9c60300e..433cfe30 100644
--- a/tcl/chip/atmel/at91/rtt.tcl
+++ b/tcl/chip/atmel/at91/rtt.tcl
@@ -13,7 +13,7 @@ proc show_RTTC_RTMR_helper { NAME ADDR VAL } {
global BIT16 BIT17
if { $rtpres == 0 } {
set rtpres 65536;
- }
+ }
global AT91C_SLOWOSC_FREQ
# Nasty hack, make this a float by tacking a .0 on the end
# otherwise, jim makes the value an integer
@@ -47,7 +47,7 @@ proc show_RTTC_RTSR_helper { NAME ADDR VAL } {
}
proc show_RTTC { } {
-
+
show_mmr32_reg RTTC_RTMR
show_mmr32_reg RTTC_RTAR
show_mmr32_reg RTTC_RTVR
diff --git a/tcl/chip/atmel/at91/usarts.tcl b/tcl/chip/atmel/at91/usarts.tcl
index 19f4ed4c..f798fc4a 100644
--- a/tcl/chip/atmel/at91/usarts.tcl
+++ b/tcl/chip/atmel/at91/usarts.tcl
@@ -48,7 +48,7 @@ proc show_mmr_USx_MR_helper { NAME ADDR VAL } {
set x [show_normalize_bitfield $VAL 11 9]
set s "unknown"
- switch -exact $x {
+ switch -exact $x {
0 { set s "Even" }
1 { set s "Odd" }
2 { set s "Force=0" }
@@ -62,7 +62,7 @@ proc show_mmr_USx_MR_helper { NAME ADDR VAL } {
}
}
puts [format "\tParity: %s " $s]
-
+
set x [expr 5 + [show_normalize_bitfield $VAL 7 6]]
puts [format "\tDatabits: %d" $x]
@@ -80,7 +80,7 @@ foreach WHO { US0 US1 US2 US3 US4 US5 US6 US7 US8 US9 } {
set n AT91C_BASE_[set WHO]
set str ""
- # Only if it exists on the chip
+ # Only if it exists on the chip
if [ info exists $n ] {
# Hence: $n - is like AT91C_BASE_USx
# For every sub-register
@@ -114,12 +114,12 @@ set str ""
# For every sub-register
-foreach REG {DBGU_CR DBGU_MR DBGU_IER DBGU_IDR DBGU_IMR
+foreach REG {DBGU_CR DBGU_MR DBGU_IER DBGU_IDR DBGU_IMR
DBGU_CSR DBGU_RHR DBGU_THR DBGU_BRGR DBGU_CIDR DBGU_EXID DBGU_FNTR} {
# Create a command for this specific register.
proc show_$REG { } "show_mmr32_reg $REG"
-
+
# Add this command to the Device(as a whole) command
set str "$str\nshow_$REG"
}
diff --git a/tcl/chip/st/stm32/stm32_rcc.tcl b/tcl/chip/st/stm32/stm32_rcc.tcl
index 3973ff94..07718b64 100644
--- a/tcl/chip/st/stm32/stm32_rcc.tcl
+++ b/tcl/chip/st/stm32/stm32_rcc.tcl
@@ -16,7 +16,7 @@ proc show_RCC_CR { } {
error $msg
}
- show_mmr_bitfield 0 0 $val HSI { OFF ON }
+ show_mmr_bitfield 0 0 $val HSI { OFF ON }
show_mmr_bitfield 1 1 $val HSIRDY { NOTRDY RDY }
show_mmr_bitfield 7 3 $val HSITRIM { _NUMBER_ }
show_mmr_bitfield 15 8 $val HSICAL { _NUMBER_ }
@@ -26,8 +26,8 @@ proc show_RCC_CR { } {
show_mmr_bitfield 19 19 $val CSSON { OFF ON }
show_mmr_bitfield 24 24 $val PLLON { OFF ON }
show_mmr_bitfield 25 25 $val PLLRDY { NOTRDY RDY }
-}
-
+}
+
proc show_RCC_CFGR { } {
if [ catch { set val [show_mmr32_reg RCC_CFGR] } msg ] {
error $msg
@@ -47,12 +47,12 @@ proc show_RCC_CFGR { } {
show_mmr_bitfield 26 24 $val MCO { none none none none SysClk HSI HSE PLL_div2 }
}
-
+
proc show_RCC_CIR { } {
if [ catch { set val [show_mmr32_reg RCC_CIR] } msg ] {
error $msg
}
-
+
}
proc show_RCC_APB2RSTR { } {
@@ -106,7 +106,7 @@ proc show_RCC_APB1RSTR { } {
set bits(13) xxx
set bits(12) xxx
set bits(11) wwdg
- set bits(10) xxx
+ set bits(10) xxx
set bits(9) xxx
set bits(8) xxx
set bits(7) xxx
@@ -118,7 +118,7 @@ proc show_RCC_APB1RSTR { } {
set bits(1) tim3
set bits(0) tim2
show_mmr32_bits bits $val
-
+
}
proc show_RCC_AHBENR { } {
@@ -141,7 +141,7 @@ proc show_RCC_AHBENR { } {
set bits(18) xxx
set bits(17) xxx
set bits(16) xxx
- set bits(15) xxx
+ set bits(15) xxx
set bits(14) xxx
set bits(13) xxx
set bits(12) xxx
@@ -180,7 +180,7 @@ proc show_RCC_APB2ENR { } {
set bits(18) xxx
set bits(17) xxx
set bits(16) xxx
- set bits(15) adc3
+ set bits(15) adc3
set bits(14) usart1
set bits(13) tim8
set bits(12) spi1