diff options
Diffstat (limited to 'tcl/target/at91eb40a.cfg')
-rw-r--r-- | tcl/target/at91eb40a.cfg | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/tcl/target/at91eb40a.cfg b/tcl/target/at91eb40a.cfg new file mode 100644 index 00000000..39fbe095 --- /dev/null +++ b/tcl/target/at91eb40a.cfg @@ -0,0 +1,61 @@ +#Script for AT91EB40a + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME at91eb40a +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + # force an error till we get a good number + set _CPUTAPID 0x1f0f0f0f +} + + +#Atmel ties SRST & TRST together, at which point it makes +#no sense to use TRST, but use TMS instead. +# +#The annoying thing with tying SRST & TRST together is that +#there is no way to halt the CPU *before and during* the +#SRST reset, which means that the CPU will run a number +#of cycles before it can be halted(as much as milliseconds). +reset_config srst_only srst_pulls_trst + +#jtag scan chain +#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +#target configuration +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 + +# speed up memory downloads +arm7_9 fast_memory_access enable +arm7_9 dcc_downloads enable + +#flash driver +flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf + +# required for usable performance. Used for lots of +# other things than flash programming. +$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00030000 -work-area-size 0x10000 -work-area-backup 0 + +$_TARGETNAME configure -event reset-init { + puts "Running reset init script for AT91EB40A" + # Reset script for AT91EB40a + reg cpsr 0x000000D3 + mww 0xFFE00020 0x1 + mww 0xFFE00024 0x00000000 + mww 0xFFE00000 0x01002539 + mww 0xFFFFF124 0xFFFFFFFF + mww 0xffff0010 0x100 + mww 0xffff0034 0x100 +} |