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-rw-r--r--tcl/target/hilscher_netx10.cfg (renamed from tcl/target/netx500.cfg)17
-rw-r--r--tcl/target/hilscher_netx50.cfg50
-rw-r--r--tcl/target/hilscher_netx500.cfg47
3 files changed, 105 insertions, 9 deletions
diff --git a/tcl/target/netx500.cfg b/tcl/target/hilscher_netx10.cfg
index 04a267ba..14ff95da 100644
--- a/tcl/target/netx500.cfg
+++ b/tcl/target/hilscher_netx10.cfg
@@ -1,9 +1,13 @@
-#Hilscher netX 500 CPU
+################################################################################
+# Author: Michael Trensch (MTrensch@googlemail.com)
+################################################################################
+
+#Hilscher netX 10 CPU
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
- set _CHIPNAME netx500
+ set _CHIPNAME netx10
}
if { [info exists ENDIAN] } {
@@ -15,18 +19,13 @@ if { [info exists ENDIAN] } {
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
- set _CPUTAPID 0x07926021
+ set _CPUTAPID 0x25966021
}
-# FIXME most reset config belongs in board code
-reset_config trst_and_srst
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
-
# jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
# that TAP is associated with a target
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
diff --git a/tcl/target/hilscher_netx50.cfg b/tcl/target/hilscher_netx50.cfg
new file mode 100644
index 00000000..1129544e
--- /dev/null
+++ b/tcl/target/hilscher_netx50.cfg
@@ -0,0 +1,50 @@
+################################################################################
+# Author: Michael Trensch (MTrensch@googlemail.com)
+################################################################################
+
+#Hilscher netX 50 CPU
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME netx50
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x25966021
+}
+
+# jtag scan chain
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+# that TAP is associated with a target
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
+
+# On netX50 SDRAM is not accessible at offset 0xDEAD0-0xDEADF as it is busy from
+# DMA controller at init. This function will setup a dummy DMA to free this ares
+# and must be called before using SDRAM
+proc sdram_fix { } {
+
+ mww 0x1c005830 0x00000001
+
+ mww 0x1c005104 0xBFFFFFFC
+ mww 0x1c00510c 0x00480001
+ mww 0x1c005110 0x00000001
+
+ sleep 100
+
+ mww 0x1c00510c 0
+ mww 0x1c005110 0
+ mww 0x1c005830 0x00000000
+
+ puts "SDRAM Fix executed!"
+}
diff --git a/tcl/target/hilscher_netx500.cfg b/tcl/target/hilscher_netx500.cfg
new file mode 100644
index 00000000..3b9e3d8e
--- /dev/null
+++ b/tcl/target/hilscher_netx500.cfg
@@ -0,0 +1,47 @@
+#Hilscher netX 500 CPU
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME netx500
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x07926021
+}
+
+# jtag scan chain
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+# that TAP is associated with a target
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
+
+proc mread32 {addr} {
+ set value(0) 0
+ mem2array value 32 $addr 1
+ return $value(0)
+}
+
+# This function must be called on netX100/500 right after halt
+# If it is called later the needed register cannot be written anymore
+proc sdram_fix { } {
+
+ set accesskey [mread32 0x00100070]
+ mww 0x00100070 [expr $accesskey]
+ mww 0x0010002c 0x00000001
+
+ if {[expr [mread32 0x0010002c] & 0x07] == 0x07} {
+ puts "SDRAM Fix was not executed. Probably your CPU halted too late and the register is already locked!"
+ } else {
+ puts "SDRAM Fix succeeded!"
+ }
+}