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* Define debug_base, debug_ap, memory_ap in armv7a_common_tmlu2009-09-151-0/+7
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2714 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Updated mode string list.mlu2009-09-151-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2713 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Definy symbolic values for VA to PA address translation operationsmlu2009-09-151-0/+10
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2712 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fix bug when using 32 instead of 64 bit value in callback, caught by -Walloharboe2009-09-151-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2711 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* added embedded ice programming while srst is asserted todo itemoharboe2009-09-151-0/+4
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2710 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Check return values to avoid infinite wait in loop on error.mlu2009-09-141-4/+8
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2709 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Cache invalidation when writing to memorymlu2009-09-141-0/+18
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2708 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* error message upon recursive invocation of reset from reset event handlersoharboe2009-09-141-0/+22
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2707 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fix email addressoharboe2009-09-141-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2706 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Rolf Meeser <rolfm_9dq@yahoo.de> warning fix in previous commit was wrong. ↵oharboe2009-09-141-36/+38
| | | | | | target_code_size needs the real value later. git-svn-id: svn://svn.berlios.de/openocd/trunk@2705 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fix warningoharboe2009-09-141-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2704 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Magnus Lundin <lundin@mlu.mine.nu> Disable poll while core register ↵oharboe2009-09-131-0/+2
| | | | | | initialization git-svn-id: svn://svn.berlios.de/openocd/trunk@2703 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* More CortexA8 debug register definitions.mlu2009-09-131-0/+4
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2702 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Fix argument passing in cortex_a8_write_cp.mlu2009-09-131-2/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2701 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Dirk Behme <dirk.behme@googlemail.com> document post TAP reset eventoharboe2009-09-121-4/+13
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2700 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-123-4/+96
| | | | | | | | | | | | | | Update the board config for the DaVinci DM355 EVM so the reset-init event handler does the rest of the work it should do: - minor PLL setup bugfixes - initialize the DDR2 controller - probe both NAND banks - initialize UART0 - enable the icache git-svn-id: svn://svn.berlios.de/openocd/trunk@2699 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-123-26/+40
| | | | | | | | | | | | | | | Cleanup some the downloaded ARM target algorithm code: - Provide more complete disassembly of the DCC bulk write code - Make code blocks "static const", in case GCC doesn't - Fix some tabbing/layout issues - Make some arm7_9_common.h flags be "bool" not "int"; and compact the layout a bit (group most bools together) git-svn-id: svn://svn.berlios.de/openocd/trunk@2698 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> some early todo items on run_algorithmoharboe2009-09-111-0/+4
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2697 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* tap post reset event added. Allows omap3530 to send 100 runtest idle ↵oharboe2009-09-115-3/+41
| | | | | | tickle's after a TAP_RESET. git-svn-id: svn://svn.berlios.de/openocd/trunk@2696 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - revert change made to sheevaplug.cfg in rev2573ntfreak2009-09-111-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2695 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Nicolas Pitre <nico@cam.org> put feroceon target definition at the end so to ↵oharboe2009-09-111-86/+79
| | | | | | | | avoid a bunch of useless forward declarations. git-svn-id: svn://svn.berlios.de/openocd/trunk@2694 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Nicolas Pitre <nico@cam.org> Dragonite supportoharboe2009-09-114-20/+76
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2693 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* spelling mistakeoharboe2009-09-111-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2692 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* do not use dynamically sized stack arrays, not compatible with embedded OS'soharboe2009-09-111-10/+24
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2691 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* registering a target event twice caused infinite loop. Same bug as in ↵oharboe2009-09-111-4/+9
| | | | | | jtag/core.c copy & pasted. git-svn-id: svn://svn.berlios.de/openocd/trunk@2690 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* syntax error fixoharboe2009-09-111-0/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2689 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Alexei Babich <a.babich@rez.ru> cleanupoharboe2009-09-112-7/+28
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2688 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Nicolas Pitre <nico@cam.org> tighten error checking in bulk_writeoharboe2009-09-111-4/+15
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2687 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* eol-style:nativeoharboe2009-09-100-0/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2686 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Alexei Babich <a.babich@rez.ru> imx31 nand flash controller supportoharboe2009-09-104-2/+1004
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2685 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Alexei Babich <a.babich@rez.ru> fix problems with unecessary tailend byte ↵oharboe2009-09-101-0/+12
| | | | | | accesses. Use 16 bit access on tailend of a memory read if possible. git-svn-id: svn://svn.berlios.de/openocd/trunk@2684 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* michal smulski <michal.smulski@ooma.com> telo target/board scriptsoharboe2009-09-105-30/+1396
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2683 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Rolf Meeser <rolfm_9dq@yahoo.de> oharboe2009-09-092-6/+44
| | | | | | | This patch adds target algorithm support for those flash devices that do not support DQ5 polling. So far they could only be programmed with host algorithm, but this was way too slow. git-svn-id: svn://svn.berlios.de/openocd/trunk@2682 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fix bug-in-waiting when adding more than one TAP event typeoharboe2009-09-091-4/+10
| | | | | | | - Infinite loop bugfix when running tap configure a second time git-svn-id: svn://svn.berlios.de/openocd/trunk@2681 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-095-8/+27
| | | | | | | | | | | | | | | | | Optionally shave time off the armv4_5 run_algorithm() code: let them terminate using software breakpoints, avoiding roundtrips to manage hardware ones. Enable this by using BKPT to terminate execution instead of "branch to here" loops. Then pass zero as the exit address, except when running on an ARMv4 core. ARM7TDMI, ARM9TDMI, and derived cores now set a flag saying they're ARMv4. Use that mechanism in arm_nandwrite(), for about 3% speedup on a DaVinci ARM926 core; not huge, but it helps. Some other algorithms could use this too (mostly flavors of flash operation). git-svn-id: svn://svn.berlios.de/openocd/trunk@2680 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-091-4/+14
| | | | | | | | | | | Fix docs on ARM11 MCR and MRC coprocessor commands: correct read-vs-write; and describe the params. (ARM920 and ARM926 have cp15-specific commands; this approach is more generic. MCR2, MRC2, MCRR, MCRR2, MRRC, and MRRC2 instructions could also get exposed.) git-svn-id: svn://svn.berlios.de/openocd/trunk@2679 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Report correct core instruction state for ARMv/A targetsmlu2009-09-081-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2678 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.mlu2009-09-081-2/+7
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2677 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-082-0/+103
| | | | | | | | Provide an "armv7a disassemble" command. Current omissions include VFP (except as coprocessor instructions), Neon, and various Thumb2 opcodes that are not available in ARMv7-M processors. git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-081-35/+137
| | | | | | | | | | | | | | | | | | | | | lean up some loose ends with the ARM disassembler - Add a header comment describing its current state and uses and referencing the now-generally-available V7 arch spec - Support some mode switch instructions: * Thumb to Jazelle (BXJ) * Thumb to ThumbEE (ENTERX) * ThumbEE to Thumb (LEAVEX) - Improve that recent warning fix (and associated whitespace goof) - Declare the rest of the internal code and data "static". A compiler may use this, and it helps clarify the scope of these routines (e.g. what changes to them could affect). git-svn-id: svn://svn.berlios.de/openocd/trunk@2675 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Improved handling of instruction set state, helps for debugging Thumb state.mlu2009-09-071-7/+5
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2674 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Mahr, Stefan <Stefan.Mahr@sphairon.com> removes the endianness swapping in ↵oharboe2009-09-041-44/+0
| | | | | | mips_m4k.c Swapping is already done in target.c git-svn-id: svn://svn.berlios.de/openocd/trunk@2673 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* use "armv4_5 core_state arm" instead of soft_reset_halt, fewer side effectsoharboe2009-09-043-4/+5
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2672 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Dirk Behme <dirk.behme@googlemail.com> retire jtag_speed usageoharboe2009-09-041-2/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2671 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Dirk Behme <dirk.behme@googlemail.com> Add default fall back freqency.oharboe2009-09-041-0/+3
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2670 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* set ARM mode using explicit command rather than soft_reset_halt which has ↵oharboe2009-09-041-1/+1
| | | | | | lots of side effects. git-svn-id: svn://svn.berlios.de/openocd/trunk@2669 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode.oharboe2009-09-041-0/+7
| | | | | | | By enabling this bit, the processor halts when a debug event such as breakpoint occurs. git-svn-id: svn://svn.berlios.de/openocd/trunk@2668 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* more debug output for breakpointsoharboe2009-09-041-2/+10
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2667 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Matt Hsu <matt@0xlab.org> Tidy up the bit-offset operation for DSCR registeroharboe2009-09-042-6/+15
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2666 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> "set _TARGETNAME ..." cleanupoharboe2009-09-0445-49/+54
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2665 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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