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* nor: add get_flash_bank_by_name autoprobeSpencer Oliver2010-05-263-4/+32
| | | | | | | | | | | When a flash cmd is called using the flash name the autoprobe function is not called. autoprobe is called if flash_command_get_bank falls through to get_flash_bank_by_num. This makes both get_flash_bank_by_name and get_flash_bank_by_num behave the same. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* cfg: add pic32 virtual banksSpencer Oliver2010-05-261-0/+7
| | | | | | make use of the new virtual bank flash driver. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* flash: add virtual flash bank driverSpencer Oliver2010-05-264-1/+268
| | | | | | | | | | | | | This adds a virtual flash bank driver that allows virtual banks to be defined that refer to an existing flash bank. For example the real address for bank0 on the pic32 is 0x1fc00000 but the user program will either be in kseg0 (0xbfc00000) or kseg1 (0x9fc00000). This also means that gdb will be aware of all the read only flash addresses. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* NOR/CFI: fix memory leak; check malloc return valueAntonio Borneo2010-05-261-3/+48
| | | | | | | | | | | Every time command "flash probe #" is executed, memory structures are re-allocated without preventive free() of former areas, causing memory leak. Also, memory allocation does not check return value, determining segmentation fault in case of out of memory. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* There are no variants of arm7tdmi targetFreddie Chopin2010-05-247-7/+7
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* All LPC2xxx chips are little endian and that cannot be changed - update ↵Freddie Chopin2010-05-247-53/+8
| | | | | | config scripts Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* add correct CPUTAPID value for LPC2129Freddie Chopin2010-05-241-6/+2
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Update "flash bank" helper comments for LPC2xxx chipsFreddie Chopin2010-05-248-7/+8
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* LPC23xx and LPC24xx after reset run on internal 4MHz RC oscillator, so ↵Freddie Chopin2010-05-241-1/+1
| | | | | | "flash bank" parameter should be 4000 (not 12000) Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* at91sam9260: use RCLKØyvind Harboe2010-05-211-19/+12
| | | | | | | | | | | | | It might be possible to get this target going without RCLK, but it would require more careful analysis and usage of the reset events. Enable fast memory accesses. Tested on an at91sam9260 custom board w/external DRAM and flash. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfg: update stm32 performance stick configSpencer Oliver2010-05-211-1/+8
| | | | | | | | | - As this is a complete unit, including jtag we might as welli nclude the jtag cfg. - Add missing id for the str750 that is also in the jtag chain. - Reduce jtag startup speed to 500kHz. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* arm_adi_v5: correct ahbap_debugport_init mem-ap id (bug #23)Spencer Oliver2010-05-211-0/+3
| | | | | | | | We request a id register read at the end of ahbap_debugport_init but we never actually run the queue. In some cases this causes a segfault. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* board: dm355evm.cfg SDTIMR0/1 minor naming fixJon Povey2010-05-211-1/+1
| | | | | | | Register name fix; ref. TI document sprueh7d Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* nand : Add Freescale iMX27 nand flash controller supportgcembed2010-05-204-0/+900
| | | | | | | | This patch add support of iMX27 nand flash controller. This is based on driver for imx31 nand flash controller. OOB functionality is not fully working. As in mx31 controller, mx2 NFC has a bug that swap two bytes between SPARE and MAIN buffer. I used this driver for several months and no problems appear.
* reset: fix reset halt bugGary Carlson2010-05-191-23/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I was finally able to figure out the cause of this problem. There are two parts to the patch. The first patch modifies the configuration file I originally generated for the Atmel AT91SAM9G20 board and achieves the following: +++ Splits the reset-init handler into a reset-start handler for some of the initial configuration activities and keeps the remainder in the reset-init handler as was the case before. This was the real issue that was causing the timing problems I identified before. This solution was confirmed with an o-scope on actual target hardware. +++ Adds a new instruction in the reset-start handler to disable fast memory accesses in the reset-start handler. When the target jtag clock is started out at 2 kHz during system clock initialization, memory writes (i.e. register write to enable external reset pin -- basically to RSTC_MR) are naturally slow and cause GDB keep-alive issues (refer to PATCH 2/2 for additional fixes). +++ Modifies the configuration file to use srst_only reset action. The reset-start/reset-init handler split also now allows the correct behavior to be used in the configuration file (previously had to use both SRST and TRST even though only SRST is actually used and connected on the evaluation board). +++ Adds external NandFlash configuration support to take advantage of flash driver added earlier. Doesn't fix any bugs but adds functionality that was marked as TBD before and thrown in when I did other work on the configuration file. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* target: slow targets could cause GDB to time outGary Carlson2010-05-191-1/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This second half of the patch is proposed to clean up some GDB keep alive issues on arm7_9 targets that start up with very slow clocks. If an attempt is made to write to key registers on the processor with a slow jtag speed, GDB timeout warnings appear on the console (at least mine) when "reset halt" or "reset init" commands are issued from the gdb client: *** BEFORE PATCH *** (gdb) monitor reset init fast memory access is disabled 2 kHz keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1026). Workaround: increase "set remotetimeout" in GDB JTAG tap: at91sam9g20.cpu tap/device found: 0x0792603f (mfg: 0x01f, part: 0x7926, ver: 0x0) target state: halted target halted in ARM state due to breakpoint, current mode: Supervisor cpsr: 0x000000d3 pc: 0x00000000 MMU: disabled, D-Cache: disabled, I-Cache: disabled keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1027). Workaround: increase "set remotetimeout" in GDB keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1006). Workaround: increase "set remotetimeout" in GDB keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1006). Workaround: increase "set remotetimeout" in GDB keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1006). Workaround: increase "set remotetimeout" in GDB keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1004). Workaround: increase "set remotetimeout" in GDB RCLK - adaptive dcc downloads are enabled fast memory access is enabled NAND flash device 'NAND 256MiB 3,3V 8-bit' found (gdb) I added additional keep alive steps in areas that troubleshooting revealed were causing problems. I only did this however for non-fast write memory accesses. I don't think most people would be using fast memory accesses to write to memory when the jtag and system clocks are slow anyway. If you disagree with my feeling, think there is a more elegant way to handle the problem, or think the patch will cause other unforeseen problems with other targets, let me know. As you can see below, the patch does eliminate the problem on my development station and I suspect that it will benefit others. *** AFTER PATCH *** (gdb) monitor reset init fast memory access is disabled 2 kHz JTAG tap: at91sam9g20.cpu tap/device found: 0x0792603f (mfg: 0x01f, part: 0x7926, ver: 0x0) target state: halted target halted in ARM state due to breakpoint, current mode: Supervisor cpsr: 0x000000d3 pc: 0x00000000 MMU: disabled, D-Cache: disabled, I-Cache: disabled RCLK - adaptive dcc downloads are enabled fast memory access is enabled NAND flash device 'NAND 256MiB 3,3V 8-bit' found (gdb) Gary Carlson Gary Carlson, MSEE Principal Engineer Carlson-Minot Inc.
* jim: fix bug in tcl "puts"Øyvind Harboe2010-05-181-9/+4
| | | | | | | | | | | | tcl "puts" didn't work because the logging code sensored strings that did not include a '\n'. The correct thing is to sensor empty strings, which are used to keep gdb connection alive. The tcl "puts" code broke apart strings which do contain '\n' in order to implement the -nonewline argument, which is how it got hurt by the bug in log.c Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: fix false positive warning about unitialized local variableØyvind Harboe2010-05-181-1/+1
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* at91rm9200 : reset_config should go to the board config fileMarc Pignat2010-05-182-2/+3
| | | | | | Let other boards do other things with srst and trst. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* NAND/davinci: Fix segfault for hwecc4_infix readsJon Povey2010-05-181-12/+62
| | | | | | | | | | | | | | | | | | | | Page reads using hwecc4_infix layout segfaulted for check_bad_blocks because the read assumed a valid data buffer, which check_bad_blocks does not use (it only passes a 6 byte buffer for the start of OOB). This version copes with undersized or missing data or oob buffers and uses random read commands within the page to skip unwanted areas of data/OOB for speed. NOTE: Running check_bad_blocks with this layout will be reading infix OOB locations, not manufacturer bad block markers. This means that if you check blocks written in infix layout they will appear good, but manufacturer- marked bad blocks may also appear good. If you want to scan for manufactuer-marked bad blocks, you need to enable raw_access before running check_bad_blocks, or use the non-infix layout. Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk> CC: David Brownell <dbrownell@users.sourceforge.net>
* NAND: catch read errors when building BBTJon Povey2010-05-181-1/+4
| | | | | | | | nand_build_bbt() was ignoring the return value from nand_read_page() and blindly continuing. It now passes the return value up to the caller if the read fails. Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
* gdbserver: gdb cmds returning failure on successSpencer Oliver2010-05-171-9/+12
| | | | | | | The gdb_memory_map cmd for example fell through and returned ERROR_COMMAND_SYNTAX_ERROR on success - behaviour is now as expected. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Change kb/s to KiB/s in messages about kibibytesJon Povey2010-05-163-11/+11
| | | | | | | Change download rate messages about kibibytes from "kb/s" to "KiB/s" units. See: http://en.wikipedia.org/wiki/Data_rate_units Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
* NOR/CFI: minor code cleanupAntonio Borneo2010-05-161-8/+0
| | | | | | | Remove few LOG_DEBUG() messages, together with code and variables required to build such messages. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR/CFI: add cfi_read() implementationAntonio Borneo2010-05-161-2/+72
| | | | | | | | | | Final step to force bus_width size during CFI flash read. Added CFI specific implementation cfi_read() that uses only accesses at bus_width size. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR: add read() callback to struct flash_driverAntonio Borneo2010-05-1623-1/+72
| | | | | | | | | | | | | | Final target is to force bus_width size during CFI flash read. In this first step I need to replace default flash read with flash specific implementation. This patch introduces: - flash_driver_read() layer; - default_flash_read(), backward compatible; - read() callback in struct flash_driver; - proper initialization in every flash_driver instance. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR/TCL: fix typo in error messageAntonio Borneo2010-05-161-1/+1
| | | | Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR: fix comment for DoxygenAntonio Borneo2010-05-161-2/+3
| | | | | | Either bus_width and chip_width are in bytes. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR/CFI: remove use of cfi_add_byte()Antonio Borneo2010-05-161-40/+1
| | | | | | | Remove the function cfi_add_byte() and rewrite the only instance of it. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR/CFI: use bus_width for memory access in cfi_write()Antonio Borneo2010-05-161-54/+15
| | | | | | | | | | | | | | During cfi_write(), head and tail of destination area could be not aligned to bus_width. Since write operation must be at bus_width size, source buffer size is extended and buffer padded with current values read from flash. Force using bus_width to read current value from flash. Do not use cfi_add_byte() anymore, to allow removing this function later on. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR/CFI: use bus_width for memory access on flash ID.Antonio Borneo2010-05-161-25/+22
| | | | | | | | | | NOR flash structure requires each access to be bus_width wide. Fix read of flash ID accordingly to rule above. Add case (chip_width == 4), allowed by CFI spec and coherent with current value of CFI_MAX_CHIP_WIDTH but currently not used by any target. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR/CFI: identify memory accesses not using "bus_width".Antonio Borneo2010-05-161-0/+8
| | | | | | | | | | | | | | | | | | | | Since NOR flash devices does not handle "byte enable lanes", each read/write access involves the whole "chip_width". When multiple devices are in parallel, usually all chips are enabled during each access. All such cases are compatible with flash accesses at "bus_width" size. Access at "bus_width" size is mandatory for write access to avoid transferring of garbage values to flash. During read access the flash controller should take care, and discard unneeded bytes. Anyway, it is good practice to use "bus_width" size also for read. Every memory access that does not respect "bus_width" size is marked with a "FIXME" comment. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR/CFI: simplify bufferwsize computationAntonio Borneo2010-05-161-39/+10
| | | | | | | | | | | | | | | | | | | | | | | | | Review and simplify computation of bufferwsize. Add comments about variables' meaning. The same code is present 3 times in the file. Current patch updates all the 3 instances. Step 1) Replace "switch(bank->chip_width) {...}". Illegal values of bank->chip_width are already dropped. For legal values, the code is equivalent to: bufferwsize = buffersize / bank->chip_width; Step 2) The above code replacement plus the following line: bufferwsize /= (bank->bus_width / bank->chip_width); is merged in a single formula: bufferwsize = (buffersize / bank->chip_width) / (bank->bus_width / bank->chip_width); and simplified as: bufferwsize = buffersize / bank->bus_width; Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NOR/CFI: check "flash bank" command argumentsAntonio Borneo2010-05-161-1/+11
| | | | | | | | | | | | | | | | | | Arguments chip_width and bus_width of command "flash bank" are not fully checked. While bus_width is later on redundantly checked in several other parts (e.g. in cfi_command_val()) and generates run-time error, chip_width is never checked, nor related to actual bus_width value. Added check to avoid: - (chip_width == 0), that would mean no memory chip at all, avoiding also division by zero e.g. in cfi_get_u8(); - (bus_width == 0), that would mean no bus at all; - unsupported cases of chip_width or bus_width value not power of 2; - unsupported case of chip width wider than bus. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* comments on doc/manual/primer/jtag.txtJun Ma2010-05-151-10/+6
| | | | | | | | 1. fix some errors in jtag.txt(in my personal opinion, please review). 2. remove a broken link Signed-off-by: Jun Ma <sync.jma@gmail.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* missing pointer's declaration when enable macro -D_DEBUG_GDB_IO_.Jun Ma2010-05-141-0/+3
| | | | | | | reproducable when "./configure --enable-maintainer-mode CFLAGS=-D_DEBUG_GDB_IO_" Signed-off-by: Jun Ma <sync.jma@gmail.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* NAND: fix first and last handling in nand_build_bbtJon Povey2010-05-141-3/+5
| | | | | | | | | | Last block was being skipped, fix by changing the loop test from "<" to "<=" First block argument was ignored, always started from block 0 (and counted the wrong blocks as bad if first was nonzero). Now we use it. Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* NAND: fix off-by-one error in erase command argument rangeJon Povey2010-05-141-1/+1
| | | | | | | | | The last_block argument to nand_erase() is checked against nand->num_blocks, but the highest valid block number is (total - 1), the test for invalid should be ">=" rather than ">". Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* scripts: update flash bank namesSpencer Oliver2010-05-139-18/+18
| | | | | | As the flash bank name is now unique update the scripts to suit. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* flash: require unique flash bank nameSpencer Oliver2010-05-131-0/+8
| | | | | | Make sure the flash bank name is unique Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* flash: add flash bank name supportSpencer Oliver2010-05-131-24/+21
| | | | | | | | | flash cmds can now be passed either the bank name or the bank number. For example. flash info stm32.flash flash info 0 Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* zy1000.cfg: gdb connect will fail first time without gdb-attachØyvind Harboe2010-05-121-0/+5
| | | | | | | gdb-attach does a reset init to make sure that the CFI probe will succeed upon first gdb connect. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* fix instruction refilling bug when using software breakpoints on a ↵Jun Ma2010-05-121-0/+1
| | | | | | | big-endian arm926ej-s system Signed-off-by: Jun Ma <sync.jma@gmail.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* Fujitsu MBM29SL800TE flash supportKarl Kurbjun2010-05-112-0/+18
| | | | | | | | | | | | | | | | | Hi, This is my first post to the list. First, I would like to thank everyone for their work on OpenOCD, it is a great tool to work with. I have been using it to debug code on hardware for the Rockbox project (www.rockbox.org). The target that I primarily work with has a Spansion/Fujitsu NOR flash (MBM29SL800TE). I attached a patch that adds support for this flash. I hope it can be included in the main repository. If there is something that needs to be changed with the patch before inclusion please let me know. -Karl Kurbjun
* Documentation: consistency in GDB command nameMarc Pignat2010-05-111-1/+1
| | | | Always use the complete name of the GDB command, not an abbreviation.
* Documentation : arm920t implements armv4Marc Pignat2010-05-111-1/+1
| | | | There is a small typo in the cpu list, arm920t is armv4.
* mips32: 20 second timeout/megabyte for CRC checkSpencer Oliver2010-05-101-1/+3
| | | | | | | There was a fixed 20 second timeout which is too little for large, slow timeout checks. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* armv7m: 20 second timeout/megabyte for CRC checkSpencer Oliver2010-05-101-1/+3
| | | | | | | There was a fixed 20 second timeout which is too little for large, slow timeout checks. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* cfi: add Numonyx M29W128G reset workaroundSpencer Oliver2010-05-101-32/+35
| | | | | | | | The ST/Numonix M29W128G has an issue when a 0xff cmd is sent, it cause an internal undefined state. The workaround according to the Numonyx is to send another 0xf0 reset cmd Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* cfg: add stm32eval board configsSpencer Oliver2010-05-074-1/+29
| | | | | | | | Increase working area for stm3210e_eval.cfg. Add new configs for the following boards: STM321000B-EVAL, STM32100C-EVAL, STM32100B-EVAL Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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