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path: root/src/flash/nor/lpc2000.c
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* Fix sector layout for 504-KiB LPC2000 devicesRolf Meeser2010-12-041-4/+7
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* FLASH/NOR: Remove useless file lpc2000.hAntonio Borneo2010-11-171-1/+45
| | | | Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* flash: remove algorithm exit_point address for supported targetsSpencer Oliver2010-07-201-1/+1
| | | | | | | | | For the above targets the exit_point is optional when used with run_algorithm, so remove it. This makes updating the algorithm less error prone. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* lpc2000: -Wshadow warning fixesØyvind Harboe2010-06-151-3/+2
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* NOR: add read() callback to struct flash_driverAntonio Borneo2010-05-161-0/+1
| | | | | | | | | | | | | | Final target is to force bus_width size during CFI flash read. In this first step I need to replace default flash read with flash specific implementation. This patch introduces: - flash_driver_read() layer; - default_flash_read(), backward compatible; - read() callback in struct flash_driver; - proper initialization in every flash_driver instance. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* LPC1768 updates, IAR board supportDavid Brownell2010-03-021-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some issues with the generic LPC1768 config file: - Handle the post-reset clock config: 4 MHz internal RC, no PLL. This affects flash and JTAG clocking. - Remove JTAG adapter config; they don't all support trst_and_srst - Remove the rest of the bogus "reset-init" event handler. - Allow explicit CCLK configuration, instead of assuming 12 MHz; some boards will use 100 Mhz (or the post-reset 4 MHz). - Simplify: rely on defaults for endianness and IR-Capture value - Update some comments too Build on those fixes to make a trivial config for the IAR LPC1768 kickstart board (by Olimex) start working. Also, add doxygen to the lpc2000 flash driver, primarily to note a configuration problem with driver: it wrongly assumes the core clock rate never changes. Configs that are safe for updating flash after "reset halt" will thus often be unsafe later ... e.g. for LPC1768, after switching to use PLL0 at 100 MHz. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7M: use software breakpoints for algorithmsSpencer Oliver2010-02-281-1/+1
| | | | | | | | - armv7m_run_algorithm now requires all algorithms to use a software breakpoint at their exit address - updated all algorithms to support this Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* NOR: cleanup driver declsDavid Brownell2010-01-291-15/+13
| | | | | | Fix goofy struct indents. Function names *are* their addresses. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* LPC2000: rename "r13_svc" as "sp_svc"David Brownell2009-12-121-1/+1
| | | | | | This driver didn't get updated when the name changed. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: move opcode macros to <target/arm_opcodes.h>David Brownell2009-12-071-2/+5
| | | | | | | | | | | | | | | Move the ARM opcode macros from <target/armv4_5.h>, and a few Thumb2 ones from <target/armv7m.h>, to more appropriate homes in a new <target/arm_opcodes.h> file. Removed duplicate opcodes from that v7m/Thumb2 set. Protected a few macro argument references by adding missing parentheses. Tightening up some of the line lengths turned up a curious artifact: the macros for the Thumb opcodes are all 32 bits wide, not 16 bits. There's currently no explanation for why it's done that way... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: rename armv4_5_algorithm as arm_algorithmDavid Brownell2009-12-041-1/+1
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: ARMV4_5_COMMON_MAGIC --> ARM_COMMON_MAGICDavid Brownell2009-12-041-1/+1
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: rename ARMV4_5_MODE_* as ARM_MODE_*David Brownell2009-12-041-1/+1
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: rename ARMV4_5_STATE_* as ARM_STATE_*David Brownell2009-12-041-1/+1
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* remove target.h from flash.hZachary T Welch2009-12-041-1/+2
| | | | | The flash.h header does not require the target.h header file, but its implementation source files do. Move it to flash/nor/imp.h.
* change #include "armv7m.h" to <target/armv7m.h>Zachary T Welch2009-12-031-1/+1
| | | | | | | | | | | | Changes from the flat namespace to heirarchical one. Instead of writing: #include "armv7m.h" the following form should be used. #include <target/armv7m.h> The exception is from .c files in the same directory.
* change #include "algorithm.h" to <target/algorithm.h>Zachary T Welch2009-12-031-1/+1
| | | | | | | | | | | | Changes from the flat namespace to heirarchical one. Instead of writing: #include "algorithm.h" the following form should be used. #include <target/algorithm.h> The exception is from .c files in the same directory.
* change #include "binarybuffer.h" to <helper/binarybuffer.h>Zachary T Welch2009-12-031-1/+1
| | | | | | | | | | | | Changes from the flat namespace to heirarchical one. Instead of writing: #include "binarybuffer.h" the following form should be used. #include <helper/binarybuffer.h> The exception is from .c files in the same directory.
* move nor drivers to src/flash/norZachary T Welch2009-12-021-0/+812
Moves NOR flash drivers to 'src/flash/nor/'. Adds 'src/flash/nor/Makefile.am'. Builds 'libocdflashnor.la'.
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