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* TRANSPORT/TARGET: Updated source tree to build and use new swd ↵Tomek CEDRO2011-06-251-1/+3
| | | | infrastructure from src/transport not jtag/swd.h nor target/adi_v5_swd.c.
* ARM_ADI_V5: DAP initialization will select and initialize transport and its ↵Tomek CEDRO2011-06-221-5/+33
| | | | function set (functions to talk with DAP using JTAG or SWD). Minor description updates.
* Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - trivial fixesFreddie Chopin2011-06-041-4/+2
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* cortex_a: remove broken dbgbase patchup codeØyvind Harboe2011-04-011-25/+0
| | | | | | | | | | the patchup code would get false positives when checking whether a dbgbase had to be corrected. The solution is to have autodetect default, with manual override in scripts. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* types: write memory now uses constØyvind Harboe2011-04-011-9/+9
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* omap4430: tried to add in workaround for broken dbgbase queryØyvind Harboe2011-03-221-0/+1
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm_adi_v5: add/move apsel member in struct adiv5_dapLuca Ellero2011-02-171-57/+50
| | | | | | | | | | | | | | | This patch tries to make some order in "apsel" mess. "dap apsel" command was quite useless (and broken) by itself. With this patch we can use it to select between AHB or APB memory access (previous patch 05ab8bdb813acdcd74afa71d6656c2df816cb230 was somehow broken). - moves member apsel (in struct adiv5_dap) to ap_current - adds apsel member this strange choice is made trying to keep coherence in "dap apsel" command and to keep compatibility with other code (for example cortex_a8). Signed-off-by: Luca Ellero <lroluk@gmail.com>
* arm_adi_v5: add wrapping transfer functions with selection of apLuca Ellero2011-02-141-0/+74
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* add cortex-r4 etm id to dap infoMathias K2011-01-271-2/+7
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* fix segfault from stack corruption in ahbap_debugport_initAndreas Fritiofson2011-01-261-5/+4
| | | | | | | | | | | | ahbap_debugport_init was queueing reads to a local stack variable but didn't execute the queue before returning. Since the result of the reads are not used anyway, it's better to pass NULL as the destination instead of a dummy variable. I changed this throughout the function, even for the reads that were actually executed. Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* CORTEX A8: Fix broken CPU identificationMarek Vasut2010-12-301-3/+17
| | | | | | | This patch fixes the issue where the OMAP CPU (and possibly others) was mistaken for iMX51 and therefore had misadjusted debug base. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* initial SWD transport (SWD infrastructure #2)David Brownell2010-12-241-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This piggy backs on JTAG so it's not yet pretty, but that seems unavoidable so far given today's OpenOCD internals. SWD init and data transfer are unfinished and untested, but that should cause no regressions, and will be addressed by the time drivers start using this infrastructure. Checking in whould get the code working better sooner, and turn up any structural/architectural issues while they're easier to fix. The debug adapter drivers will provide simple SWD driver structs with methods that kick in as needed (instead of JTAG). So far just one adapter driver has been updated (not yet ready to use or circulate). The biggest issues are probably - fault handling, where the ARM Debug Interface V5 pipelining needs work in both JTAG and SWD modes and - missing rewrite of block I/O code to work on both of our Cortex-ready transports (Current code is hard-wired to JTAG); relates also to the pipelining issue. - omitted support to activate/deactivate SWO/SWV trace (this is technically trivial, but configuring what to trace is NOT. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> ---- doc/openocd.texi | 17 ++ src/jtag/core.c | 3 src/jtag/interface.h | 4 src/jtag/jtag.h | 2 src/jtag/swd.h | 114 +++++++++++++++++++ src/jtag/tcl.c | 2 src/target/adi_v5_swd.c | 281 ++++++++++++++++++++++++++++++++++++++++++++++-- src/target/arm_adi_v5.c | 8 + src/target/arm_adi_v5.h | 3 9 files changed, 425 insertions(+), 9 deletions(-)
* ADIv5: Implement function to lookup CoreSight componentMarek Vasut2010-11-051-0/+41
| | | | | | | This patch implements "dap_lookup_cs_component()", which allows to lookup CS component by it's identification. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* ADIv5: Introduce function to detect ROM Table locationMarek Vasut2010-11-051-26/+53
| | | | | | | | | | | This patch adds function called "dap_detect_debug_base()", which should be called to get location of the ROM Table. By walking ROM Table, it's possible to discover the location of DAP. Sadly, some CPUs misreport this value, therefore I had to introduce an fixup table, which will be used in case such CPU is detected. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* warnings: fix alignment warningsØyvind Harboe2010-09-201-1/+1
| | | | | | | These warnings are for architectures that do not support non-aligned word access. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm_adi_v5: dap_run() error propagationØyvind Harboe2010-07-191-15/+28
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm_adi_v5: mem_ap_write error propagationØyvind Harboe2010-07-191-5/+7
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm_adi_v5: error propagation of mem_ap_read_atomic_u32 failureØyvind Harboe2010-07-191-11/+33
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* mem_ap_read_u32 error propagationØyvind Harboe2010-07-191-5/+15
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm_adi_v5: add error propagation for dap_setup_accessportØyvind Harboe2010-07-191-11/+33
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM ADI-V5: cleanup CID/PID addressingDavid Brownell2010-07-161-21/+23
| | | | | | | | | | | Use addition for offsetting, not masking. Shorten some lines. Make "component_start" print-only (unused otherwise; don't save). Still doesn't resolve the issue where multiple components are wrongly displaying as NVICs on some Cortex-M3 parts because many PIDs appear to be zeroes ... maybe adapter related?? Signed-off-by: David Brownell <db@helium.(none)>
* ARM ADI-V5: PIDs and CIDs are 8 bitsDavid Brownell2010-07-131-21/+41
| | | | | | | | | Mask the upper bits after 32-bit reads. Alsoo revert the ugly changes to use PRIx32; just cast to unsized integers when printing (two chars not eight). Signed-off-by: David Brownell <db@helium.(none)>
* arm_adi_v5: error propagation fixesØyvind Harboe2010-06-221-18/+22
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm_adi: -Wshadow warning fixØyvind Harboe2010-06-151-3/+3
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm_adi_v5: correct ahbap_debugport_init mem-ap id (bug #23)Spencer Oliver2010-05-211-0/+3
| | | | | | | | We request a id register read at the end of ahbap_debugport_init but we never actually run the queue. In some cases this causes a segfault. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* change %x and %d to PRIx32 and PRId32 where needed for cygwinDaniel Bäder2010-03-251-1/+1
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* ADI_v5 - it's not always an "SWJ-DP"David Brownell2010-03-181-140/+140
| | | | | | | So don't use the name "swjdp" for all DAPs; rename to plain old "dap", which *is* always correct. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* remove more duplicationDavid Brownell2010-03-181-25/+0
| | | | | | | | Not sure how the original "move code to adi_v5_swd.c" patch left some code in the "arm_adi_v5.c" file, but a recent patch was only a partial fix -- it didn't remove all the duplication. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* linker error: fix problem with duplicate fnØyvind Harboe2010-03-181-33/+0
| | | | | | | | | | | A fn was copied instead of moved to a new file. The linker can discard exact copies of fn's without warning. This is a C++'ism. However on my Ubuntu 9.10 machine, it fails. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ADIv5 transport support moves to separate filesDavid Brownell2010-03-161-423/+11
| | | | | | | | | | | | | | | | | | | Unclutter arm_adi_v5.c by moving most transport-specific code to a transport-specific files adi_v5_{jtag,swd}.c ... it's not a full cleanup, because of some issues which need to be addressed as part of SWD support (along with implementing the DAP operations on top of SWD transport): - The mess where mem_ap_read_buf_u32() is currently coded to know about JTAG scan chains, and thus needs rewriting before it will work with SWD; - Initialization is still JTAG-specific Also move JTAG_{DP,ACK}_* constants from adi_v5.h to the JTAG file; no other code should care about those values. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* jtag: retire tap fieldØyvind Harboe2010-03-081-5/+2
| | | | | | | | | | | | | | | | | jtag_add_dr/ir_scan() now takes the tap as the first argument, rather than for each of the fields passed in. The code never exercised the path where there was more than one tap being scanned, who knows if it even worked. This simplifies the implementation and reduces clutter in the calling code. use jtag_add_ir/dr_plain_scan() for more fancy situations. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ADIv5 share DAP command supportDavid Brownell2010-03-051-23/+116
| | | | | | | | | | | | | | Get rid of needless and undesirable code duplication for all the DAP commands (resolving a FIXME) ... there's no need for coreas to have private copies of that stuff. Stick a pointer to the DAP in "struct arm", letting common code get to it. Also rename the "swjdp_info" symbol; just call it "dap". This is an overall code shrink. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* rename "swjdp_common" as "adiv5_dap"David Brownell2010-03-041-32/+32
| | | | | | | | | | | | | This partially corrects an inappropriate name choice (and its associated FIXME). There are still too many variables named "swjdp", bug little current code actually relies on them referencing an SWJ-DP instead of some other flavor of DAP. Only the two new dap_to{swd,jtag}() calls could behave differently on an SWJ-DP instead of a SW-DP or a JTAG-DP. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: use new DAP ops for AP read/writeDavid Brownell2010-03-021-98/+67
| | | | | | | | | | | | | | | | | | | Make ADIv5 internals use the two new transport-neutral calls for reading and writing DP registers; and do the same for external callers. Also, bugfix some of their call sites to handle the fault returns, instead of ignoring them. Remove most of the JTAG-specific calls, using their code as the bodies of the JTAG-specific implementation for the new methods. NOTE that there's a remaining issue: mem_ap_read_buf_u32() makes calls which are JTAG-specific. A later patch will need to remove those, so JTAG-specific operations can be removed from this file, and so that SWD support will be able to properly drop in as just a transport layer to the ADIv5 infrastructure. (The way read results are posted may need some more attention in the transport-neutrality interface.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: use new DAP ops for DP read/writeDavid Brownell2010-03-021-32/+38
| | | | | | | | | | | Make ADIv5 internals use the two new transport-neutral calls for reading and writing DP registers. Also, bugfix some of their call sites to handle the fault returns, instead of ignoring them. Remove the old JTAG-specific calls, using their code as the bodies of the JTAG-specific implementation for the new methods. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: use new dap_run() operationDavid Brownell2010-03-021-26/+59
| | | | | | | | | | Make ADIv5 use one of the new transport-neutral interfaces: call dap_run(), not jtagdp_transaction_endcheck(). Also, make that old interface private; and bugfix some of its call sites to handle the fault returns, instead of ignoring them. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: start abstracting ADIv5 transports (JTAG/SWD)David Brownell2010-03-021-0/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To support both JTAG and SWD, ADIv5 needs DAP operations which are transport-neutral, instead being of JTAG-specific. This patch: - Defines such a transport-neutral interface, abstracting access to DP and AP registers through a conceptual queue of operations. - Builds the first implementation of such a transport with the existing JTAG-specific code. In contrast to the current JTAG-only interface, the interface adds support for two previously-missing (and unused) DAP operations: - aborting the current AP transaction (untested); - reading the IDCODE register (tested) ... required for SWD init. The choice of transports may be fixed at the chip, board, or JTAG/SWD adapter level. Or if all the relevant hardware supports both transport options, the choice may be made at runtime, This patch provides basic infrastructure to support whichever choice is made. The current "JTAG-only" transport choice policy will necessarily continue for now, until SWD support becomes available in OpenOCD. Later patches start phasing out JTAG-specific calls in favor of transport-neutral calls. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: use right ID for Cortex-M3 ETMDavid Brownell2010-03-021-4/+4
| | | | | | | | | Correct a mistake made copying the ID of the Cortex-M3 ETM module from the TRM, so that "dap info" on a CM3 with an ETM will now correctly describe ROM table entries for such modules. (They are included on LPC17xx and some other cores.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5 DAP ops switching to JTAG or SWD modesDavid Brownell2010-02-271-0/+113
| | | | | | | | | | | Define two new DAP operations which use the new jtag_add_tms_seq() calls to put the DAP's transport into either SWD or JTAG mode, when the hardware allows. Tested with the Stellaris 'Recovering a "Locked" Device' procedure, which loops five times over both of these. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM ADIv5 doxygen and cleanupDavid Brownell2010-02-241-15/+42
| | | | | | | Add doxygen for mem_ap_read_buf_u{8,16,32}() calls, and shrink a few overlong lines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM ADIv5: rename more JTAG-specific routinesDavid Brownell2010-02-231-11/+11
| | | | | | | Highlight more of the internal JTAG-specific utilities, so it's easier to identify code needing changes to become transport-neutral. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: relocate memacess_tck cyclesDavid Brownell2010-02-211-12/+12
| | | | | | | | | | | | | When using an AP to access a memory (or a memory-mapped register), some extra TCK (assuming JTAG) cycles should be added to ensure the AP has enugh time to complete that access before trying to collect the response. The previous code was adding these cycles *before* trying to access (read or write) data to that address, not *after*. Fix by putting the delays in the right location. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: remove ATOMIC/COMPOSITE interface modeDavid Brownell2010-02-211-84/+27
| | | | | | | | | | | | | This removes context-sensitivity from the programming interface and makes it possible to know what a block of code does without needing to know the previous history (specifically, the DAP's "trans_mode" setting). The mode was only set to ATOMIC briefly after DAP initialization, making this patch be primarily cleanup; almost everything depends on COMPOSITE. The transactions which shouldn't have been queued were already properly flushing the queue. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: ADIv5, deadcode cleanupDavid Brownell2010-02-211-13/+13
| | | | | | | | | | | | I have no idea what the scan_inout_check() was *expecting* to achieve by issuing a read of the DP_RDBUFF register. But in any case, that code was clearly never being called ("invalue" always NULL) ... so remove it, and the associated comment. Also rename it as ap_write_check(), facilitating a cleanup of its single call site by removing constant parameters. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: ADIv5 code shrinkage, cleanupDavid Brownell2010-02-211-40/+16
| | | | | | | | | | adi_jtag_dp_scan_u32() now wraps adi_jtag_dp_scan(), removing code duplication. Include doxygen for the former. Comment some particularly relevant points. Minor fault handling fixes for both routines: don't register a callback that can't run, or return ERROR_OK after an error. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5 clean up AP fault handlingDavid Brownell2010-02-211-32/+46
| | | | | | | | | | | | | | | | | Pass up fault codes from various routines, so their callers can clean up after failures, and remove the FIXME comments highlighting those previously goofy code paths. dap_ap_{read,write}_reg_u32() dap_ap_write_reg() mem_ap_{read,write}_u32() mem_ap_{read,write}_atomic_u32() dap_setup_accessport() Make dap_ap_write_reg_u32() just wrap dap_ap_write_reg(), instead of cloning its core code (and broken fault handling). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5 clean up AP selection and register cachingDavid Brownell2010-02-211-22/+21
| | | | | | | | | | | | | | | | | | | Handling of AP (and AP register bank) selection, and cached AP registers, is pretty loose ... start tightening it: - It's "AP bank" select support ... there are no DP banks. Rename. + dap_dp_bankselect() becomes dap_ap_bankselect() + "dp_select_value" struct field becomes "ap_bank_value" - Remove duplicate AP cache init paths ... only use dap_ap_select(), and don't make Cortex (A8 or M3) cores roll their own code. - For dap_ap_bankselect(), pass up any fault code from writing the SELECT register. (Nothing yet checks those codes.) - Add various bits of Doxygen Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: doxygenDavid Brownell2010-02-061-27/+131
| | | | | | | | | | | | | | | | | Provide doxygen for many of the public ADIv5 interfaces (i.e. the ones called from Cortex core support code). Add FIXMEs (and a TODO) to help resolve implementation issues which became more apparent when trying to document this code: - Error-prone context-sensitivity (queued/nonqueued) in many procedures. - Procedures that lie by ignoring errors and wrongly claiming success. Also, there was no point in a return from dap_ap_select(); it can't fail, and no caller checks its return status. Clean that up, make it void. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: more messaging cleanup, docsDavid Brownell2010-01-311-12/+20
| | | | | | | | | When the TAR cache was explicitly invalidated, don't bother printing it; the actual hardware status is more informative. Provide some doxygen for the MEM-AP setup routine. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Subject: ADIv5: fix more diagnosticsDavid Brownell2010-01-311-9/+16
| | | | | | | | | | | If the MEM-AP cache is invalid, don't display it; just report that invalidity as an error. (This bug has been observed with "mdw 0 32" after just a "reset halt". Some code is being wrongly bypassed...) If it's valid, display that cache at DEBUG level, not ERROR. Also, don't assume it's an AHB-AP; it could be another flavor of MEM-AP. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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