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* image loading: fix problem with offsets > 0x80000000Bradey Honsinger2010-03-161-1/+1
| | | | | | | | | | | | | | | Fixes bug that prevented users from specifying a base address of 0x80000000 or higher in image commands (flash write_image, etm image, xscale trace_image). image.base_address is an offset from the start address contained in the image file (if there is one), or from 0 (for binary files). As a signed 32-bit int, it couldn't be greater than 0x7fffffff, which is a problem when trying to write a binary file to flash above that address. Changing it to a 64-bit long long keeps it as a signed offset, but allows it to cover the entire 32-bit address space. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* jtag: retire tap fieldØyvind Harboe2010-03-081-9/+3
| | | | | | | | | | | | | | | | | jtag_add_dr/ir_scan() now takes the tap as the first argument, rather than for each of the fields passed in. The code never exercised the path where there was more than one tap being scanned, who knows if it even worked. This simplifies the implementation and reduces clutter in the calling code. use jtag_add_ir/dr_plain_scan() for more fancy situations. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ARM ETM/ETB/trace: help/usage updatesDavid Brownell2010-01-071-20/+34
| | | | | | | | | | | | | Provide helptext which was sometimes missing; update some of it to be more accurate. Usage syntax messages have the same EBNF as the User's Guide; no angle brackets in either place. Don't use "&function"; functions are like arrays, their address is their name. Shrink some overlong lines, remove some empties. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: add "etm trigger_debug" commandDavid Brownell2009-12-191-4/+62
| | | | | | | | | | | | | | | | In conjunction with manual register setup, this lets the ETM trigger cause entry to debug state. It should make it easier to test and bugfix the ETM code, by enabling non-trace usage and isolating bugs specific to thef ETM support. (One current issue being that trace data collection using the ETB doesn't yet behave.) For example, many ARM9 cores with an ETM should be able to implement four more (simple) breakpoints and two more (simple) watchpoints than the EmbeddedICE supports. Or, they should be able to support complex breakpoints, incorporating ETM sequencer, counters, and/or subroutine entry/exit criteria int criteria used to trigger debug entry. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: more ETM_CTRL bit cleanupDavid Brownell2009-12-191-35/+40
| | | | | | | | | | | | | | | | | | | Change handling of the CYCLE_ACCURATE, BRANCH_OUTPUT, and TRACE_* flags; also the CONTEXTID size values. - Convert to symbols matching the actual register bits, instead of some random *other* bits (and then correcting that abuse). - Get rid of a now-needless enum. - Keep those values in etm->control, and remove etm->tracemode. These values all affect the trace data that's recorded by a trace pod or in the ETB. I modified the file format used to dump ETB data; since it's fairly clear nobody can use this mechanism now, this can't cause anyone trouble. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: start cleaning up ETM_CTRL bit handlingDavid Brownell2009-12-191-13/+15
| | | | | | | | | | | | | | | | | | | | | Provide better comments for the ETM_CTRL bits; use the correct bit for half/full clock mode; and define a few more of the bits available from the earliest ETM versions. The new bit defintions use ETM_CTRL_* names to match their register (instead of ETM_PORT_* or ETMV1_*). For clarity, and better matching to docs, they are defined with bitshifting not pre-computed masks. Stop abusing typdefs for ETM_CTRL values; such values are not limited to the enumerated set of individual bit values. Rename etm->portmode to etm->control ... and start morphing it into a single generic shadow of ETM_CTRL. Eventually etm->tracemode should vanish, so we can just write etm->control to ETM_CTRL. Restore an "if" that somehow got dropped. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM trigger_percent becomes an ETB commandDavid Brownell2009-12-191-49/+0
| | | | | | | | This command was misplaced; it's not generic to all traceport drivers, only the ETB supports this kind of configuration. So move it, and update the relevant documentation. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: only include oocd_trace.h when tracing enabled.Spencer Oliver2009-12-091-0/+3
| | | | | | Fixes build issue on systems that do not have <termios.h>, eg native win32. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* target: remove needless "extern"sDavid Brownell2009-12-081-7/+3
| | | | | | | | | | Most of these happened to be in the target.h file. Some of those are associated with symbols that could be removed at some point ... e.g. NVP_ASSERT/true and its sibling NVP_DEASSERT/false. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: use <target/arm.h> not armv4_5.hDavid Brownell2009-12-071-1/+1
| | | | | | | | | | | | | | Move most declarations in <target/armv4_5.h> to <target/arm.h> and update users. What's left in the older file is stuff that I think should be removed ... the old register cache access stuff, which makes it awkward to support microcontroller profile (Cortex-M) cores. The armv4_5_run_algorithm() declaration was moved too, even though it's not yet as generic as it probably ought to be. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: rename ARMV4_5_STATE_* as ARM_STATE_*David Brownell2009-12-041-9/+9
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: create and use target_name()David Brownell2009-11-251-1/+2
| | | | | | | | | | | | | Several of the sites now using target_type_name() really ought to be using an instance-specific name. Create a function called target_name(), accessing the instance's own (command) name. Use it in several places that really should be displaying instance-specific names. Also in several places which were already doing so, but which had no wrapper to call. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: target_get_name() --> target_type_name()David Brownell2009-11-251-1/+1
| | | | | | | | | | | | | There are two names that may matter on a per-target basis. One is a per-instance name (for example, "at91sam7s.cpu"). The other is the name of its type (for example, "arm7tdmi"), which is shared among multiple targets. Currently target_get_name() returns the type name, which is misleading and is rarely appropriate for target diagnostics. Rename that as target_type_name(). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* remove register_commands from etm_capture_driverZachary T Welch2009-11-241-2/+3
| | | | | | Converts callback to an array of command_registration records. Moves oocd_trace driver definition to end of file to eliminate useless forward declaration.
* remove target_type register_command callbackZachary T Welch2009-11-241-6/+1
| | | | | | Uses chaining of command_registration structures to eliminate all target_type register_callback routines. Exports the command_handler registration arrays for those target types that are used by others.
* etm: use register_commands()Zachary T Welch2009-11-241-37/+89
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* use COMMAND_REGISTER macroZachary T Welch2009-11-241-12/+12
| | | | | Replaces direct calls to register_command() with a macro, to allow its parameters to be changed and callers updated in phases.
* target: create/use register_cache_invalidate()David Brownell2009-11-191-1/+1
| | | | | | | | | | | | | | | Create a generic register_cache_invalidate(), and use it to replace three all-but-identical core-specific routines: - armv4_5_invalidate_core_regs() - armv7m_invalidate_core_regs - mips32_invalidate_core_regs() too. Make cache->num_regs be unsigned, avoiding various errors. Net code shrink and simplification. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* use COMMAND_PARSE_ENABLE macro where appropriateZachary T Welch2009-11-181-16/+5
| | | | | | | | Updates all command parsing of simple "enable" and "disable" arguments. A few case in the tree use a tri-state or extended arguments, which cannot use this simple macro. Simlifies the xscale icache/dcache command handler logic.
* command_handler: change 'cmd_ctx' to CMD_CTXZachary T Welch2009-11-171-97/+97
| | | | Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.
* command_handler: change 'args' to CMD_ARGVZachary T Welch2009-11-171-31/+31
| | | | | This patch converts all instances of 'args' in COMMAND_HANDLER routines to use CMD_ARGV macro.
* command_handler: change to 'argc' to CMD_ARGCZachary T Welch2009-11-171-8/+8
| | | | | This patch converts all instances of 'argc' in COMMAND_HANDLER routines to use CMD_ARGC.
* target: simplify register get/set opsDavid Brownell2009-11-171-8/+5
| | | | | | | | | | | No need to indirect from registered integers to pointers. Just stash the pointers directly in the register struct, and don't even bother registering. This is a small code shrink, speeds register access just a smidgeon, and gets rid of another rude exit() path. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* fileio: improve API typesZachary T Welch2009-11-161-1/+1
| | | | | | | | | | | | | Use size_t instead of uint32_t when specifying file sizes. Update all consumers up through the layers to use size_t when required. These changes should be safe, but the higher-levels will need to be updated further to receive the intended benefits (i.e. large file support). Add error checking for fileio_read and file_write. Previously, all errors were being silently ignored, so this change might cause some problems for some people in some cases. However, it gives us the chance to handle any errors that do occur at higher-levels, rather than burying our heads in the sand.
* target: less implicit inclusion of "etm.h"David Brownell2009-11-161-0/+1
| | | | | | | Don't include it in more headers than necessary; just use it in the few files that actually need it. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* move ARRAY_SIZE macro to types.hZachary T Welch2009-11-161-2/+0
| | | | | | | | The ARRAY_SIZE macro was defined in several target files, so move it to types.h. This patch also removes two other identical macros: DIM (from jtag.h) and asizeof (from arm11.h).
* target: no implicit #includes of "register.h"David Brownell2009-11-161-0/+1
| | | | | | | | | | | | Same deal: "register.h" got needlessly included all over the place because of being in a few widely included headers. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also, don't need that extra "types.h" inclusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: simplify ETM initialization code pathsDavid Brownell2009-11-131-8/+8
| | | | | | | | | Return NULL from etm_build_reg_cache() not ERROR_OK; and share code on that fault path. Let ETM code handle any tracking of its cache -- not callers. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* command_t -> struct commandZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct command.
* command_context_t -> struct command_contextZachary T Welch2009-11-131-4/+4
| | | | Remove misleading typedef and redundant suffix from struct command_context.
* target_t -> struct targetZachary T Welch2009-11-131-13/+13
| | | | Remove misleading typedef and redundant suffix from struct target.
* reg_t -> struct regZachary T Welch2009-11-131-21/+21
| | | | Remove misleading typedef and redundant suffix from struct reg.
* image_t -> struct imageZachary T Welch2009-11-131-1/+1
| | | | | | | Remove misleading typedef and redundant suffix from struct image. Also removes the typedef from enum image_type, as it is used in image.h only.
* etm_context_t -> struct etm_contextZachary T Welch2009-11-131-20/+20
| | | | Remove misleading typedef and redundant suffix from struct etm_context.
* etb_t -> struct etbZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct etb.
* arm_instruction_t -> struct arm_instructionZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct arm_instruction.
* reg_cache_t -> struct reg_cacheZachary T Welch2009-11-131-4/+4
| | | | Remove misleading typedef and redundant suffix from struct reg_cache.
* etmv1_trace_data_t -> struct etmv1_trace_dataZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct etmv1_trace_data.
* etm_capture_driver_t -> struct etm_capture_driverZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct etm_capture_driver.
* etm_reg_t -> struct etm_regZachary T Welch2009-11-131-6/+6
| | | | Remove misleading typedef and redundant suffix from struct etm_reg.
* arm_jtag_t -> struct arm_jtagZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct arm_jtag.
* scan_field_t -> struct scan_fieldZachary T Welch2009-11-131-2/+2
| | | | Remove useless structure typedef.
* fileio_t -> struct fileioZachary T Welch2009-11-131-2/+2
| | | | Remove useless structure typedef.
* use CALL_COMMAND_HANDLER instead of direct callsZachary T Welch2009-11-131-1/+1
| | | | | | By using CALL_COMMAND_HANDLER, parameters can be reordered, added, or even removed in inherited signatures, without requiring revisiting all of the various call sites.
* use COMMAND_HELPER for command helper functionsZachary T Welch2009-11-131-4/+3
| | | | | Define the numerous helpers that inherit command handler parameters using the COMMAND_HELPER macro.
* use COMMAND_HANDLER macro to define all commandsZachary T Welch2009-11-131-22/+11
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* ETM: start support for ETMv2+David Brownell2009-11-121-22/+120
| | | | | | | | | | | | | | | | | ARM11 and newer cores include updated ETM modules. Recognize their version codes and some key config differences. Sanity checked on an OMAP2, with an ETM11RV r0p1 (ETMv3.1). This still handles only scan chain 6, with at most 128 registers. Newer cores (mostly, Cortex) will need to use the DAP instead. Note that the newer ETM modules don't quite fit the quirky config model of the older ones ... having more port widths is easy, but the modes aren't the same. That still needs to change. Fix a curious bug ... how did the register cache NOT get saved?? Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: remove old mid-level ETM handleDavid Brownell2009-11-111-2/+1
| | | | | | | | | | | | | | | | | | Now that nothing uses the old ETM handle any more, remove it. Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores access ETM facilities. Now ARM11 could support standard ETM (and ETB) access as soon as it derives from "struct arm" ... its scanchain 6 is used access the ETM, just like ARM7 and ARM9. The Cortex parts (both M3 and A8) will need modified access methods (via ETM init parameters), so they use the DAP. Our first A8 target (OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very useful without SWO trace support (it's painfully stripped down), so that support won't be worth adding for a while. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: use new toplevel ETM handleDavid Brownell2009-11-111-58/+50
| | | | | | | | Make ETM itself use the new toplevel ETM handle, instead of the to-be-removed lower level one. As of this patch, nothing should be using the old ARM7/ARM9-specific handle. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: start generalized base typeDavid Brownell2009-11-111-14/+3
| | | | | | | | | | | | | | | | Rename "struct armv4_5_common_s" as "struct arm". It needs a bit more work to be properly generic, and to move out of this header, but it's the best start we have on that today. Add and initialize an optional ETM pointer, since that will be the first thing that gets generalized. The intent being: all ARMs should eventually derive from this "struct arm", so they can reuse the current ETM logic. (And later, more.) Currently the ARM cores that *don't* so derive are only ARMv7-M (and thus Cortex-M3) and ARM11. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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