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* Alexei Babich <a.babich@rez.ru> fix problems with unecessary tailend byte acc...oharboe2009-09-101-0/+12
* David Brownell <david-b@pacbell.net> oharboe2009-09-094-4/+20
* Report correct core instruction state for ARMv/A targetsmlu2009-09-081-1/+1
* Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.mlu2009-09-081-2/+7
* David Brownell <david-b@pacbell.net> oharboe2009-09-081-0/+86
* David Brownell <david-b@pacbell.net> oharboe2009-09-081-35/+137
* Improved handling of instruction set state, helps for debugging Thumb state.mlu2009-09-071-7/+5
* Mahr, Stefan <Stefan.Mahr@sphairon.com> removes the endianness swapping in mi...oharboe2009-09-041-44/+0
* Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode.oharboe2009-09-041-0/+7
* more debug output for breakpointsoharboe2009-09-041-2/+10
* Matt Hsu <matt@0xlab.org> Tidy up the bit-offset operation for DSCR registeroharboe2009-09-042-6/+15
* - fix a regression when using cortex_m3 emulated dcc channelntfreak2009-09-011-10/+19
* Warning fixduane2009-08-311-0/+3
* David Brownell <david-b@pacbell.net> start phasing out integers as target IDsoharboe2009-08-302-35/+22
* David Brownell <david-b@pacbell.net> fix warningsoharboe2009-08-281-4/+8
* added arm11 timeout error messagesoharboe2009-08-283-11/+94
* restore ICE watchpoint registers when the *last* software breakpoint is removedoharboe2009-08-282-3/+23
* David Brownell <david-b@pacbell.net> ARM disassembly support for about five d...oharboe2009-08-281-6/+345
* arm11 hardware step using simulation + breakpoint. Use "hardware_step enable"...oharboe2009-08-271-19/+28
* arm11 single stepping wip - at least we know the next PC nowoharboe2009-08-271-0/+4
* arm11 single stepping wipoharboe2009-08-271-0/+101
* refactor arm simulator to allow arm11 code to use it as well - no observable ...oharboe2009-08-272-49/+147
* Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...oharboe2009-08-261-5/+23
* Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...oharboe2009-08-261-1/+1
* Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...oharboe2009-08-261-1/+1
* Matt Hsu <matt@0xlab.org> cortex-a8: Copy some more registers from the docume...oharboe2009-08-261-0/+8
* Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM instructio...oharboe2009-08-261-1/+9
* Matt Hsu <matt@0xlab.org> Wait for the DTRRX to be full before reading it. Re...oharboe2009-08-261-4/+9
* Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...oharboe2009-08-261-0/+8
* Remove bogus "BUG:". If the PC is pointing to an invalid instruction, then si...oharboe2009-08-261-2/+2
* David Brownell <david-b@pacbell.net> Tweak disassembly commands:oharboe2009-08-252-28/+55
* David Brownell <david-b@pacbell.net> Accomodate targets which don't support v...oharboe2009-08-251-0/+12
* - fix build warningsntfreak2009-08-253-19/+19
* strange.... the code build and links w/Linux GCC target but fails w/arm-elf. ...oharboe2009-08-251-3/+3
* Ferdinand Postema <ferdinand@postema.eu> fix warningsoharboe2009-08-251-2/+2
* Michael Schwingen <rincewind@discworld.dascon.de> The attached patch adds a "...oharboe2009-08-251-0/+63
* David Brownell The rest of the Cortex-A8 support from Magnus: replace the pre...oharboe2009-08-252-88/+1358
* David Brownell Subset of Cortex-A8 support from Magnus: create an armv7a fileoharboe2009-08-253-0/+479
* Steve Grubb <sgrubb@redhat.com> fix various and sundry leaksoharboe2009-08-242-0/+13
* David Brownell <david-b@pacbell.net>More Thumb2 disassembly:oharboe2009-08-201-2/+136
* David Brownell <david-b@pacbell.net>Fix some command helptext:oharboe2009-08-191-4/+13
* David Brownell <david-b@pacbell.net> Clean up some Cortex-M3 reset handling.oharboe2009-08-191-17/+39
* David Brownell [david-b@pacbell.net]:ntfreak2009-08-181-10/+21
* David Brownell <david-b@pacbell.net> Add "cortex_m3 vector_catch" command and...oharboe2009-08-182-3/+83
* David Brownell <david-b@pacbell.net> Clean up ARM7/ARM9 EmbeddedICE register ...oharboe2009-08-182-49/+131
* David Brownell <david-b@pacbell.net> Several of the ARMv7M registers are 8 bi...oharboe2009-08-181-29/+30
* Ferdinand Postema <ferdinand@postema.eu> cygwin 32 bit warningoharboe2009-08-161-1/+1
* added note w/reference to discussion on whether or not arm11 code is broken o...oharboe2009-08-161-0/+4
* Ferdinand Postema [ferdinand@postema.eu]ntfreak2009-08-071-0/+3
* - fix segfault introduced during cortex reg cleanupntfreak2009-08-071-2/+2
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