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* mips: fix some more endian madnessStefan Mahr2011-06-012-63/+59
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* mips: fix swapping if running on big endian hostStefan Mahr2011-05-291-3/+19
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* Fixed values for Samung NAND chipsDamjan Marion2011-05-281-2/+2
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* Improve NAND flash detectionDamjan Marion2011-05-281-1/+3
| | | | | Detect based on both manufacturer id and chip id if manufacturer id is defined in table
* Reorganize NAND flash tableDamjan Marion2011-05-282-76/+81
| | | | | - added manufacturer field - name moved to the end for better text alignment
* mips: fix swapping if openocd is running on big endian hostStefan Mahr2011-05-281-1/+4
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* Report actual current threadAlan Bowman2011-05-251-1/+11
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* Add eCos/Cortex RTOS supportAlan Bowman2011-05-255-1/+523
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* add support for spansion flash on mindspeed c300 eval boardStefan Mahr2011-05-251-0/+14
| | | | Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
* dsp5680xx: whitespace cleanupSpencer Oliver2011-05-231-43/+43
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Fix build issue under cygwinSpencer Oliver2011-05-231-1/+1
| | | | | | | cygwin does not define sleep, so use our internal win32 version. caused by commit 9d4aec6bda90ad39a140747ea270c6a09dd26440 Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* flashing speed improved using queued jtag. error propagation improved.Rodrigo L. Rosa2011-05-193-290/+354
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* Get register value if it's invalid in cache.Jie Zhang2011-05-181-0/+5
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* Corrected test for invalid current_threadidAlan Bowman2011-05-181-1/+1
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* flash support (only full erase/write) for 568013 and 568037Rodrigo L. Rosa2011-05-183-0/+209
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* partial support for 568013 and 568037, target integration.Rodrigo L. Rosa2011-05-184-1/+1572
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* Correct stacking direction and use of address offsetAlan Bowman2011-05-142-3/+3
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* Remove useless MIPS code in avr32_ap7k.c.Jie Zhang2011-05-031-4/+0
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* adapter speed: require init script setting and centralize activation from ↵Jonas Hörberg2011-05-0110-53/+11
| | | | | | drivers to core.c Signed-off-by: Jonas Hörberg <jhorberg@sauer-danfoss.com>
* ecos: add 64 bit types for sprintf/sscanfØyvind Harboe2011-04-281-0/+2
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* gdb_server : 'R' command replied by OKMichel Jaouen2011-04-281-0/+1
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* cortex_a : smp supportMichel Jaouen2011-04-281-15/+230
| | | | | | Conflicts: src/target/cortex_a.c
* smp : infra for smp minimum supportMichel Jaouen2011-04-288-24/+384
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* cfi: leave check on whether target is running to target_write_memory()Øyvind Harboe2011-04-271-8/+0
| | | | | | | | there was a check in clearing the status register that called exit() if the target was running. target_write_memory() has such a check and will report the error correctly. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* add STM32F2 revYSimonQian2011-04-261-0/+4
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* remove read of flash_size in STM32F2SimonQian2011-04-261-9/+0
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* buspirate: fix building on some OSesDamjan Marion2011-04-261-0/+5
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* rtos : compilation error on amd64Michel Jaouen2011-04-194-23/+23
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* Fix non cfi x16 nor flash connected to x8 bus. The ids in the table should ↵Alexandre Pereira da Silva2011-04-191-1/+7
| | | | be masked before comparison.
* Make the LPC32xx nand driver support up to 5 address cycles. This will only ↵Alexandre Pereira da Silva2011-04-191-1/+1
| | | | work in the SLC driver.
* Make the LPC32xx slc nand driver the defaultAlexandre Pereira da Silva2011-04-191-2/+2
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* jtag: clarify jtag->init() and jtag->quit() definitionsØyvind Harboe2011-04-192-7/+15
| | | | | | | | | only set jtag global pointer if jtag->init() succeeds. Less code, more clear what the rules are. Fix nit that error value from init() was not propagated unmodified. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* RTOS Thread awareness support wipBroadcom Corporation (Evan Hunter)2011-04-1512-10/+1974
| | | | | | | | | | | - works on Cortex-M3 with ThreadX and FreeRTOS Compared to original patch a few nits were fixed: - remove stricmp usage - unsigned compare fix - printf formatting fixes - fixed a bug with overrunning a memory buffer allocated with malloc.
* pic32: update pic32mx flash driverSpencer Oliver2011-04-141-31/+67
| | | | | | | | | Update devices as per the latest programming manual. We now use the full DEVID to identify the target. Previously we used a 8bit id but that has now been changed in the manual. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Replace byte-access to memory with faster word-accessLuca Ellero2011-04-131-21/+69
| | | | | | | | | Freescale iMX53 doesn't seem to like unaligned accesses to his memory mapped registers. Anyway this patch makes dump_image/load_image 4X faster for every access through APB. Signed-off-by: Luca Ellero <lroluk@gmail.com>
* Add opcodes for load/store registers words immediate post-indexedLuca Ellero2011-04-131-0/+12
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a :apb mem read/write working with mmu_onMichel JAOUEN2011-04-131-159/+171
| | | | | | Conflicts: src/target/cortex_a.c
* cortex_a : multiple target on the same dapMichel JAOUEN2011-04-132-0/+12
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* cortex_a : use dap ref from armv4_5commonMichel JAOUEN2011-04-131-18/+18
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* jlink: jlink_debug_buffer use inline function when _DEBUG_USB_COMMS_ not defineJean-Christophe PLAGNIOL-VILLARD2011-04-091-10/+4
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* Buffering for up to 64 bytes in USB Blaster.Ali Lown2011-04-081-12/+38
| | | | | Uses a global buffer. Add self to acknowledgements.
* Add support for LED to USB Blaster code.Ali Lown2011-04-081-0/+9
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* cortex_a : implement jtag console for cortex_aMichel JAOUEN2011-04-061-46/+13
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* Added mips_ejtag_drscan_32_out() for optimization.Drasko DRASKOVIC2011-04-054-6/+22
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* Corrected waiting on PrAcc in wait_for_pracc_rw(). Added necessary check ↵Drasko DRASKOVIC2011-04-051-14/+42
| | | | that PrAcc is "1" before FASTDATA access.
* Added correct endianess treatment for big endian targets. Now it is possible ↵Drasko DRASKOVIC2011-04-051-6/+72
| | | | to use mips_m4k_write_memory() and mips_m4k_read_memory() to correctly set-up SDRAM, as well as bulk data write, which already handled endianess well. Also added correct endianess manipulation in case of fallback from erroneus bulk write to simple write (to avoid byte swapping two times).
* cortex_a: delete dbgbase hack vestigesØyvind Harboe2011-04-011-15/+0
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex_a: fix gaffe in first implementation of -dbgbaseMichel JAOUEN2011-04-011-9/+9
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* Merge remote branch 'origin/master' into HEADØyvind Harboe2011-04-0135-196/+193
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| * cortex_a: remove broken dbgbase patchup codeØyvind Harboe2011-04-011-25/+0
| | | | | | | | | | | | | | | | | | | | the patchup code would get false positives when checking whether a dbgbase had to be corrected. The solution is to have autodetect default, with manual override in scripts. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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