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* cortex_a9: move dap_ap_select to arm_avi_v5Luca Ellero2011-02-141-92/+66
| | | | | | | | | | | | | | | dap_ap_select was used in the code at various points, but that can lead to confusion, without any knowledge of what AP is really selected at some points. Some bugs derive from this (for example md/mw doesn't work well after issueing "dap apsel" command). Moving it to arm_adi_v5.c (using mem_ap_sel* functions instead of mem_ap_*) make the code more clear and more easier to maintain. In the future it should be made "static" to avoid its use outside arm_adi_v5 One further benefit is the various goto has been removed as well Signed-off-by: Luca Ellero <lroluk@gmail.com>
* arm_adi_v5: add wrapping transfer functions with selection of apLuca Ellero2011-02-142-1/+75
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* arm_adi_v5: add transfer functions prototypes with selection of apLuca Ellero2011-02-141-0/+31
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: check if MMU is enabled on APB read/write memoryLuca Ellero2011-02-141-0/+22
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: check target halted on APB read/write memoryLuca Ellero2011-02-141-0/+12
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: trivial fixesLuca Ellero2011-02-141-6/+7
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* buikd: fix cygwin -mno-cygwin build errorSpencer Oliver2011-02-101-1/+1
| | | | | | Remove duplicate inline that causes certain versions of gcc to choke. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* cortex_a9: implement read/write memory through APB-APLuca Ellero2011-02-101-31/+129
| | | | | | | | | | | | | | | This patch adds read/write capability to memory addresses not accessible through AHB-AP (for example "boot ROM code"). To select AHB or APB, a "dap apsel" command must be issued: dap apsel 0 -> following memory accesses are through AHB dap apsel 1 -> following memory accesses are through APB NOTE: at the moment APB memory accesses are very slow, compared to AHB accesses. Work has to be done to get it faster (for example LDR/STR instead od LDRB/STRB) Signed-off-by: Luca Ellero <lroluk@gmail.com>
* cortex_a9: fix dap_ap_select() usageAaron Carroll2011-02-101-6/+20
| | | | | | | Save, select and restore AP in cortex_a9_step and cortex_a9_init_debug_access. Fixes a bug where the wrong AP is selected after a reset. Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* buspirate: Fix command parsing, fix errors to have more sense.Michal Demin2011-02-081-28/+26
| | | | Signed-off-by: Michal Demin <michaldemin@gmail.com>
* performance: committed wrong version of buf_set_buf optimizationMathias K2011-02-081-4/+18
| | | | | | oops... Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* dsp563xx: add x, y and p memory accessMathias K2011-02-082-73/+311
| | | | | | | | | | | Hello, this patch add commands to access to x,y and p memory. For run time optimization some local jtag function was changed to static inline. Regards, Mathias
* cortex_a8/a9: fix some commentsLuca Ellero2011-02-082-8/+8
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* buf_set_buf around 30% speed increaseMathias K2011-02-081-7/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | Also i have checked the input of this function and in many cases a simple byte copy is possible. I have added this check now and is it possible the buffer is copied byte by byte and not bit by bit. With byte boundary input the test looks like this: buf_set_buf 0x02000000 iteration test: runtime (seconds): old: 6.828559 new: 0.436191 diff: 6.392368 runtime (seconds): old: 6.853636 new: 0.430389 diff: 6.423247 runtime (seconds): old: 6.794985 new: 0.423065 diff: 6.371920 Without: buf_set_buf 0x02000000 iteration test: runtime (seconds): old: 6.370869 new: 5.552624 diff: 0.818245 runtime (seconds): old: 6.420730 new: 5.665887 diff: 0.754843 runtime (seconds): old: 6.583306 new: 5.599021 diff: 0.984285 Regards, Mathias
* stm32x: add support for STM32F20xØyvind Harboe2011-02-043-0/+715
| | | | | | ready for wider testing and comments on basic erase + programming. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* more changes to dsp563xx codeMathias K2011-02-034-462/+1025
| | | | | | | | | | | | | Hello, this patch adds the missing cpu registers and the correct read/write register functions and fixed most of the halt/step/resume issues. The complete missing error propagation was added. + fix tab/spaces Regards, Mathias
* 24bit buffer supportMathias K2011-02-033-0/+44
| | | | | | | | | | Hello, this patch add 24bit support to the target buffer functions and little/big endian functions. Regards, Mathias
* cortex_m3: allow scripts to override resetAaron Carroll2011-02-021-0/+10
| | | | | | | If a handler for the reset-assert event it present, skip the usual reset handling. This is needed, for example, for board-level resets. Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* error: remove debug output when reporting errorsØyvind Harboe2011-01-311-1/+2
| | | | | | The user does not need to know or care about "command handlers". Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfi: use ARM32 machine code on all CPUs but Cortex M3Øyvind Harboe2011-01-311-6/+2
| | | | | | | | | | | ARM11 broke with aa61a3b3d8b6acad19050987835ec05f3d298bdb as the code only checked for arm 7/9. CFI probably needs work for non-ARM targets but perhaps not adding working area memory to e.g. MIPS will give the default slow CFI support. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex_a9: add source files for Cortex A9 support.Aaron Carroll2011-01-314-1/+2275
| | | | | | add target and build support for A9 Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* arm_dpm: add some SCR/RCR macrosAaron Carroll2011-01-311-2/+8
| | | | Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* Add '-coreid' target option to support multiple cores per TAP.Aaron Carroll2011-01-312-0/+23
| | | | | | | | | | | ARM Cortex-A9 multi-core chips expose a single TAP/DAP which connects to both cores. The '-coreid' option selects which core the target should connect to. Note that at present, OpenOCD can connect to either core, but not both simulatenously, until ADI contexts can be shared. Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* add cortex-r4 etm id to dap infoMathias K2011-01-271-2/+7
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Fixed small mistakes in at91sam3 info commandThomas Schmid2011-01-261-1/+3
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* add basic TI xds100v2 supportMathias K2011-01-261-0/+94
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* fix segfault from stack corruption in ahbap_debugport_initAndreas Fritiofson2011-01-261-5/+4
| | | | | | | | | | | | ahbap_debugport_init was queueing reads to a local stack variable but didn't execute the queue before returning. Since the result of the reads are not used anyway, it's better to pass NULL as the destination instead of a dummy variable. I changed this throughout the function, even for the reads that were actually executed. Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* stellaris: automatically generate and update device IDsEric Wetzel2011-01-191-0/+6
| | | | | | Added a Perl script to contrib that uses the header files in StellarisWare complete Firmware Development Package provided by TI/Luminary to generate a new list of device IDs Used Perl script and revision 6734 of TI/Luminary StellarisWare to update device IDs
* Flash driver for em357Erik Botö2011-01-143-0/+980
| | | | | | | | | | | | | | | Hi, I took the stm32x NOR flash driver and adapted it for the Ember EM357 chip. This chip is very similar to em351 and stm32w so the driver should be easily extended to support those as well if anyone can get their hands on some of those for testing. changelog: Added NOR flash driver em357 Best regards, Erik Botö
* str9xpec: Find flash controller from the chain.Santeri Salko2011-01-143-2/+4
| | | | | | | | | | | Find the flash controller by position since it is before the core, not after it. This fixes the problem that str9xpec enable_turbo (or any other str9xpec command) did not work. (See my post in http://forum.sparkfun.com/viewtopic.php?f=18&t=25542) Signed-off-by: Santeri Salko <santeri.salko@gmail.com>
* transport: fix transport command args gaffesimon qian2011-01-131-3/+3
| | | | | | | the wrong index of argv. argv[0] is the command itself, argv[1] the the transport to select. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* transport: fix LOG_DEBUG gaffesimon qian2011-01-131-2/+4
| | | | | | | | LOG_DEBUG() arguments are only evaluated when DEBUG logging is enabled, do not use arguments that have side effects like foo++. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfi: fix release build warningsSpencer Oliver2011-01-101-2/+2
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* nit: more LOG_* \n fixesEric Wetzel2011-01-0916-76/+72
| | | | | | | | | Remove extra \n from LOG_DEBUG, LOG_INFO, and LOG_WARNING messages Remove LOG_INFO_N LOG_INFO_N was only used once and had a \n at the end Change LOG_USER_N calls that end with \n to LOG_USER
* cfi: use safer arch detectionSpencer Oliver2011-01-061-2/+8
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Add the support for the armv7m arch.Jonathan Dumaresq2011-01-061-15/+64
| | | | Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
* nit: do not add \n at end of LOG_ERROREric Wetzel2011-01-0515-63/+63
| | | | Fixed in many other places, and submitted in response to Øyvind's invitation.
* mips32: add fastdata loader working areaSpencer Oliver2011-01-046-11/+29
| | | | | | | | | | Add a working area that is preserved between calls to mips_m4k_bulk_write_memory - this gives us a speed increase of approx 3kb/sec during flash writes to the pic32mx. This area is released during a resume/reset. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* target: change working area free data typeSpencer Oliver2011-01-042-3/+3
| | | | | | | We only use the struct working_area member 'free' as a true/false type so might as well use a bool data type. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* nit: do not add \n at end of LOG_ERRORØyvind Harboe2011-01-031-4/+4
| | | | | This is done in many other places as well, patch to fix gratefully accepted!
* error handling: the error number is not part of the user interfaceØyvind Harboe2011-01-0312-29/+26
| | | | | | | | Do not propagate error number to user. This is for internal programming purposes only. Error messages to the user is reported as text via LOG_ERROR(). Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfi_protect is not implemented on Spansion flashes (many do not even have ↵Michael Schwingen2011-01-021-2/+2
| | | | | | protection bits). Demote from error to warning, so that common board code can use "flash write_image erase unlock" regardless of the flash type. Signed-off-by: Michael Schwingen <michael@schwingen.org>
* non-CFI flash code uses data from CFI structures. Make sure that timeouts ↵Michael Schwingen2011-01-022-99/+98
| | | | | | are filled in on non-CFI flashes, and print CFI information in all cases, nut just on CFI flashes. Signed-off-by: Michael Schwingen <michael@schwingen.org>
* svf: implement sleep for RUNTEST min_timeJon Povey2011-01-021-30/+28
| | | | | | | | | | | Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk> min_time was effectively ignored, I needed it to program a Lattice MachXO which uses a RUNTEST to wait for an erase operation, amongst other things. With this patch pauses happen and I can program the device with an SVF generated in LSC ispVM (with "Rev D Standard" checked to suppress nonstandard LOOP statements)
* svf: fix USAGE and related error reportingJon Povey2011-01-021-9/+4
| | | | Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
* NAND/S3CXXXX: remove private "target" copyAntonio Borneo2011-01-027-33/+16
| | | | | | | Remove "target" form private data, and use common one in struct nand_block. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NAND/ORION: remove private "target" copyAntonio Borneo2011-01-021-13/+5
| | | | | | | Remove "target" form private data, and use common one in struct nand_block. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NAND/NUC910: remove private "target" copyAntonio Borneo2011-01-021-21/+7
| | | | | | | Remove "target" form private data, and use common one in struct nand_block. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NAND/MX3: remove private "target" copyAntonio Borneo2011-01-022-22/+11
| | | | | | | Remove "target" form private data, and use common one in struct nand_block. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* NAND/MX2: remove private "target" copyAntonio Borneo2011-01-022-20/+11
| | | | | | | Remove "target" form private data, and use common one in struct nand_block. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
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