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* move a constant table to .rodata sectionDavid Brownell2010-03-081-1/+1
| | | | | | | | | The table of command registration functions shouldn't be in writable memory, where stray pointers can clobber it. Also, it shouldn't be initialized at runtime; that just consumes needless code space. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* cfi: simplify and clearify codeAntonio Borneo2010-03-081-149/+75
| | | | | | | | | | | | | | | | At the end I have added comments /* FIXME: to be removed */ There are 3 lines in which my simplification is not complete due to data dependency with LOG_DEBUG() messages visible in the patch. Such log_debug has been introduced on Jan 22, 2007 with commit 4fc97d3f2726efa147cfdb0c456eace51550e1e3 during development activity in this file/procedure. From my point of view, these logs can be removed, since not part of a consistent flow of information. Alternatively, could be borrowed in the new cfi_send_command(), but this will increase verbosity. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: embedded ice dcc tweakØyvind Harboe2010-03-081-21/+48
| | | | | | | | | | How many bits to shift out before/after enabled tap not in bypass is calculated outside the loop. This is more of a demonstration of principle and to clarify code than a performance optimisation as such. Follows up a bit on the simplification work in jtag interface. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* jtag: simplify jtag_add_plain_ir/dr_scanØyvind Harboe2010-03-0810-93/+69
| | | | | | | These fn's now clearly just clock out/in bits. No mystical fields are involved. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* jtag: jtag_add_ir_scan() now takes a single fieldØyvind Harboe2010-03-0815-37/+46
| | | | | | | | In the code a single field was all that was ever used. Makes jtag_add_ir_scan() simpler and leaves more complicated stuff to jtag_add_plain_ir_scan(). Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* jtag: retire tap fieldØyvind Harboe2010-03-0830-359/+155
| | | | | | | | | | | | | | | | | jtag_add_dr/ir_scan() now takes the tap as the first argument, rather than for each of the fields passed in. The code never exercised the path where there was more than one tap being scanned, who knows if it even worked. This simplifies the implementation and reduces clutter in the calling code. use jtag_add_ir/dr_plain_scan() for more fancy situations. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* CFI: review print of Voltage valuesAntonio Borneo2010-03-061-6/+6
| | | | | | | | | | | | JEDEC standard reports Vpp integer part encoded as 4 bit HEX value. To print it using decimal digits, %u is required. Other voltage values are coded as BCD, so %x is appropriate. Code already prints one nibble at a time, so no need for field width and precision in format string. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ADIv5 share DAP command supportDavid Brownell2010-03-059-335/+174
| | | | | | | | | | | | | | Get rid of needless and undesirable code duplication for all the DAP commands (resolving a FIXME) ... there's no need for coreas to have private copies of that stuff. Stick a pointer to the DAP in "struct arm", letting common code get to it. Also rename the "swjdp_info" symbol; just call it "dap". This is an overall code shrink. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* minidriver: fix arm11 compilation problemØyvind Harboe2010-03-051-0/+6
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* rename "swjdp_common" as "adiv5_dap"David Brownell2010-03-048-116/+114
| | | | | | | | | | | | | This partially corrects an inappropriate name choice (and its associated FIXME). There are still too many variables named "swjdp", bug little current code actually relies on them referencing an SWJ-DP instead of some other flavor of DAP. Only the two new dap_to{swd,jtag}() calls could behave differently on an SWJ-DP instead of a SW-DP or a JTAG-DP. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* NOR: trim range in flash_driver_protect()David Brownell2010-03-031-0/+57
| | | | | | | | | | | | | | | | | | | | | | When the beginning or end of the specified range of sectors already has the requested protection status, don't ask the flash driver to change those sectors. This will among other things turn command sequences like this into the NOPs one would expect: flash protect_check 0 flash info 0 ... reports everything as unprotected ... flash protect 0 0 1 off That speeds things up (by whatever work was just avoided). Also, with Stellaris (which can't unprotect flash at page level) this can eliminate some undesirable/false error reports. (And finishes fixing a bug currently listed in our bug database...) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* NOR: invalidate cached state on target resumeDavid Brownell2010-03-033-0/+44
| | | | | | | | | | | | | | | | | | | | The NOR infrastructure caches some per-sector state, but it's not used much ... because the cache is not trustworthy. This patch addresses one part of that problem, by ensuring that state cached by NOR drivers gets invalidated once we resume the target -- since targets may then modify sectors. Now if we see sector protection or erase status marked as anything other than "unknown", we should be able to rely on that as being accurate. (That is ... if we assume the drivers initialize and update this state correctly.) Another part of that problem is that the cached state isn't much used (being unreliable, it would have been unsafe). Those issues can be addressed in later patches. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* NOR: stellaris message tweaksDavid Brownell2010-03-031-4/+4
| | | | | | | | | | | | | | | Give a more accurate failure message when trying to unprotect; don't complain about pages being write protected, just say that unprotect is not supported by the hardware ... referencing the new "recover" command, which is the way to achieve that. Likewise, when trying to protect, talk about "pages" (matching hardware doc) not "sectors" (an concept that's alien to these chips). Also make the helptext for the "recover" command mention that it also erases the device. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* STM32: Add Value Line Flash Programming SupportSpencer Oliver2010-03-031-0/+36
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* ADIv5: use new DAP ops for AP read/writeDavid Brownell2010-03-023-106/+79
| | | | | | | | | | | | | | | | | | | Make ADIv5 internals use the two new transport-neutral calls for reading and writing DP registers; and do the same for external callers. Also, bugfix some of their call sites to handle the fault returns, instead of ignoring them. Remove most of the JTAG-specific calls, using their code as the bodies of the JTAG-specific implementation for the new methods. NOTE that there's a remaining issue: mem_ap_read_buf_u32() makes calls which are JTAG-specific. A later patch will need to remove those, so JTAG-specific operations can be removed from this file, and so that SWD support will be able to properly drop in as just a transport layer to the ADIv5 infrastructure. (The way read results are posted may need some more attention in the transport-neutrality interface.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: use new DAP ops for DP read/writeDavid Brownell2010-03-021-32/+38
| | | | | | | | | | | Make ADIv5 internals use the two new transport-neutral calls for reading and writing DP registers. Also, bugfix some of their call sites to handle the fault returns, instead of ignoring them. Remove the old JTAG-specific calls, using their code as the bodies of the JTAG-specific implementation for the new methods. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: use new dap_run() operationDavid Brownell2010-03-023-37/+74
| | | | | | | | | | Make ADIv5 use one of the new transport-neutral interfaces: call dap_run(), not jtagdp_transaction_endcheck(). Also, make that old interface private; and bugfix some of its call sites to handle the fault returns, instead of ignoring them. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: start abstracting ADIv5 transports (JTAG/SWD)David Brownell2010-03-022-0/+278
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To support both JTAG and SWD, ADIv5 needs DAP operations which are transport-neutral, instead being of JTAG-specific. This patch: - Defines such a transport-neutral interface, abstracting access to DP and AP registers through a conceptual queue of operations. - Builds the first implementation of such a transport with the existing JTAG-specific code. In contrast to the current JTAG-only interface, the interface adds support for two previously-missing (and unused) DAP operations: - aborting the current AP transaction (untested); - reading the IDCODE register (tested) ... required for SWD init. The choice of transports may be fixed at the chip, board, or JTAG/SWD adapter level. Or if all the relevant hardware supports both transport options, the choice may be made at runtime, This patch provides basic infrastructure to support whichever choice is made. The current "JTAG-only" transport choice policy will necessarily continue for now, until SWD support becomes available in OpenOCD. Later patches start phasing out JTAG-specific calls in favor of transport-neutral calls. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target_resume() doxygenDavid Brownell2010-03-021-3/+33
| | | | | | | | | | | Add doxygen for target_resume() ... referencing the still-unresolved confusion about what the "debug_execution" parameter means (not all CPU support code acts the same). The 'handle_breakpoints" param seems to have resolved the main issue with its semantics, but it wasn't part of the function spec before. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* LPC1768 updates, IAR board supportDavid Brownell2010-03-021-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix some issues with the generic LPC1768 config file: - Handle the post-reset clock config: 4 MHz internal RC, no PLL. This affects flash and JTAG clocking. - Remove JTAG adapter config; they don't all support trst_and_srst - Remove the rest of the bogus "reset-init" event handler. - Allow explicit CCLK configuration, instead of assuming 12 MHz; some boards will use 100 Mhz (or the post-reset 4 MHz). - Simplify: rely on defaults for endianness and IR-Capture value - Update some comments too Build on those fixes to make a trivial config for the IAR LPC1768 kickstart board (by Olimex) start working. Also, add doxygen to the lpc2000 flash driver, primarily to note a configuration problem with driver: it wrongly assumes the core clock rate never changes. Configs that are safe for updating flash after "reset halt" will thus often be unsafe later ... e.g. for LPC1768, after switching to use PLL0 at 100 MHz. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: use right ID for Cortex-M3 ETMDavid Brownell2010-03-021-4/+4
| | | | | | | | | Correct a mistake made copying the ID of the Cortex-M3 ETM module from the TRM, so that "dap info" on a CM3 with an ETM will now correctly describe ROM table entries for such modules. (They are included on LPC17xx and some other cores.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* arm_semihosting buildfixDavid Brownell2010-03-011-8/+14
| | | | | | | | | | | | | | The recent "add armv7m semihosting support" patch introduced two build errors: arm_semihosting.c: In function ‘do_semihosting’: arm_semihosting.c:71: error: ‘spsr’ may be used uninitialized in this function arm_semihosting.c:71: error: ‘lr’ may be used uninitialized in this function This fixes those build errors. The behavior is, however, untested. (Also, note the two new REVISIT comments.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* zy1000: faster jtag_add_ir_scan()Øyvind Harboe2010-03-011-9/+3
| | | | | | Faster and simpler. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: arm11 load is now fasterØyvind Harboe2010-03-011-42/+71
| | | | | | 290kBytes/s @ 8MHz, no need to inline jtag_tap_next_enabled(). Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: add jtag_add_tms_seq supportØyvind Harboe2010-03-011-20/+41
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* jtag: the post TAP state is now passed to the driversØyvind Harboe2010-03-014-4/+5
| | | | | | | | | | after clocking out a tms sequence, then the TAP will be in some state. This state is now handed to the drivers. TAP_INVALID is a possible state after a TMS sequence if switching to SWD. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* armv4_5: remove core_type check in mcr/mrc cmdSpencer Oliver2010-02-281-7/+0
| | | | | | | core_type check is not required as the core function will be null for cores that do not support the mcr/mrc functions. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* stellaris: recover_command use usleep rather than sleepSpencer Oliver2010-02-281-1/+1
| | | | | | | windows api does not define a posix sleep, use usleep that has an openocd wrapper to the win32 native function. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* FT2232: add missing enum when using ftd2xx librarySpencer Oliver2010-02-281-0/+10
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* semihosting: add armv7m semihosting supportSpencer Oliver2010-02-283-76/+137
| | | | | | | do_semihosting and arm_semihosting now check the core type and use the generic arm structure. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* semihosting: move semihosting cmd to arm cmd groupSpencer Oliver2010-02-283-44/+68
| | | | | | | | | Move semihosting cmd to the arm cmd group. Targets that support semihosting will setup the setup_semihosting callback function. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* CortexM3: move disassemble cmd to arm cmd groupSpencer Oliver2010-02-281-51/+0
| | | | | | | Rather than using a Cortex disassemble cmd, we now use the arm generic version. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* ARMv7M: add arm cmd groupSpencer Oliver2010-02-282-2/+31
| | | | | | | | - Add arm cmd group to armv7m cmd chain. - arm cmd's now check the core type before running a cmd. - todo: add support for armv7m registers for reg cmd. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* MIPS: add mips algorithm supportSpencer Oliver2010-02-284-82/+392
| | | | | | | | - add mips support for target algorithms. - added handlers for target_checksum_memory and target_blank_check_memory. - clean up long lines Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* ARMv7M: use software breakpoints for algorithmsSpencer Oliver2010-02-285-26/+9
| | | | | | | | - armv7m_run_algorithm now requires all algorithms to use a software breakpoint at their exit address - updated all algorithms to support this Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Add board/redbee-usb.cfgMariano Alvira2010-02-281-0/+5
| | | | | | | | | | | The Redbee USB is a small form-factor usb stick from Redwire, LLC (www.redwirellc.com/store), built around a Freescale MC13224V ARM7TDMI + 802.15.4 radio (plus antenna). It includes an FT2232H for debugging, with Channel B connected to the mc13224v's JTAG interface (unusual) and Channel A connected to UART1. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* add board/redbee-econotag.cfg and JTAG supportMariano Alvira2010-02-271-0/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | The Redbee Econotag is an open hardware development kit from Redwire, LLC (www.redwirellc.com/store), for the Freescale MC13224V ARM7TDMI + 802.15.4 radio. It includes both an MC13224V and an FT2232H (for JTAG and UART support). It has flexible power supply options. Additional features are: - inverted-F pcb antenna - 36 GPIO brought out to 0.1" pin header (includes all peripheral pins) - Reset button - Two push buttons (on kbi1-5 and kbi0-4) - USB-A connector, powered from USB - up to 16V external input - pads for optional buck inductor - pads for optional 32.768kHz crystal - 2x LEDS on TX_ON and RX_ON [ dbrownell@users.sourceforge.net: shrink lines; texi ] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* new "stellaris recover" commandDavid Brownell2010-02-271-0/+66
| | | | | | | | | | | | | | | Stellaris chips have a procedure for restoring the chip to what's effectively the "as-manufactured" state, with all the non-volatile memory erased. That includes all flash memory, plus things like the flash protection bits and various control words which can for example disable debugger access. clearly, this can be useful during development. Luminary/TI provides an MS-Windows utility to perform this procedure along with its Stellaris developer kits. Now OpenOCD users will no longer need to use that MS-Windows utility. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5 DAP ops switching to JTAG or SWD modesDavid Brownell2010-02-272-0/+121
| | | | | | | | | | | Define two new DAP operations which use the new jtag_add_tms_seq() calls to put the DAP's transport into either SWD or JTAG mode, when the hardware allows. Tested with the Stellaris 'Recovering a "Locked" Device' procedure, which loops five times over both of these. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ft2232: implement TMS sequence commandDavid Brownell2010-02-271-2/+72
| | | | | | | Implement the new TMS_SEQ command on FT2232 hardware. Also, swap a bogus exit() call with a clean failure return. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* interface: define TMS sequence commandDavid Brownell2010-02-278-11/+124
| | | | | | | | | | | | | | | | | | | | | | | For support of SWD we need to be able to clock out special bit sequences over TMS or SWDIO. Create this as a generic operation, not yet called by anything, which is split as usual into: - upper level abstraction ... here, jtag_add_tms_seq(); - midlayer implementation logic hooking that to the lowlevel code; - lowlevel minidriver operation ... here, interface_add_tms_seq(); - message type for request queue, here JTAG_TMS. This is done slightly differently than other operations: there's a flag saying whether the interface driver supports this request. (In fact a flag *word* so upper layers can learn about other capabilities too ... for example, supporting SWD operations.) That approach (flag) lets this method *eventually* be used to eliminate pathmove() and statemove() support from most adapter drivers, by moving all that logic into the mid-layer and increasing uniformity between the various drivers. (Which will in turn reduce subtle bugginess.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ft2232: add a mechanism to specify channel in layout structsMariano Alvira2010-02-251-3/+7
| | | | | | | | | | | | | | | | | | | | | | | FT2232-family chips have two or more MPSSE modules. FTDI documentation calls these channels. JTAG adapter drivers thus need to be able to choose which channel to use. (For example, one channel may connect to a board's microcontroller, while another connects to a CPLD.) Since each channel has its own USB interface, libftdi (somewhat confusingly) identifies channels using INTERFACE_* symbols. Most boards use INTERFACE_A for JTAG, which is the default in OpenOCD. But some wire up a different one. Note that there are two facets of what makes a wiring "layout": - The mapping between debug signals map and channel signals ... embedded in C functions. - Label used in Tcl configuration scripts ... part of the "layout" structure. By letting the channel be part of the layout struct, we permit sharing the C functions between Tcl-visible layouts, when those signal mappings are reused. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM ADIv5 doxygen and cleanupDavid Brownell2010-02-241-15/+42
| | | | | | | Add doxygen for mem_ap_read_buf_u{8,16,32}() calls, and shrink a few overlong lines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* AVR flash: handle AT90CAN128 chipsHans Peter Mortensn2010-02-241-4/+26
| | | | | | | | | I have successfully programmed the AT90CAN128, based on the mega128   with some small modifications. [ dbrownell@users.sourceforge.net: patch cleanup ] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM ADIv5: rename more JTAG-specific routinesDavid Brownell2010-02-231-11/+11
| | | | | | | Highlight more of the internal JTAG-specific utilities, so it's easier to identify code needing changes to become transport-neutral. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* arm11: improve performance using minidriver hookØyvind Harboe2010-02-221-3/+65
| | | | | | | | | | | | | | | | zy1000 performance for GDB load went from 100kBytes/s to 300kBytes/s @ 8 MHz by implementing the inner loop of unack arm11 memory writes directly on top of the hw fifo. Profiling info: 78.57 0.77 0.77 arm11_run_instr_data_to_core_noack_inner 5.10 0.82 0.05 memcpy 4.08 0.86 0.04 jtag_tap_next_enabled 3.06 0.89 0.03 gdb_input Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm11: allow minidrivers to implement inner loop of memory writesØyvind Harboe2010-02-222-45/+100
| | | | | | | | | | | | | | | This allows minidrivers to e.g. hardware accelerate memory writes. Same trick as is used for arm7/9 dcc writes. Added error propagation for memory transfer failures in code rearrangement. Also the JTAG end state is not updated until after the memory write run is complete. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* zy1000: jtag_add_dr_scan() performance improvementØyvind Harboe2010-02-221-8/+15
| | | | | | Reduce overhead in jtag_add_dr_scan() a bit. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* ft2232 table init cleanupDavid Brownell2010-02-211-19/+78
| | | | | | | | Use labeled initializers in the table of layouts instead of positional ones. This ls cleaner and less error prone, plus it simplifies patches which add members to these structure. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ADIv5: relocate memacess_tck cyclesDavid Brownell2010-02-211-12/+12
| | | | | | | | | | | | | When using an AP to access a memory (or a memory-mapped register), some extra TCK (assuming JTAG) cycles should be added to ensure the AP has enugh time to complete that access before trying to collect the response. The previous code was adding these cycles *before* trying to access (read or write) data to that address, not *after*. Fix by putting the delays in the right location. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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