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* Ensure that DaVinci chips can't start with a too-fast JTAG clock.dbrownell2009-09-211-0/+6
| | | | | | | | | | It can be sped up later, once it's known the PLLs are active. Note that modern tools from TI all use adaptive clocking; and that if that's done with OpenOCD, "too fast" is also a non-issue. git-svn-id: svn://svn.berlios.de/openocd/trunk@2740 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-121-0/+3
| | | | | | | | | | | | | | Update the board config for the DaVinci DM355 EVM so the reset-init event handler does the rest of the work it should do: - minor PLL setup bugfixes - initialize the DDR2 controller - probe both NAND banks - initialize UART0 - enable the icache git-svn-id: svn://svn.berlios.de/openocd/trunk@2699 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> Update docs to say that "arm7_9 dbgrq ↵oharboe2009-07-061-1/+0
| | | | | | | | | enable" is the default on ARM9 cores, and update the DaVinci config files so they no longer explicitly specify it. git-svn-id: svn://svn.berlios.de/openocd/trunk@2484 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Move TCL script files -- Step 2 of 2:zwelch2009-05-271-0/+92
- Move src/tcl to tcl/. - Update top Makefile.am to use new path name. git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60