From c4567145ae8da57070e24824b8727b79dddc99a0 Mon Sep 17 00:00:00 2001 From: oharboe Date: Wed, 20 Aug 2008 07:14:45 +0000 Subject: fix BUG: keep_alive() error messages git-svn-id: svn://svn.berlios.de/openocd/trunk@949 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/target/arm720t.c | 17 ++++++++++++----- src/target/arm7_9_common.c | 46 ++++++++++++++++++++++++++++++++++------------ src/target/arm920t.c | 18 +++++++++++++----- src/target/arm926ejs.c | 18 +++++++++++++----- src/target/armv4_5.c | 30 +++++++++--------------------- src/target/armv7m.c | 35 +++++++++++++++-------------------- src/target/target.c | 2 +- 7 files changed, 97 insertions(+), 69 deletions(-) diff --git a/src/target/arm720t.c b/src/target/arm720t.c index 848cbca5..48a6032e 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -24,6 +24,7 @@ #include "arm720t.h" #include "jtag.h" #include "log.h" +#include "time_support.h" #include #include @@ -366,12 +367,13 @@ int arm720t_soft_reset_halt(struct target_s *target) arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm7tdmi_common_t *arm7tdmi = arm7_9->arch_info; arm720t_common_t *arm720t = arm7tdmi->arch_info; - int i; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; target_halt(target); - for (i=0; i<10; i++) + long long then=timeval_ms(); + int timeout; + while (!(timeout=((timeval_ms()-then)>1000))) { if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0) { @@ -381,10 +383,15 @@ int arm720t_soft_reset_halt(struct target_s *target) { break; } - /* do not eat all CPU, time out after 1 se*/ - alive_sleep(100); + if (debug_level>=3) + { + alive_sleep(100); + } else + { + keep_alive(); + } } - if (i==10) + if (timeout) { LOG_ERROR("Failed to halt CPU after 1 sec"); return ERROR_TARGET_TIMEOUT; diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index c08f6aa2..c79e19b9 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -35,6 +35,7 @@ #include "log.h" #include "arm7_9_common.h" #include "breakpoints.h" +#include "time_support.h" #include #include @@ -511,7 +512,6 @@ int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) int arm7_9_execute_sys_speed(struct target_s *target) { - int timeout; int retval; armv4_5_common_t *armv4_5 = target->arch_info; @@ -527,7 +527,9 @@ int arm7_9_execute_sys_speed(struct target_s *target) } arm_jtag_set_instr(jtag_info, 0x4, NULL); - for (timeout=0; timeout<50; timeout++) + long long then=timeval_ms(); + int timeout; + while (!(timeout=((timeval_ms()-then)>1000))) { /* read debug status register */ embeddedice_read_reg(dbg_stat); @@ -536,9 +538,15 @@ int arm7_9_execute_sys_speed(struct target_s *target) if ((buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1)) && (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_SYSCOMP, 1))) break; - alive_sleep(100); + if (debug_level>=3) + { + alive_sleep(100); + } else + { + keep_alive(); + } } - if (timeout == 50) + if (timeout) { LOG_ERROR("timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: %x", buf_get_u32(dbg_stat->value, 0, dbg_stat->size)); return ERROR_TARGET_TIMEOUT; @@ -873,18 +881,24 @@ int arm7_9_soft_reset_halt(struct target_s *target) if ((retval=target_halt(target))!=ERROR_OK) return retval; - for (i=0; i<10; i++) + long long then=timeval_ms(); + int timeout; + while (!(timeout=((timeval_ms()-then)>1000))) { if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) != 0) break; embeddedice_read_reg(dbg_stat); if ((retval=jtag_execute_queue())!=ERROR_OK) return retval; - /* do not eat all CPU, time out after 1 se*/ - usleep(100*1000); - + if (debug_level>=3) + { + alive_sleep(100); + } else + { + keep_alive(); + } } - if (i==10) + if (timeout) { LOG_ERROR("Failed to halt CPU after 1 sec"); return ERROR_TARGET_TIMEOUT; @@ -2162,14 +2176,22 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe target_halt(target); - for (i=0; i<100; i++) + long long then=timeval_ms(); + int timeout; + while (!(timeout=((timeval_ms()-then)>100))) { target_poll(target); if (target->state == TARGET_HALTED) break; - usleep(1000); /* sleep 1ms */ + if (debug_level>=3) + { + alive_sleep(100); + } else + { + keep_alive(); + } } - if (i == 100) + if (timeout) { LOG_ERROR("bulk write timed out, target not halted"); return ERROR_TARGET_TIMEOUT; diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 67657c94..781f624a 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -24,6 +24,7 @@ #include "arm920t.h" #include "jtag.h" #include "log.h" +#include "time_support.h" #include #include @@ -629,11 +630,12 @@ int arm920t_soft_reset_halt(struct target_s *target) arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info; arm920t_common_t *arm920t = arm9tdmi->arch_info; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; - int i; target_halt(target); - for (i=0; i<10; i++) + long long then=timeval_ms(); + int timeout; + while (!(timeout=((timeval_ms()-then)>1000))) { if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0) { @@ -643,10 +645,16 @@ int arm920t_soft_reset_halt(struct target_s *target) { break; } - /* do not eat all CPU, time out after 1 se*/ - alive_sleep(100); + if (debug_level>=3) + { + /* do not eat all CPU, time out after 1 se*/ + alive_sleep(100); + } else + { + keep_alive(); + } } - if (i==10) + if (timeout) { LOG_ERROR("Failed to halt CPU after 1 sec"); return ERROR_TARGET_TIMEOUT; diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c index feb8455f..4e15095a 100644 --- a/src/target/arm926ejs.c +++ b/src/target/arm926ejs.c @@ -24,6 +24,7 @@ #include "arm926ejs.h" #include "jtag.h" #include "log.h" +#include "time_support.h" #include #include @@ -579,11 +580,12 @@ int arm926ejs_soft_reset_halt(struct target_s *target) arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info; arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; - int i; target_halt(target); - for (i=0; i<10; i++) + long long then=timeval_ms(); + int timeout; + while (!(timeout=((timeval_ms()-then)>1000))) { if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0) { @@ -593,10 +595,16 @@ int arm926ejs_soft_reset_halt(struct target_s *target) { break; } - /* do not eat all CPU, time out after 1 se*/ - alive_sleep(100); + if (debug_level>=1) + { + /* do not eat all CPU, time out after 1 se*/ + alive_sleep(100); + } else + { + keep_alive(); + } } - if (i==10) + if (timeout) { LOG_ERROR("Failed to halt CPU after 1 sec"); return ERROR_TARGET_TIMEOUT; diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 3d96961b..48a45865 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -552,36 +552,24 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param } target_resume(target, 0, entry_point, 1, 1); - target_poll(target); - while (target->state != TARGET_HALTED) + target_wait_state(target, TARGET_HALTED, timeout_ms); + if (target->state != TARGET_HALTED) { - alive_sleep(10); - target_poll(target); - if ((timeout_ms -= 10) <= 0) + if ((retval=target_halt(target))!=ERROR_OK) + return retval; + if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK) { - LOG_ERROR("timeout waiting for algorithm to complete, trying to halt target"); - target_halt(target); - timeout_ms = 1000; - while (target->state != TARGET_HALTED) - { - alive_sleep(10); - target_poll(target); - if ((timeout_ms -= 10) <= 0) - { - LOG_ERROR("target didn't reenter debug state, exiting"); - exit(-1); - } - } - retval = ERROR_TARGET_TIMEOUT; + return retval; } + return ERROR_TARGET_TIMEOUT; } - if ((retval != ERROR_TARGET_TIMEOUT) && - (buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) != exit_point)) + if (buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) != exit_point) { LOG_WARNING("target reentered debug state, but not at the desired exit point: 0x%4.4x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32)); + return ERROR_TARGET_TIMEOUT; } breakpoint_remove(target, exit_point); diff --git a/src/target/armv7m.c b/src/target/armv7m.c index b862cf38..f4e8062c 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -368,29 +368,24 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_ target_resume(target, 0, entry_point, 1, 1); target_poll(target); - while (target->state != TARGET_HALTED) + target_wait_state(target, TARGET_HALTED, timeout_ms); + if (target->state != TARGET_HALTED) { - usleep(5000); - target_poll(target); - if ((timeout_ms -= 5) <= 0) + if ((retval=target_halt(target))!=ERROR_OK) + return retval; + if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK) { - LOG_ERROR("timeout waiting for algorithm to complete, trying to halt target"); - target_halt(target); - timeout_ms = 1000; - while (target->state != TARGET_HALTED) - { - usleep(10000); - target_poll(target); - if ((timeout_ms -= 10) <= 0) - { - LOG_ERROR("target didn't reenter debug state, exiting"); - exit(-1); - } - } - armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc); - LOG_DEBUG("failed algoritm halted at 0x%x ", pc); - retval = ERROR_TARGET_TIMEOUT; + return retval; } + return ERROR_TARGET_TIMEOUT; + } + + + armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc); + if (pc != exit_point) + { + LOG_DEBUG("failed algoritm halted at 0x%x ", pc); + return ERROR_TARGET_TIMEOUT; } breakpoint_remove(target, exit_point); diff --git a/src/target/target.c b/src/target/target.c index b2220c0b..9f633ee1 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -1634,7 +1634,7 @@ int target_wait_state(target_t *target, enum target_state state, int ms) { if ((retval=target_poll(target))!=ERROR_OK) return retval; - target_call_timer_callbacks_now(); + keep_alive(); if (target->state == state) { break; -- cgit v1.2.3