From d91941d5a01ca0b9d43571edc03ba18741076cca Mon Sep 17 00:00:00 2001 From: David Brownell Date: Wed, 13 Jan 2010 03:16:37 -0800 Subject: Cortex-M3: improved core exception handling This updates three aspects of debugger/exception interactions: - Save the user's "vector_catch" setting, and restore it after reset. Previously, it was obliterated (rather annoyingly) each time. - Don't catch BusFault and HardFault exceptions unless the user says to do so. Target firmware may need to handle them. - Don't modify SHCSR to prevent escalating BusFault to HardFault. Target firmware may expect to handle it as a HardFault. Those simplifications fix several bugs. In one annoying case, OpenOCD would cause the target to lock up on ome faults which triggered after the debugger disconnected. NOTE: a known remaining issue is that OpenOCD can still leave DEMCR set after an otherwise-clean OpenOCD shutdown. Signed-off-by: David Brownell --- NEWS | 2 ++ 1 file changed, 2 insertions(+) (limited to 'NEWS') diff --git a/NEWS b/NEWS index b1696065..a8b2b44b 100644 --- a/NEWS +++ b/NEWS @@ -34,6 +34,8 @@ Target Layer: - watchpoint support Cortex-M3 - Exposed DWT registers like cycle counter + - vector_catch settings not clobbered by resets + - no longer interferes with firmware's fault handling ETM, ETB - "trigger_percent" command moved ETM --> ETB - "etm trigger_debug" command added -- cgit v1.2.3