From 19b84dafb0a9902df78aa021330cbcfae93a89a7 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Sun, 25 Oct 2009 14:03:14 -0700 Subject: ARM: rename "arm9tdmi vector_catch" to "arm9 ..." And update doc accordingly. That EmbeddedICE register was introduced for ARM9TDMI and then carried forward into most new chips that use EmbeddedICE. --- TODO | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'TODO') diff --git a/TODO b/TODO index fa9477ac..611bdd3c 100644 --- a/TODO +++ b/TODO @@ -138,9 +138,8 @@ Once the above are completed: - regression: "reset halt" between 729(works) and 788(fails): @par https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html - ARM7/9: - - clean up "arm9tdmi vector_catch". Should be available for other arm9 - (e.g. arm926ejs) and some(???) arm7 cores. @par -https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html + - clean up "arm9tdmi vector_catch". Available for some arm7 cores? @par +https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html - add reset option to allow programming embedded ice while srst is asserted. Some CPUs will gate the JTAG clock when srst is asserted and in this case, -- cgit v1.2.3