From bf3abc48f008e0a0c0e42b943481872599463af6 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Tue, 24 Nov 2009 01:27:21 -0800 Subject: ARM11: use standard single step simulation The previous stuff was needed because the ARM11 code wasn't using the standard ARM base type and register access ... but now those mechanisms work, so we can switch out that special-purpose glue. This should resolve all the "FIXME -- handle Thumb single stepping" comments too, and properly handle the processor's mode. (Modulo the issue that this code doesn't yet handle two-byte breakpoints.) Clarify the comments about the the hardware single stepping. When we eventually share breakpoint code with Cortex-A8, we can just make that be the default on cores which support it. We may still want an override command, not just to facilitate testing but to cope with "instruction address mismatch" not quite being true single-step. Signed-off-by: David Brownell --- TODO | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'TODO') diff --git a/TODO b/TODO index bdbb0ecc..da5cf529 100644 --- a/TODO +++ b/TODO @@ -167,8 +167,7 @@ https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html mdw 0xb80005f0 0x8, mdh 0xb80005f0 0x10, mdb 0xb80005f0 0x20. mdb returns garabage. - implement missing functionality (grep FNC_INFO_NOTIMPLEMENTED ...) - - thumb support is missing: ISTR ARMv6 requires Thumb. - ARM1156 has Thumb2; ARM1136 doesn't. +- Thumb2 single stepping: ARM1156T2 needs simulator support - Cortex A8 support (ML) - add target implementation (ML) - Generic ARM run_algorithm() interface -- cgit v1.2.3