From 56adbaffd0a0fab320a64097cd6aa6e74473f840 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Mon, 16 Nov 2009 16:36:21 -0800 Subject: ARMv7A: use standard disassembler We no longer need v7A-specific code for this. Signed-off-by: David Brownell --- doc/openocd.texi | 26 ++++++++------------------ 1 file changed, 8 insertions(+), 18 deletions(-) (limited to 'doc/openocd.texi') diff --git a/doc/openocd.texi b/doc/openocd.texi index 092de7d3..2767d787 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5535,10 +5535,17 @@ that is not currently supported in OpenOCD.) Disassembles @var{count} instructions starting at @var{address}. If @var{count} is not specified, a single instruction is disassembled. If @option{thumb} is specified, or the low bit of the address is set, -Thumb (16-bit) instructions are used; +Thumb2 (mixed 16/32-bit) instructions are used; else ARM (32-bit) instructions are used. (Processors may also support the Jazelle state, but those instructions are not currently understood by OpenOCD.) + +Note that all Thumb instructions are Thumb2 instructions, +so older processors (without Thumb2 support) will still +see correct disassembly of Thumb code. +Also, ThumbEE opcodes are the same as Thumb2, +with a handful of exceptions. +ThumbEE disassembly currently has no explicit support. @end deffn @deffn Command {arm reg} @@ -5941,23 +5948,6 @@ Displays the number of extra tck for mem-ap memory bus access [0-255]. If @var{value} is defined, first assigns that. @end deffn -@subsection ARMv7-A specific commands -@cindex ARMv7-A - -@deffn Command {armv7a disassemble} address [count [@option{thumb}]] -@cindex disassemble -Disassembles @var{count} instructions starting at @var{address}. -If @var{count} is not specified, a single instruction is disassembled. -If @option{thumb} is specified, or the low bit of the address is set, -Thumb2 (mixed 16/32-bit) instructions are used; -else ARM (32-bit) instructions are used. -With a handful of exceptions, ThumbEE instructions are the same as Thumb2; -ThumbEE disassembly currently has no explicit support. -(Processors may also support the Jazelle state, but -those instructions are not currently understood by OpenOCD.) -@end deffn - - @subsection Cortex-M3 specific commands @cindex Cortex-M3 -- cgit v1.2.3