From bc075606b7de9f85bff50e8afc0dbdcba3a99765 Mon Sep 17 00:00:00 2001 From: oharboe Date: Tue, 25 Aug 2009 20:02:19 +0000 Subject: David Brownell Tweak disassembly commands: For ARMv4/ARMv5: - better command parameter error checking - don't require an instruction count; default to one - recognize thumb function addresses - make function static - shorten some too-long lines For Cortex-M3: - don't require an instruction count; default to one With the relevant doc updates. --- Nyet done: invoke the thumb2 disassembler on v4/v5, to better handle branch instructions. git-svn-id: svn://svn.berlios.de/openocd/trunk@2624 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- doc/openocd.texi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'doc') diff --git a/doc/openocd.texi b/doc/openocd.texi index e5781a11..14dec6d2 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -4612,10 +4612,12 @@ The target may later be resumed in the currently set core_state. that is not currently supported in OpenOCD.) @end deffn -@deffn Command {armv4_5 disassemble} address count [thumb] +@deffn Command {armv4_5 disassemble} address [count [@option{thumb}]] @cindex disassemble Disassembles @var{count} instructions starting at @var{address}. -If @option{thumb} is specified, Thumb (16-bit) instructions are used; +If @var{count} is not specified, a single instruction is disassembled. +If @option{thumb} is specified, or the low bit of the address is set, +Thumb (16-bit) instructions are used; else ARM (32-bit) instructions are used. (Processors may also support the Jazelle state, but those instructions are not currently understood by OpenOCD.) @@ -5086,9 +5088,10 @@ If @var{value} is defined, first assigns that. @subsection Cortex-M3 specific commands @cindex Cortex-M3 -@deffn Command {cortex_m3 disassemble} address count +@deffn Command {cortex_m3 disassemble} address [count] @cindex disassemble Disassembles @var{count} Thumb2 instructions starting at @var{address}. +If @var{count} is not specified, a single instruction is disassembled. @end deffn @deffn Command {cortex_m3 maskisr} (@option{on}|@option{off}) -- cgit v1.2.3