From ee340df8417772b8c29a54ddf7b36556ec20d609 Mon Sep 17 00:00:00 2001 From: drath Date: Tue, 19 Feb 2008 19:52:09 +0000 Subject: - add support for the majority of the Samsung ARM SoC family, S3C2410, S3C2412, S3C2413, S3C2440 and S3C2443 (thanks to Ben Dooks for this patch) git-svn-id: svn://svn.berlios.de/openocd/trunk@311 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/flash/s3c24xx_nand.h | 51 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 src/flash/s3c24xx_nand.h (limited to 'src/flash/s3c24xx_nand.h') diff --git a/src/flash/s3c24xx_nand.h b/src/flash/s3c24xx_nand.h new file mode 100644 index 00000000..f4193526 --- /dev/null +++ b/src/flash/s3c24xx_nand.h @@ -0,0 +1,51 @@ +/* src/flash/s3c24xx_nand.h + * + * S3C24XX Series OpenOCD NAND Flash controller support. + * + * Copyright 2007,2008 Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * Many thanks to Simtec Electronics for sponsoring this work. + */ + +#include "target.h" +#include "s3c24xx_regs_nand.h" + +typedef struct s3c24xx_nand_controller_s +{ + struct target_s *target; + + /* register addresses */ + u32 cmd; + u32 addr; + u32 data; + u32 nfstat; +} s3c24xx_nand_controller_t; + +/* Default to using the un-translated NAND register based address */ +#undef S3C2410_NFREG +#define S3C2410_NFREG(x) ((x) + 0x4e000000) + +extern s3c24xx_nand_controller_t *s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device); + +extern int s3c24xx_register_commands(struct command_context_s *cmd_ctx); +extern int s3c24xx_reset(struct nand_device_s *device); +extern int s3c24xx_command(struct nand_device_s *device, u8 command); +extern int s3c24xx_address(struct nand_device_s *device, u8 address); +extern int s3c24xx_write_data(struct nand_device_s *device, u16 data); +extern int s3c24xx_read_data(struct nand_device_s *device, void *data); +extern int s3c24xx_controller_ready(struct nand_device_s *device, int tout); + +#define s3c24xx_write_page NULL +#define s3c24xx_read_page NULL + +/* code shared between different controllers */ + +extern int s3c2440_nand_ready(struct nand_device_s *device, int timeout); + +extern int s3c2440_read_block_data(struct nand_device_s *, u8 *data, int data_size); +extern int s3c2440_write_block_data(struct nand_device_s *, u8 *data, int data_size); -- cgit v1.2.3